Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
clk: meson: migrate meson8b out of hw_onecell_data to drop NR_CLKS
The way hw_onecell_data is declared:
struct clk_hw_onecell_data {
unsigned int num;
struct clk_hw *hws[];
};
makes it impossible to have the clk_hw table declared outside while
using ARRAY_SIZE() to determine ".num" due to ".hws" being a flexible
array member.
Completely move out of hw_onecell_data and add a custom
devm_of_clk_add_hw_provider() "get" callback to retrieve the clk_hw
in order to finally get rid on the NR_CLKS define.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-5-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
authored by
Neil Armstrong
and committed by
Jerome Brunet
5e4e4804
c3f2801b
+656
-654
+1
drivers/clk/meson/Kconfig
+1
drivers/clk/meson/Kconfig
+655
-652
drivers/clk/meson/meson8b.c
+655
-652
drivers/clk/meson/meson8b.c
···
18
18
19
19
#include "meson8b.h"
20
20
#include "clk-regmap.h"
21
+
#include "meson-clkc-utils.h"
21
22
#include "clk-pll.h"
22
23
#include "clk-mpll.h"
23
24
···
2773
2772
static MESON_GATE(meson8b_ao_ahb_bus, HHI_GCLK_AO, 2);
2774
2773
static MESON_GATE(meson8b_ao_iface, HHI_GCLK_AO, 3);
2775
2774
2776
-
static struct clk_hw_onecell_data meson8_hw_onecell_data = {
2777
-
.hws = {
2778
-
[CLKID_PLL_FIXED] = &meson8b_fixed_pll.hw,
2779
-
[CLKID_PLL_VID] = &meson8b_vid_pll.hw,
2780
-
[CLKID_PLL_SYS] = &meson8b_sys_pll.hw,
2781
-
[CLKID_FCLK_DIV2] = &meson8b_fclk_div2.hw,
2782
-
[CLKID_FCLK_DIV3] = &meson8b_fclk_div3.hw,
2783
-
[CLKID_FCLK_DIV4] = &meson8b_fclk_div4.hw,
2784
-
[CLKID_FCLK_DIV5] = &meson8b_fclk_div5.hw,
2785
-
[CLKID_FCLK_DIV7] = &meson8b_fclk_div7.hw,
2786
-
[CLKID_CPUCLK] = &meson8b_cpu_clk.hw,
2787
-
[CLKID_MPEG_SEL] = &meson8b_mpeg_clk_sel.hw,
2788
-
[CLKID_MPEG_DIV] = &meson8b_mpeg_clk_div.hw,
2789
-
[CLKID_CLK81] = &meson8b_clk81.hw,
2790
-
[CLKID_DDR] = &meson8b_ddr.hw,
2791
-
[CLKID_DOS] = &meson8b_dos.hw,
2792
-
[CLKID_ISA] = &meson8b_isa.hw,
2793
-
[CLKID_PL301] = &meson8b_pl301.hw,
2794
-
[CLKID_PERIPHS] = &meson8b_periphs.hw,
2795
-
[CLKID_SPICC] = &meson8b_spicc.hw,
2796
-
[CLKID_I2C] = &meson8b_i2c.hw,
2797
-
[CLKID_SAR_ADC] = &meson8b_sar_adc.hw,
2798
-
[CLKID_SMART_CARD] = &meson8b_smart_card.hw,
2799
-
[CLKID_RNG0] = &meson8b_rng0.hw,
2800
-
[CLKID_UART0] = &meson8b_uart0.hw,
2801
-
[CLKID_SDHC] = &meson8b_sdhc.hw,
2802
-
[CLKID_STREAM] = &meson8b_stream.hw,
2803
-
[CLKID_ASYNC_FIFO] = &meson8b_async_fifo.hw,
2804
-
[CLKID_SDIO] = &meson8b_sdio.hw,
2805
-
[CLKID_ABUF] = &meson8b_abuf.hw,
2806
-
[CLKID_HIU_IFACE] = &meson8b_hiu_iface.hw,
2807
-
[CLKID_ASSIST_MISC] = &meson8b_assist_misc.hw,
2808
-
[CLKID_SPI] = &meson8b_spi.hw,
2809
-
[CLKID_I2S_SPDIF] = &meson8b_i2s_spdif.hw,
2810
-
[CLKID_ETH] = &meson8b_eth.hw,
2811
-
[CLKID_DEMUX] = &meson8b_demux.hw,
2812
-
[CLKID_AIU_GLUE] = &meson8b_aiu_glue.hw,
2813
-
[CLKID_IEC958] = &meson8b_iec958.hw,
2814
-
[CLKID_I2S_OUT] = &meson8b_i2s_out.hw,
2815
-
[CLKID_AMCLK] = &meson8b_amclk.hw,
2816
-
[CLKID_AIFIFO2] = &meson8b_aififo2.hw,
2817
-
[CLKID_MIXER] = &meson8b_mixer.hw,
2818
-
[CLKID_MIXER_IFACE] = &meson8b_mixer_iface.hw,
2819
-
[CLKID_ADC] = &meson8b_adc.hw,
2820
-
[CLKID_BLKMV] = &meson8b_blkmv.hw,
2821
-
[CLKID_AIU] = &meson8b_aiu.hw,
2822
-
[CLKID_UART1] = &meson8b_uart1.hw,
2823
-
[CLKID_G2D] = &meson8b_g2d.hw,
2824
-
[CLKID_USB0] = &meson8b_usb0.hw,
2825
-
[CLKID_USB1] = &meson8b_usb1.hw,
2826
-
[CLKID_RESET] = &meson8b_reset.hw,
2827
-
[CLKID_NAND] = &meson8b_nand.hw,
2828
-
[CLKID_DOS_PARSER] = &meson8b_dos_parser.hw,
2829
-
[CLKID_USB] = &meson8b_usb.hw,
2830
-
[CLKID_VDIN1] = &meson8b_vdin1.hw,
2831
-
[CLKID_AHB_ARB0] = &meson8b_ahb_arb0.hw,
2832
-
[CLKID_EFUSE] = &meson8b_efuse.hw,
2833
-
[CLKID_BOOT_ROM] = &meson8b_boot_rom.hw,
2834
-
[CLKID_AHB_DATA_BUS] = &meson8b_ahb_data_bus.hw,
2835
-
[CLKID_AHB_CTRL_BUS] = &meson8b_ahb_ctrl_bus.hw,
2836
-
[CLKID_HDMI_INTR_SYNC] = &meson8b_hdmi_intr_sync.hw,
2837
-
[CLKID_HDMI_PCLK] = &meson8b_hdmi_pclk.hw,
2838
-
[CLKID_USB1_DDR_BRIDGE] = &meson8b_usb1_ddr_bridge.hw,
2839
-
[CLKID_USB0_DDR_BRIDGE] = &meson8b_usb0_ddr_bridge.hw,
2840
-
[CLKID_MMC_PCLK] = &meson8b_mmc_pclk.hw,
2841
-
[CLKID_DVIN] = &meson8b_dvin.hw,
2842
-
[CLKID_UART2] = &meson8b_uart2.hw,
2843
-
[CLKID_SANA] = &meson8b_sana.hw,
2844
-
[CLKID_VPU_INTR] = &meson8b_vpu_intr.hw,
2845
-
[CLKID_SEC_AHB_AHB3_BRIDGE] = &meson8b_sec_ahb_ahb3_bridge.hw,
2846
-
[CLKID_CLK81_A9] = &meson8b_clk81_a9.hw,
2847
-
[CLKID_VCLK2_VENCI0] = &meson8b_vclk2_venci0.hw,
2848
-
[CLKID_VCLK2_VENCI1] = &meson8b_vclk2_venci1.hw,
2849
-
[CLKID_VCLK2_VENCP0] = &meson8b_vclk2_vencp0.hw,
2850
-
[CLKID_VCLK2_VENCP1] = &meson8b_vclk2_vencp1.hw,
2851
-
[CLKID_GCLK_VENCI_INT] = &meson8b_gclk_venci_int.hw,
2852
-
[CLKID_GCLK_VENCP_INT] = &meson8b_gclk_vencp_int.hw,
2853
-
[CLKID_DAC_CLK] = &meson8b_dac_clk.hw,
2854
-
[CLKID_AOCLK_GATE] = &meson8b_aoclk_gate.hw,
2855
-
[CLKID_IEC958_GATE] = &meson8b_iec958_gate.hw,
2856
-
[CLKID_ENC480P] = &meson8b_enc480p.hw,
2857
-
[CLKID_RNG1] = &meson8b_rng1.hw,
2858
-
[CLKID_GCLK_VENCL_INT] = &meson8b_gclk_vencl_int.hw,
2859
-
[CLKID_VCLK2_VENCLMCC] = &meson8b_vclk2_venclmcc.hw,
2860
-
[CLKID_VCLK2_VENCL] = &meson8b_vclk2_vencl.hw,
2861
-
[CLKID_VCLK2_OTHER] = &meson8b_vclk2_other.hw,
2862
-
[CLKID_EDP] = &meson8b_edp.hw,
2863
-
[CLKID_AO_MEDIA_CPU] = &meson8b_ao_media_cpu.hw,
2864
-
[CLKID_AO_AHB_SRAM] = &meson8b_ao_ahb_sram.hw,
2865
-
[CLKID_AO_AHB_BUS] = &meson8b_ao_ahb_bus.hw,
2866
-
[CLKID_AO_IFACE] = &meson8b_ao_iface.hw,
2867
-
[CLKID_MPLL0] = &meson8b_mpll0.hw,
2868
-
[CLKID_MPLL1] = &meson8b_mpll1.hw,
2869
-
[CLKID_MPLL2] = &meson8b_mpll2.hw,
2870
-
[CLKID_MPLL0_DIV] = &meson8b_mpll0_div.hw,
2871
-
[CLKID_MPLL1_DIV] = &meson8b_mpll1_div.hw,
2872
-
[CLKID_MPLL2_DIV] = &meson8b_mpll2_div.hw,
2873
-
[CLKID_CPU_IN_SEL] = &meson8b_cpu_in_sel.hw,
2874
-
[CLKID_CPU_IN_DIV2] = &meson8b_cpu_in_div2.hw,
2875
-
[CLKID_CPU_IN_DIV3] = &meson8b_cpu_in_div3.hw,
2876
-
[CLKID_CPU_SCALE_DIV] = &meson8b_cpu_scale_div.hw,
2877
-
[CLKID_CPU_SCALE_OUT_SEL] = &meson8b_cpu_scale_out_sel.hw,
2878
-
[CLKID_MPLL_PREDIV] = &meson8b_mpll_prediv.hw,
2879
-
[CLKID_FCLK_DIV2_DIV] = &meson8b_fclk_div2_div.hw,
2880
-
[CLKID_FCLK_DIV3_DIV] = &meson8b_fclk_div3_div.hw,
2881
-
[CLKID_FCLK_DIV4_DIV] = &meson8b_fclk_div4_div.hw,
2882
-
[CLKID_FCLK_DIV5_DIV] = &meson8b_fclk_div5_div.hw,
2883
-
[CLKID_FCLK_DIV7_DIV] = &meson8b_fclk_div7_div.hw,
2884
-
[CLKID_NAND_SEL] = &meson8b_nand_clk_sel.hw,
2885
-
[CLKID_NAND_DIV] = &meson8b_nand_clk_div.hw,
2886
-
[CLKID_NAND_CLK] = &meson8b_nand_clk_gate.hw,
2887
-
[CLKID_PLL_FIXED_DCO] = &meson8b_fixed_pll_dco.hw,
2888
-
[CLKID_HDMI_PLL_DCO] = &meson8b_hdmi_pll_dco.hw,
2889
-
[CLKID_PLL_SYS_DCO] = &meson8b_sys_pll_dco.hw,
2890
-
[CLKID_CPU_CLK_DIV2] = &meson8b_cpu_clk_div2.hw,
2891
-
[CLKID_CPU_CLK_DIV3] = &meson8b_cpu_clk_div3.hw,
2892
-
[CLKID_CPU_CLK_DIV4] = &meson8b_cpu_clk_div4.hw,
2893
-
[CLKID_CPU_CLK_DIV5] = &meson8b_cpu_clk_div5.hw,
2894
-
[CLKID_CPU_CLK_DIV6] = &meson8b_cpu_clk_div6.hw,
2895
-
[CLKID_CPU_CLK_DIV7] = &meson8b_cpu_clk_div7.hw,
2896
-
[CLKID_CPU_CLK_DIV8] = &meson8b_cpu_clk_div8.hw,
2897
-
[CLKID_APB_SEL] = &meson8b_apb_clk_sel.hw,
2898
-
[CLKID_APB] = &meson8b_apb_clk_gate.hw,
2899
-
[CLKID_PERIPH_SEL] = &meson8b_periph_clk_sel.hw,
2900
-
[CLKID_PERIPH] = &meson8b_periph_clk_gate.hw,
2901
-
[CLKID_AXI_SEL] = &meson8b_axi_clk_sel.hw,
2902
-
[CLKID_AXI] = &meson8b_axi_clk_gate.hw,
2903
-
[CLKID_L2_DRAM_SEL] = &meson8b_l2_dram_clk_sel.hw,
2904
-
[CLKID_L2_DRAM] = &meson8b_l2_dram_clk_gate.hw,
2905
-
[CLKID_HDMI_PLL_LVDS_OUT] = &meson8b_hdmi_pll_lvds_out.hw,
2906
-
[CLKID_HDMI_PLL_HDMI_OUT] = &meson8b_hdmi_pll_hdmi_out.hw,
2907
-
[CLKID_VID_PLL_IN_SEL] = &meson8b_vid_pll_in_sel.hw,
2908
-
[CLKID_VID_PLL_IN_EN] = &meson8b_vid_pll_in_en.hw,
2909
-
[CLKID_VID_PLL_PRE_DIV] = &meson8b_vid_pll_pre_div.hw,
2910
-
[CLKID_VID_PLL_POST_DIV] = &meson8b_vid_pll_post_div.hw,
2911
-
[CLKID_VID_PLL_FINAL_DIV] = &meson8b_vid_pll_final_div.hw,
2912
-
[CLKID_VCLK_IN_SEL] = &meson8b_vclk_in_sel.hw,
2913
-
[CLKID_VCLK_IN_EN] = &meson8b_vclk_in_en.hw,
2914
-
[CLKID_VCLK_EN] = &meson8b_vclk_en.hw,
2915
-
[CLKID_VCLK_DIV1] = &meson8b_vclk_div1_gate.hw,
2916
-
[CLKID_VCLK_DIV2_DIV] = &meson8b_vclk_div2_div.hw,
2917
-
[CLKID_VCLK_DIV2] = &meson8b_vclk_div2_div_gate.hw,
2918
-
[CLKID_VCLK_DIV4_DIV] = &meson8b_vclk_div4_div.hw,
2919
-
[CLKID_VCLK_DIV4] = &meson8b_vclk_div4_div_gate.hw,
2920
-
[CLKID_VCLK_DIV6_DIV] = &meson8b_vclk_div6_div.hw,
2921
-
[CLKID_VCLK_DIV6] = &meson8b_vclk_div6_div_gate.hw,
2922
-
[CLKID_VCLK_DIV12_DIV] = &meson8b_vclk_div12_div.hw,
2923
-
[CLKID_VCLK_DIV12] = &meson8b_vclk_div12_div_gate.hw,
2924
-
[CLKID_VCLK2_IN_SEL] = &meson8b_vclk2_in_sel.hw,
2925
-
[CLKID_VCLK2_IN_EN] = &meson8b_vclk2_clk_in_en.hw,
2926
-
[CLKID_VCLK2_EN] = &meson8b_vclk2_clk_en.hw,
2927
-
[CLKID_VCLK2_DIV1] = &meson8b_vclk2_div1_gate.hw,
2928
-
[CLKID_VCLK2_DIV2_DIV] = &meson8b_vclk2_div2_div.hw,
2929
-
[CLKID_VCLK2_DIV2] = &meson8b_vclk2_div2_div_gate.hw,
2930
-
[CLKID_VCLK2_DIV4_DIV] = &meson8b_vclk2_div4_div.hw,
2931
-
[CLKID_VCLK2_DIV4] = &meson8b_vclk2_div4_div_gate.hw,
2932
-
[CLKID_VCLK2_DIV6_DIV] = &meson8b_vclk2_div6_div.hw,
2933
-
[CLKID_VCLK2_DIV6] = &meson8b_vclk2_div6_div_gate.hw,
2934
-
[CLKID_VCLK2_DIV12_DIV] = &meson8b_vclk2_div12_div.hw,
2935
-
[CLKID_VCLK2_DIV12] = &meson8b_vclk2_div12_div_gate.hw,
2936
-
[CLKID_CTS_ENCT_SEL] = &meson8b_cts_enct_sel.hw,
2937
-
[CLKID_CTS_ENCT] = &meson8b_cts_enct.hw,
2938
-
[CLKID_CTS_ENCP_SEL] = &meson8b_cts_encp_sel.hw,
2939
-
[CLKID_CTS_ENCP] = &meson8b_cts_encp.hw,
2940
-
[CLKID_CTS_ENCI_SEL] = &meson8b_cts_enci_sel.hw,
2941
-
[CLKID_CTS_ENCI] = &meson8b_cts_enci.hw,
2942
-
[CLKID_HDMI_TX_PIXEL_SEL] = &meson8b_hdmi_tx_pixel_sel.hw,
2943
-
[CLKID_HDMI_TX_PIXEL] = &meson8b_hdmi_tx_pixel.hw,
2944
-
[CLKID_CTS_ENCL_SEL] = &meson8b_cts_encl_sel.hw,
2945
-
[CLKID_CTS_ENCL] = &meson8b_cts_encl.hw,
2946
-
[CLKID_CTS_VDAC0_SEL] = &meson8b_cts_vdac0_sel.hw,
2947
-
[CLKID_CTS_VDAC0] = &meson8b_cts_vdac0.hw,
2948
-
[CLKID_HDMI_SYS_SEL] = &meson8b_hdmi_sys_sel.hw,
2949
-
[CLKID_HDMI_SYS_DIV] = &meson8b_hdmi_sys_div.hw,
2950
-
[CLKID_HDMI_SYS] = &meson8b_hdmi_sys.hw,
2951
-
[CLKID_MALI_0_SEL] = &meson8b_mali_0_sel.hw,
2952
-
[CLKID_MALI_0_DIV] = &meson8b_mali_0_div.hw,
2953
-
[CLKID_MALI] = &meson8b_mali_0.hw,
2954
-
[CLKID_VPU_0_SEL] = &meson8b_vpu_0_sel.hw,
2955
-
[CLKID_VPU_0_DIV] = &meson8b_vpu_0_div.hw,
2956
-
[CLKID_VPU] = &meson8b_vpu_0.hw,
2957
-
[CLKID_VDEC_1_SEL] = &meson8b_vdec_1_sel.hw,
2958
-
[CLKID_VDEC_1_1_DIV] = &meson8b_vdec_1_1_div.hw,
2959
-
[CLKID_VDEC_1] = &meson8b_vdec_1_1.hw,
2960
-
[CLKID_VDEC_HCODEC_SEL] = &meson8b_vdec_hcodec_sel.hw,
2961
-
[CLKID_VDEC_HCODEC_DIV] = &meson8b_vdec_hcodec_div.hw,
2962
-
[CLKID_VDEC_HCODEC] = &meson8b_vdec_hcodec.hw,
2963
-
[CLKID_VDEC_2_SEL] = &meson8b_vdec_2_sel.hw,
2964
-
[CLKID_VDEC_2_DIV] = &meson8b_vdec_2_div.hw,
2965
-
[CLKID_VDEC_2] = &meson8b_vdec_2.hw,
2966
-
[CLKID_VDEC_HEVC_SEL] = &meson8b_vdec_hevc_sel.hw,
2967
-
[CLKID_VDEC_HEVC_DIV] = &meson8b_vdec_hevc_div.hw,
2968
-
[CLKID_VDEC_HEVC_EN] = &meson8b_vdec_hevc_en.hw,
2969
-
[CLKID_VDEC_HEVC] = &meson8b_vdec_hevc.hw,
2970
-
[CLKID_CTS_AMCLK_SEL] = &meson8b_cts_amclk_sel.hw,
2971
-
[CLKID_CTS_AMCLK_DIV] = &meson8b_cts_amclk_div.hw,
2972
-
[CLKID_CTS_AMCLK] = &meson8b_cts_amclk.hw,
2973
-
[CLKID_CTS_MCLK_I958_SEL] = &meson8b_cts_mclk_i958_sel.hw,
2974
-
[CLKID_CTS_MCLK_I958_DIV] = &meson8b_cts_mclk_i958_div.hw,
2975
-
[CLKID_CTS_MCLK_I958] = &meson8b_cts_mclk_i958.hw,
2976
-
[CLKID_CTS_I958] = &meson8b_cts_i958.hw,
2977
-
[CLKID_VID_PLL_LVDS_EN] = &meson8b_vid_pll_lvds_en.hw,
2978
-
[CLKID_HDMI_PLL_DCO_IN] = &hdmi_pll_dco_in.hw,
2979
-
[CLK_NR_CLKS] = NULL,
2980
-
},
2981
-
.num = CLK_NR_CLKS,
2775
+
static struct clk_hw *meson8_hw_clks[] = {
2776
+
[CLKID_PLL_FIXED] = &meson8b_fixed_pll.hw,
2777
+
[CLKID_PLL_VID] = &meson8b_vid_pll.hw,
2778
+
[CLKID_PLL_SYS] = &meson8b_sys_pll.hw,
2779
+
[CLKID_FCLK_DIV2] = &meson8b_fclk_div2.hw,
2780
+
[CLKID_FCLK_DIV3] = &meson8b_fclk_div3.hw,
2781
+
[CLKID_FCLK_DIV4] = &meson8b_fclk_div4.hw,
2782
+
[CLKID_FCLK_DIV5] = &meson8b_fclk_div5.hw,
2783
+
[CLKID_FCLK_DIV7] = &meson8b_fclk_div7.hw,
2784
+
[CLKID_CPUCLK] = &meson8b_cpu_clk.hw,
2785
+
[CLKID_MPEG_SEL] = &meson8b_mpeg_clk_sel.hw,
2786
+
[CLKID_MPEG_DIV] = &meson8b_mpeg_clk_div.hw,
2787
+
[CLKID_CLK81] = &meson8b_clk81.hw,
2788
+
[CLKID_DDR] = &meson8b_ddr.hw,
2789
+
[CLKID_DOS] = &meson8b_dos.hw,
2790
+
[CLKID_ISA] = &meson8b_isa.hw,
2791
+
[CLKID_PL301] = &meson8b_pl301.hw,
2792
+
[CLKID_PERIPHS] = &meson8b_periphs.hw,
2793
+
[CLKID_SPICC] = &meson8b_spicc.hw,
2794
+
[CLKID_I2C] = &meson8b_i2c.hw,
2795
+
[CLKID_SAR_ADC] = &meson8b_sar_adc.hw,
2796
+
[CLKID_SMART_CARD] = &meson8b_smart_card.hw,
2797
+
[CLKID_RNG0] = &meson8b_rng0.hw,
2798
+
[CLKID_UART0] = &meson8b_uart0.hw,
2799
+
[CLKID_SDHC] = &meson8b_sdhc.hw,
2800
+
[CLKID_STREAM] = &meson8b_stream.hw,
2801
+
[CLKID_ASYNC_FIFO] = &meson8b_async_fifo.hw,
2802
+
[CLKID_SDIO] = &meson8b_sdio.hw,
2803
+
[CLKID_ABUF] = &meson8b_abuf.hw,
2804
+
[CLKID_HIU_IFACE] = &meson8b_hiu_iface.hw,
2805
+
[CLKID_ASSIST_MISC] = &meson8b_assist_misc.hw,
2806
+
[CLKID_SPI] = &meson8b_spi.hw,
2807
+
[CLKID_I2S_SPDIF] = &meson8b_i2s_spdif.hw,
2808
+
[CLKID_ETH] = &meson8b_eth.hw,
2809
+
[CLKID_DEMUX] = &meson8b_demux.hw,
2810
+
[CLKID_AIU_GLUE] = &meson8b_aiu_glue.hw,
2811
+
[CLKID_IEC958] = &meson8b_iec958.hw,
2812
+
[CLKID_I2S_OUT] = &meson8b_i2s_out.hw,
2813
+
[CLKID_AMCLK] = &meson8b_amclk.hw,
2814
+
[CLKID_AIFIFO2] = &meson8b_aififo2.hw,
2815
+
[CLKID_MIXER] = &meson8b_mixer.hw,
2816
+
[CLKID_MIXER_IFACE] = &meson8b_mixer_iface.hw,
2817
+
[CLKID_ADC] = &meson8b_adc.hw,
2818
+
[CLKID_BLKMV] = &meson8b_blkmv.hw,
2819
+
[CLKID_AIU] = &meson8b_aiu.hw,
2820
+
[CLKID_UART1] = &meson8b_uart1.hw,
2821
+
[CLKID_G2D] = &meson8b_g2d.hw,
2822
+
[CLKID_USB0] = &meson8b_usb0.hw,
2823
+
[CLKID_USB1] = &meson8b_usb1.hw,
2824
+
[CLKID_RESET] = &meson8b_reset.hw,
2825
+
[CLKID_NAND] = &meson8b_nand.hw,
2826
+
[CLKID_DOS_PARSER] = &meson8b_dos_parser.hw,
2827
+
[CLKID_USB] = &meson8b_usb.hw,
2828
+
[CLKID_VDIN1] = &meson8b_vdin1.hw,
2829
+
[CLKID_AHB_ARB0] = &meson8b_ahb_arb0.hw,
2830
+
[CLKID_EFUSE] = &meson8b_efuse.hw,
2831
+
[CLKID_BOOT_ROM] = &meson8b_boot_rom.hw,
2832
+
[CLKID_AHB_DATA_BUS] = &meson8b_ahb_data_bus.hw,
2833
+
[CLKID_AHB_CTRL_BUS] = &meson8b_ahb_ctrl_bus.hw,
2834
+
[CLKID_HDMI_INTR_SYNC] = &meson8b_hdmi_intr_sync.hw,
2835
+
[CLKID_HDMI_PCLK] = &meson8b_hdmi_pclk.hw,
2836
+
[CLKID_USB1_DDR_BRIDGE] = &meson8b_usb1_ddr_bridge.hw,
2837
+
[CLKID_USB0_DDR_BRIDGE] = &meson8b_usb0_ddr_bridge.hw,
2838
+
[CLKID_MMC_PCLK] = &meson8b_mmc_pclk.hw,
2839
+
[CLKID_DVIN] = &meson8b_dvin.hw,
2840
+
[CLKID_UART2] = &meson8b_uart2.hw,
2841
+
[CLKID_SANA] = &meson8b_sana.hw,
2842
+
[CLKID_VPU_INTR] = &meson8b_vpu_intr.hw,
2843
+
[CLKID_SEC_AHB_AHB3_BRIDGE] = &meson8b_sec_ahb_ahb3_bridge.hw,
2844
+
[CLKID_CLK81_A9] = &meson8b_clk81_a9.hw,
2845
+
[CLKID_VCLK2_VENCI0] = &meson8b_vclk2_venci0.hw,
2846
+
[CLKID_VCLK2_VENCI1] = &meson8b_vclk2_venci1.hw,
2847
+
[CLKID_VCLK2_VENCP0] = &meson8b_vclk2_vencp0.hw,
2848
+
[CLKID_VCLK2_VENCP1] = &meson8b_vclk2_vencp1.hw,
2849
+
[CLKID_GCLK_VENCI_INT] = &meson8b_gclk_venci_int.hw,
2850
+
[CLKID_GCLK_VENCP_INT] = &meson8b_gclk_vencp_int.hw,
2851
+
[CLKID_DAC_CLK] = &meson8b_dac_clk.hw,
2852
+
[CLKID_AOCLK_GATE] = &meson8b_aoclk_gate.hw,
2853
+
[CLKID_IEC958_GATE] = &meson8b_iec958_gate.hw,
2854
+
[CLKID_ENC480P] = &meson8b_enc480p.hw,
2855
+
[CLKID_RNG1] = &meson8b_rng1.hw,
2856
+
[CLKID_GCLK_VENCL_INT] = &meson8b_gclk_vencl_int.hw,
2857
+
[CLKID_VCLK2_VENCLMCC] = &meson8b_vclk2_venclmcc.hw,
2858
+
[CLKID_VCLK2_VENCL] = &meson8b_vclk2_vencl.hw,
2859
+
[CLKID_VCLK2_OTHER] = &meson8b_vclk2_other.hw,
2860
+
[CLKID_EDP] = &meson8b_edp.hw,
2861
+
[CLKID_AO_MEDIA_CPU] = &meson8b_ao_media_cpu.hw,
2862
+
[CLKID_AO_AHB_SRAM] = &meson8b_ao_ahb_sram.hw,
2863
+
[CLKID_AO_AHB_BUS] = &meson8b_ao_ahb_bus.hw,
2864
+
[CLKID_AO_IFACE] = &meson8b_ao_iface.hw,
2865
+
[CLKID_MPLL0] = &meson8b_mpll0.hw,
2866
+
[CLKID_MPLL1] = &meson8b_mpll1.hw,
2867
+
[CLKID_MPLL2] = &meson8b_mpll2.hw,
2868
+
[CLKID_MPLL0_DIV] = &meson8b_mpll0_div.hw,
2869
+
[CLKID_MPLL1_DIV] = &meson8b_mpll1_div.hw,
2870
+
[CLKID_MPLL2_DIV] = &meson8b_mpll2_div.hw,
2871
+
[CLKID_CPU_IN_SEL] = &meson8b_cpu_in_sel.hw,
2872
+
[CLKID_CPU_IN_DIV2] = &meson8b_cpu_in_div2.hw,
2873
+
[CLKID_CPU_IN_DIV3] = &meson8b_cpu_in_div3.hw,
2874
+
[CLKID_CPU_SCALE_DIV] = &meson8b_cpu_scale_div.hw,
2875
+
[CLKID_CPU_SCALE_OUT_SEL] = &meson8b_cpu_scale_out_sel.hw,
2876
+
[CLKID_MPLL_PREDIV] = &meson8b_mpll_prediv.hw,
2877
+
[CLKID_FCLK_DIV2_DIV] = &meson8b_fclk_div2_div.hw,
2878
+
[CLKID_FCLK_DIV3_DIV] = &meson8b_fclk_div3_div.hw,
2879
+
[CLKID_FCLK_DIV4_DIV] = &meson8b_fclk_div4_div.hw,
2880
+
[CLKID_FCLK_DIV5_DIV] = &meson8b_fclk_div5_div.hw,
2881
+
[CLKID_FCLK_DIV7_DIV] = &meson8b_fclk_div7_div.hw,
2882
+
[CLKID_NAND_SEL] = &meson8b_nand_clk_sel.hw,
2883
+
[CLKID_NAND_DIV] = &meson8b_nand_clk_div.hw,
2884
+
[CLKID_NAND_CLK] = &meson8b_nand_clk_gate.hw,
2885
+
[CLKID_PLL_FIXED_DCO] = &meson8b_fixed_pll_dco.hw,
2886
+
[CLKID_HDMI_PLL_DCO] = &meson8b_hdmi_pll_dco.hw,
2887
+
[CLKID_PLL_SYS_DCO] = &meson8b_sys_pll_dco.hw,
2888
+
[CLKID_CPU_CLK_DIV2] = &meson8b_cpu_clk_div2.hw,
2889
+
[CLKID_CPU_CLK_DIV3] = &meson8b_cpu_clk_div3.hw,
2890
+
[CLKID_CPU_CLK_DIV4] = &meson8b_cpu_clk_div4.hw,
2891
+
[CLKID_CPU_CLK_DIV5] = &meson8b_cpu_clk_div5.hw,
2892
+
[CLKID_CPU_CLK_DIV6] = &meson8b_cpu_clk_div6.hw,
2893
+
[CLKID_CPU_CLK_DIV7] = &meson8b_cpu_clk_div7.hw,
2894
+
[CLKID_CPU_CLK_DIV8] = &meson8b_cpu_clk_div8.hw,
2895
+
[CLKID_APB_SEL] = &meson8b_apb_clk_sel.hw,
2896
+
[CLKID_APB] = &meson8b_apb_clk_gate.hw,
2897
+
[CLKID_PERIPH_SEL] = &meson8b_periph_clk_sel.hw,
2898
+
[CLKID_PERIPH] = &meson8b_periph_clk_gate.hw,
2899
+
[CLKID_AXI_SEL] = &meson8b_axi_clk_sel.hw,
2900
+
[CLKID_AXI] = &meson8b_axi_clk_gate.hw,
2901
+
[CLKID_L2_DRAM_SEL] = &meson8b_l2_dram_clk_sel.hw,
2902
+
[CLKID_L2_DRAM] = &meson8b_l2_dram_clk_gate.hw,
2903
+
[CLKID_HDMI_PLL_LVDS_OUT] = &meson8b_hdmi_pll_lvds_out.hw,
2904
+
[CLKID_HDMI_PLL_HDMI_OUT] = &meson8b_hdmi_pll_hdmi_out.hw,
2905
+
[CLKID_VID_PLL_IN_SEL] = &meson8b_vid_pll_in_sel.hw,
2906
+
[CLKID_VID_PLL_IN_EN] = &meson8b_vid_pll_in_en.hw,
2907
+
[CLKID_VID_PLL_PRE_DIV] = &meson8b_vid_pll_pre_div.hw,
2908
+
[CLKID_VID_PLL_POST_DIV] = &meson8b_vid_pll_post_div.hw,
2909
+
[CLKID_VID_PLL_FINAL_DIV] = &meson8b_vid_pll_final_div.hw,
2910
+
[CLKID_VCLK_IN_SEL] = &meson8b_vclk_in_sel.hw,
2911
+
[CLKID_VCLK_IN_EN] = &meson8b_vclk_in_en.hw,
2912
+
[CLKID_VCLK_EN] = &meson8b_vclk_en.hw,
2913
+
[CLKID_VCLK_DIV1] = &meson8b_vclk_div1_gate.hw,
2914
+
[CLKID_VCLK_DIV2_DIV] = &meson8b_vclk_div2_div.hw,
2915
+
[CLKID_VCLK_DIV2] = &meson8b_vclk_div2_div_gate.hw,
2916
+
[CLKID_VCLK_DIV4_DIV] = &meson8b_vclk_div4_div.hw,
2917
+
[CLKID_VCLK_DIV4] = &meson8b_vclk_div4_div_gate.hw,
2918
+
[CLKID_VCLK_DIV6_DIV] = &meson8b_vclk_div6_div.hw,
2919
+
[CLKID_VCLK_DIV6] = &meson8b_vclk_div6_div_gate.hw,
2920
+
[CLKID_VCLK_DIV12_DIV] = &meson8b_vclk_div12_div.hw,
2921
+
[CLKID_VCLK_DIV12] = &meson8b_vclk_div12_div_gate.hw,
2922
+
[CLKID_VCLK2_IN_SEL] = &meson8b_vclk2_in_sel.hw,
2923
+
[CLKID_VCLK2_IN_EN] = &meson8b_vclk2_clk_in_en.hw,
2924
+
[CLKID_VCLK2_EN] = &meson8b_vclk2_clk_en.hw,
2925
+
[CLKID_VCLK2_DIV1] = &meson8b_vclk2_div1_gate.hw,
2926
+
[CLKID_VCLK2_DIV2_DIV] = &meson8b_vclk2_div2_div.hw,
2927
+
[CLKID_VCLK2_DIV2] = &meson8b_vclk2_div2_div_gate.hw,
2928
+
[CLKID_VCLK2_DIV4_DIV] = &meson8b_vclk2_div4_div.hw,
2929
+
[CLKID_VCLK2_DIV4] = &meson8b_vclk2_div4_div_gate.hw,
2930
+
[CLKID_VCLK2_DIV6_DIV] = &meson8b_vclk2_div6_div.hw,
2931
+
[CLKID_VCLK2_DIV6] = &meson8b_vclk2_div6_div_gate.hw,
2932
+
[CLKID_VCLK2_DIV12_DIV] = &meson8b_vclk2_div12_div.hw,
2933
+
[CLKID_VCLK2_DIV12] = &meson8b_vclk2_div12_div_gate.hw,
2934
+
[CLKID_CTS_ENCT_SEL] = &meson8b_cts_enct_sel.hw,
2935
+
[CLKID_CTS_ENCT] = &meson8b_cts_enct.hw,
2936
+
[CLKID_CTS_ENCP_SEL] = &meson8b_cts_encp_sel.hw,
2937
+
[CLKID_CTS_ENCP] = &meson8b_cts_encp.hw,
2938
+
[CLKID_CTS_ENCI_SEL] = &meson8b_cts_enci_sel.hw,
2939
+
[CLKID_CTS_ENCI] = &meson8b_cts_enci.hw,
2940
+
[CLKID_HDMI_TX_PIXEL_SEL] = &meson8b_hdmi_tx_pixel_sel.hw,
2941
+
[CLKID_HDMI_TX_PIXEL] = &meson8b_hdmi_tx_pixel.hw,
2942
+
[CLKID_CTS_ENCL_SEL] = &meson8b_cts_encl_sel.hw,
2943
+
[CLKID_CTS_ENCL] = &meson8b_cts_encl.hw,
2944
+
[CLKID_CTS_VDAC0_SEL] = &meson8b_cts_vdac0_sel.hw,
2945
+
[CLKID_CTS_VDAC0] = &meson8b_cts_vdac0.hw,
2946
+
[CLKID_HDMI_SYS_SEL] = &meson8b_hdmi_sys_sel.hw,
2947
+
[CLKID_HDMI_SYS_DIV] = &meson8b_hdmi_sys_div.hw,
2948
+
[CLKID_HDMI_SYS] = &meson8b_hdmi_sys.hw,
2949
+
[CLKID_MALI_0_SEL] = &meson8b_mali_0_sel.hw,
2950
+
[CLKID_MALI_0_DIV] = &meson8b_mali_0_div.hw,
2951
+
[CLKID_MALI] = &meson8b_mali_0.hw,
2952
+
[CLKID_VPU_0_SEL] = &meson8b_vpu_0_sel.hw,
2953
+
[CLKID_VPU_0_DIV] = &meson8b_vpu_0_div.hw,
2954
+
[CLKID_VPU] = &meson8b_vpu_0.hw,
2955
+
[CLKID_VDEC_1_SEL] = &meson8b_vdec_1_sel.hw,
2956
+
[CLKID_VDEC_1_1_DIV] = &meson8b_vdec_1_1_div.hw,
2957
+
[CLKID_VDEC_1] = &meson8b_vdec_1_1.hw,
2958
+
[CLKID_VDEC_HCODEC_SEL] = &meson8b_vdec_hcodec_sel.hw,
2959
+
[CLKID_VDEC_HCODEC_DIV] = &meson8b_vdec_hcodec_div.hw,
2960
+
[CLKID_VDEC_HCODEC] = &meson8b_vdec_hcodec.hw,
2961
+
[CLKID_VDEC_2_SEL] = &meson8b_vdec_2_sel.hw,
2962
+
[CLKID_VDEC_2_DIV] = &meson8b_vdec_2_div.hw,
2963
+
[CLKID_VDEC_2] = &meson8b_vdec_2.hw,
2964
+
[CLKID_VDEC_HEVC_SEL] = &meson8b_vdec_hevc_sel.hw,
2965
+
[CLKID_VDEC_HEVC_DIV] = &meson8b_vdec_hevc_div.hw,
2966
+
[CLKID_VDEC_HEVC_EN] = &meson8b_vdec_hevc_en.hw,
2967
+
[CLKID_VDEC_HEVC] = &meson8b_vdec_hevc.hw,
2968
+
[CLKID_CTS_AMCLK_SEL] = &meson8b_cts_amclk_sel.hw,
2969
+
[CLKID_CTS_AMCLK_DIV] = &meson8b_cts_amclk_div.hw,
2970
+
[CLKID_CTS_AMCLK] = &meson8b_cts_amclk.hw,
2971
+
[CLKID_CTS_MCLK_I958_SEL] = &meson8b_cts_mclk_i958_sel.hw,
2972
+
[CLKID_CTS_MCLK_I958_DIV] = &meson8b_cts_mclk_i958_div.hw,
2973
+
[CLKID_CTS_MCLK_I958] = &meson8b_cts_mclk_i958.hw,
2974
+
[CLKID_CTS_I958] = &meson8b_cts_i958.hw,
2975
+
[CLKID_VID_PLL_LVDS_EN] = &meson8b_vid_pll_lvds_en.hw,
2976
+
[CLKID_HDMI_PLL_DCO_IN] = &hdmi_pll_dco_in.hw,
2982
2977
};
2983
2978
2984
-
static struct clk_hw_onecell_data meson8b_hw_onecell_data = {
2985
-
.hws = {
2986
-
[CLKID_PLL_FIXED] = &meson8b_fixed_pll.hw,
2987
-
[CLKID_PLL_VID] = &meson8b_vid_pll.hw,
2988
-
[CLKID_PLL_SYS] = &meson8b_sys_pll.hw,
2989
-
[CLKID_FCLK_DIV2] = &meson8b_fclk_div2.hw,
2990
-
[CLKID_FCLK_DIV3] = &meson8b_fclk_div3.hw,
2991
-
[CLKID_FCLK_DIV4] = &meson8b_fclk_div4.hw,
2992
-
[CLKID_FCLK_DIV5] = &meson8b_fclk_div5.hw,
2993
-
[CLKID_FCLK_DIV7] = &meson8b_fclk_div7.hw,
2994
-
[CLKID_CPUCLK] = &meson8b_cpu_clk.hw,
2995
-
[CLKID_MPEG_SEL] = &meson8b_mpeg_clk_sel.hw,
2996
-
[CLKID_MPEG_DIV] = &meson8b_mpeg_clk_div.hw,
2997
-
[CLKID_CLK81] = &meson8b_clk81.hw,
2998
-
[CLKID_DDR] = &meson8b_ddr.hw,
2999
-
[CLKID_DOS] = &meson8b_dos.hw,
3000
-
[CLKID_ISA] = &meson8b_isa.hw,
3001
-
[CLKID_PL301] = &meson8b_pl301.hw,
3002
-
[CLKID_PERIPHS] = &meson8b_periphs.hw,
3003
-
[CLKID_SPICC] = &meson8b_spicc.hw,
3004
-
[CLKID_I2C] = &meson8b_i2c.hw,
3005
-
[CLKID_SAR_ADC] = &meson8b_sar_adc.hw,
3006
-
[CLKID_SMART_CARD] = &meson8b_smart_card.hw,
3007
-
[CLKID_RNG0] = &meson8b_rng0.hw,
3008
-
[CLKID_UART0] = &meson8b_uart0.hw,
3009
-
[CLKID_SDHC] = &meson8b_sdhc.hw,
3010
-
[CLKID_STREAM] = &meson8b_stream.hw,
3011
-
[CLKID_ASYNC_FIFO] = &meson8b_async_fifo.hw,
3012
-
[CLKID_SDIO] = &meson8b_sdio.hw,
3013
-
[CLKID_ABUF] = &meson8b_abuf.hw,
3014
-
[CLKID_HIU_IFACE] = &meson8b_hiu_iface.hw,
3015
-
[CLKID_ASSIST_MISC] = &meson8b_assist_misc.hw,
3016
-
[CLKID_SPI] = &meson8b_spi.hw,
3017
-
[CLKID_I2S_SPDIF] = &meson8b_i2s_spdif.hw,
3018
-
[CLKID_ETH] = &meson8b_eth.hw,
3019
-
[CLKID_DEMUX] = &meson8b_demux.hw,
3020
-
[CLKID_AIU_GLUE] = &meson8b_aiu_glue.hw,
3021
-
[CLKID_IEC958] = &meson8b_iec958.hw,
3022
-
[CLKID_I2S_OUT] = &meson8b_i2s_out.hw,
3023
-
[CLKID_AMCLK] = &meson8b_amclk.hw,
3024
-
[CLKID_AIFIFO2] = &meson8b_aififo2.hw,
3025
-
[CLKID_MIXER] = &meson8b_mixer.hw,
3026
-
[CLKID_MIXER_IFACE] = &meson8b_mixer_iface.hw,
3027
-
[CLKID_ADC] = &meson8b_adc.hw,
3028
-
[CLKID_BLKMV] = &meson8b_blkmv.hw,
3029
-
[CLKID_AIU] = &meson8b_aiu.hw,
3030
-
[CLKID_UART1] = &meson8b_uart1.hw,
3031
-
[CLKID_G2D] = &meson8b_g2d.hw,
3032
-
[CLKID_USB0] = &meson8b_usb0.hw,
3033
-
[CLKID_USB1] = &meson8b_usb1.hw,
3034
-
[CLKID_RESET] = &meson8b_reset.hw,
3035
-
[CLKID_NAND] = &meson8b_nand.hw,
3036
-
[CLKID_DOS_PARSER] = &meson8b_dos_parser.hw,
3037
-
[CLKID_USB] = &meson8b_usb.hw,
3038
-
[CLKID_VDIN1] = &meson8b_vdin1.hw,
3039
-
[CLKID_AHB_ARB0] = &meson8b_ahb_arb0.hw,
3040
-
[CLKID_EFUSE] = &meson8b_efuse.hw,
3041
-
[CLKID_BOOT_ROM] = &meson8b_boot_rom.hw,
3042
-
[CLKID_AHB_DATA_BUS] = &meson8b_ahb_data_bus.hw,
3043
-
[CLKID_AHB_CTRL_BUS] = &meson8b_ahb_ctrl_bus.hw,
3044
-
[CLKID_HDMI_INTR_SYNC] = &meson8b_hdmi_intr_sync.hw,
3045
-
[CLKID_HDMI_PCLK] = &meson8b_hdmi_pclk.hw,
3046
-
[CLKID_USB1_DDR_BRIDGE] = &meson8b_usb1_ddr_bridge.hw,
3047
-
[CLKID_USB0_DDR_BRIDGE] = &meson8b_usb0_ddr_bridge.hw,
3048
-
[CLKID_MMC_PCLK] = &meson8b_mmc_pclk.hw,
3049
-
[CLKID_DVIN] = &meson8b_dvin.hw,
3050
-
[CLKID_UART2] = &meson8b_uart2.hw,
3051
-
[CLKID_SANA] = &meson8b_sana.hw,
3052
-
[CLKID_VPU_INTR] = &meson8b_vpu_intr.hw,
3053
-
[CLKID_SEC_AHB_AHB3_BRIDGE] = &meson8b_sec_ahb_ahb3_bridge.hw,
3054
-
[CLKID_CLK81_A9] = &meson8b_clk81_a9.hw,
3055
-
[CLKID_VCLK2_VENCI0] = &meson8b_vclk2_venci0.hw,
3056
-
[CLKID_VCLK2_VENCI1] = &meson8b_vclk2_venci1.hw,
3057
-
[CLKID_VCLK2_VENCP0] = &meson8b_vclk2_vencp0.hw,
3058
-
[CLKID_VCLK2_VENCP1] = &meson8b_vclk2_vencp1.hw,
3059
-
[CLKID_GCLK_VENCI_INT] = &meson8b_gclk_venci_int.hw,
3060
-
[CLKID_GCLK_VENCP_INT] = &meson8b_gclk_vencp_int.hw,
3061
-
[CLKID_DAC_CLK] = &meson8b_dac_clk.hw,
3062
-
[CLKID_AOCLK_GATE] = &meson8b_aoclk_gate.hw,
3063
-
[CLKID_IEC958_GATE] = &meson8b_iec958_gate.hw,
3064
-
[CLKID_ENC480P] = &meson8b_enc480p.hw,
3065
-
[CLKID_RNG1] = &meson8b_rng1.hw,
3066
-
[CLKID_GCLK_VENCL_INT] = &meson8b_gclk_vencl_int.hw,
3067
-
[CLKID_VCLK2_VENCLMCC] = &meson8b_vclk2_venclmcc.hw,
3068
-
[CLKID_VCLK2_VENCL] = &meson8b_vclk2_vencl.hw,
3069
-
[CLKID_VCLK2_OTHER] = &meson8b_vclk2_other.hw,
3070
-
[CLKID_EDP] = &meson8b_edp.hw,
3071
-
[CLKID_AO_MEDIA_CPU] = &meson8b_ao_media_cpu.hw,
3072
-
[CLKID_AO_AHB_SRAM] = &meson8b_ao_ahb_sram.hw,
3073
-
[CLKID_AO_AHB_BUS] = &meson8b_ao_ahb_bus.hw,
3074
-
[CLKID_AO_IFACE] = &meson8b_ao_iface.hw,
3075
-
[CLKID_MPLL0] = &meson8b_mpll0.hw,
3076
-
[CLKID_MPLL1] = &meson8b_mpll1.hw,
3077
-
[CLKID_MPLL2] = &meson8b_mpll2.hw,
3078
-
[CLKID_MPLL0_DIV] = &meson8b_mpll0_div.hw,
3079
-
[CLKID_MPLL1_DIV] = &meson8b_mpll1_div.hw,
3080
-
[CLKID_MPLL2_DIV] = &meson8b_mpll2_div.hw,
3081
-
[CLKID_CPU_IN_SEL] = &meson8b_cpu_in_sel.hw,
3082
-
[CLKID_CPU_IN_DIV2] = &meson8b_cpu_in_div2.hw,
3083
-
[CLKID_CPU_IN_DIV3] = &meson8b_cpu_in_div3.hw,
3084
-
[CLKID_CPU_SCALE_DIV] = &meson8b_cpu_scale_div.hw,
3085
-
[CLKID_CPU_SCALE_OUT_SEL] = &meson8b_cpu_scale_out_sel.hw,
3086
-
[CLKID_MPLL_PREDIV] = &meson8b_mpll_prediv.hw,
3087
-
[CLKID_FCLK_DIV2_DIV] = &meson8b_fclk_div2_div.hw,
3088
-
[CLKID_FCLK_DIV3_DIV] = &meson8b_fclk_div3_div.hw,
3089
-
[CLKID_FCLK_DIV4_DIV] = &meson8b_fclk_div4_div.hw,
3090
-
[CLKID_FCLK_DIV5_DIV] = &meson8b_fclk_div5_div.hw,
3091
-
[CLKID_FCLK_DIV7_DIV] = &meson8b_fclk_div7_div.hw,
3092
-
[CLKID_NAND_SEL] = &meson8b_nand_clk_sel.hw,
3093
-
[CLKID_NAND_DIV] = &meson8b_nand_clk_div.hw,
3094
-
[CLKID_NAND_CLK] = &meson8b_nand_clk_gate.hw,
3095
-
[CLKID_PLL_FIXED_DCO] = &meson8b_fixed_pll_dco.hw,
3096
-
[CLKID_HDMI_PLL_DCO] = &meson8b_hdmi_pll_dco.hw,
3097
-
[CLKID_PLL_SYS_DCO] = &meson8b_sys_pll_dco.hw,
3098
-
[CLKID_CPU_CLK_DIV2] = &meson8b_cpu_clk_div2.hw,
3099
-
[CLKID_CPU_CLK_DIV3] = &meson8b_cpu_clk_div3.hw,
3100
-
[CLKID_CPU_CLK_DIV4] = &meson8b_cpu_clk_div4.hw,
3101
-
[CLKID_CPU_CLK_DIV5] = &meson8b_cpu_clk_div5.hw,
3102
-
[CLKID_CPU_CLK_DIV6] = &meson8b_cpu_clk_div6.hw,
3103
-
[CLKID_CPU_CLK_DIV7] = &meson8b_cpu_clk_div7.hw,
3104
-
[CLKID_CPU_CLK_DIV8] = &meson8b_cpu_clk_div8.hw,
3105
-
[CLKID_APB_SEL] = &meson8b_apb_clk_sel.hw,
3106
-
[CLKID_APB] = &meson8b_apb_clk_gate.hw,
3107
-
[CLKID_PERIPH_SEL] = &meson8b_periph_clk_sel.hw,
3108
-
[CLKID_PERIPH] = &meson8b_periph_clk_gate.hw,
3109
-
[CLKID_AXI_SEL] = &meson8b_axi_clk_sel.hw,
3110
-
[CLKID_AXI] = &meson8b_axi_clk_gate.hw,
3111
-
[CLKID_L2_DRAM_SEL] = &meson8b_l2_dram_clk_sel.hw,
3112
-
[CLKID_L2_DRAM] = &meson8b_l2_dram_clk_gate.hw,
3113
-
[CLKID_HDMI_PLL_LVDS_OUT] = &meson8b_hdmi_pll_lvds_out.hw,
3114
-
[CLKID_HDMI_PLL_HDMI_OUT] = &meson8b_hdmi_pll_hdmi_out.hw,
3115
-
[CLKID_VID_PLL_IN_SEL] = &meson8b_vid_pll_in_sel.hw,
3116
-
[CLKID_VID_PLL_IN_EN] = &meson8b_vid_pll_in_en.hw,
3117
-
[CLKID_VID_PLL_PRE_DIV] = &meson8b_vid_pll_pre_div.hw,
3118
-
[CLKID_VID_PLL_POST_DIV] = &meson8b_vid_pll_post_div.hw,
3119
-
[CLKID_VID_PLL_FINAL_DIV] = &meson8b_vid_pll_final_div.hw,
3120
-
[CLKID_VCLK_IN_SEL] = &meson8b_vclk_in_sel.hw,
3121
-
[CLKID_VCLK_IN_EN] = &meson8b_vclk_in_en.hw,
3122
-
[CLKID_VCLK_EN] = &meson8b_vclk_en.hw,
3123
-
[CLKID_VCLK_DIV1] = &meson8b_vclk_div1_gate.hw,
3124
-
[CLKID_VCLK_DIV2_DIV] = &meson8b_vclk_div2_div.hw,
3125
-
[CLKID_VCLK_DIV2] = &meson8b_vclk_div2_div_gate.hw,
3126
-
[CLKID_VCLK_DIV4_DIV] = &meson8b_vclk_div4_div.hw,
3127
-
[CLKID_VCLK_DIV4] = &meson8b_vclk_div4_div_gate.hw,
3128
-
[CLKID_VCLK_DIV6_DIV] = &meson8b_vclk_div6_div.hw,
3129
-
[CLKID_VCLK_DIV6] = &meson8b_vclk_div6_div_gate.hw,
3130
-
[CLKID_VCLK_DIV12_DIV] = &meson8b_vclk_div12_div.hw,
3131
-
[CLKID_VCLK_DIV12] = &meson8b_vclk_div12_div_gate.hw,
3132
-
[CLKID_VCLK2_IN_SEL] = &meson8b_vclk2_in_sel.hw,
3133
-
[CLKID_VCLK2_IN_EN] = &meson8b_vclk2_clk_in_en.hw,
3134
-
[CLKID_VCLK2_EN] = &meson8b_vclk2_clk_en.hw,
3135
-
[CLKID_VCLK2_DIV1] = &meson8b_vclk2_div1_gate.hw,
3136
-
[CLKID_VCLK2_DIV2_DIV] = &meson8b_vclk2_div2_div.hw,
3137
-
[CLKID_VCLK2_DIV2] = &meson8b_vclk2_div2_div_gate.hw,
3138
-
[CLKID_VCLK2_DIV4_DIV] = &meson8b_vclk2_div4_div.hw,
3139
-
[CLKID_VCLK2_DIV4] = &meson8b_vclk2_div4_div_gate.hw,
3140
-
[CLKID_VCLK2_DIV6_DIV] = &meson8b_vclk2_div6_div.hw,
3141
-
[CLKID_VCLK2_DIV6] = &meson8b_vclk2_div6_div_gate.hw,
3142
-
[CLKID_VCLK2_DIV12_DIV] = &meson8b_vclk2_div12_div.hw,
3143
-
[CLKID_VCLK2_DIV12] = &meson8b_vclk2_div12_div_gate.hw,
3144
-
[CLKID_CTS_ENCT_SEL] = &meson8b_cts_enct_sel.hw,
3145
-
[CLKID_CTS_ENCT] = &meson8b_cts_enct.hw,
3146
-
[CLKID_CTS_ENCP_SEL] = &meson8b_cts_encp_sel.hw,
3147
-
[CLKID_CTS_ENCP] = &meson8b_cts_encp.hw,
3148
-
[CLKID_CTS_ENCI_SEL] = &meson8b_cts_enci_sel.hw,
3149
-
[CLKID_CTS_ENCI] = &meson8b_cts_enci.hw,
3150
-
[CLKID_HDMI_TX_PIXEL_SEL] = &meson8b_hdmi_tx_pixel_sel.hw,
3151
-
[CLKID_HDMI_TX_PIXEL] = &meson8b_hdmi_tx_pixel.hw,
3152
-
[CLKID_CTS_ENCL_SEL] = &meson8b_cts_encl_sel.hw,
3153
-
[CLKID_CTS_ENCL] = &meson8b_cts_encl.hw,
3154
-
[CLKID_CTS_VDAC0_SEL] = &meson8b_cts_vdac0_sel.hw,
3155
-
[CLKID_CTS_VDAC0] = &meson8b_cts_vdac0.hw,
3156
-
[CLKID_HDMI_SYS_SEL] = &meson8b_hdmi_sys_sel.hw,
3157
-
[CLKID_HDMI_SYS_DIV] = &meson8b_hdmi_sys_div.hw,
3158
-
[CLKID_HDMI_SYS] = &meson8b_hdmi_sys.hw,
3159
-
[CLKID_MALI_0_SEL] = &meson8b_mali_0_sel.hw,
3160
-
[CLKID_MALI_0_DIV] = &meson8b_mali_0_div.hw,
3161
-
[CLKID_MALI_0] = &meson8b_mali_0.hw,
3162
-
[CLKID_MALI_1_SEL] = &meson8b_mali_1_sel.hw,
3163
-
[CLKID_MALI_1_DIV] = &meson8b_mali_1_div.hw,
3164
-
[CLKID_MALI_1] = &meson8b_mali_1.hw,
3165
-
[CLKID_MALI] = &meson8b_mali.hw,
3166
-
[CLKID_VPU_0_SEL] = &meson8b_vpu_0_sel.hw,
3167
-
[CLKID_VPU_0_DIV] = &meson8b_vpu_0_div.hw,
3168
-
[CLKID_VPU_0] = &meson8b_vpu_0.hw,
3169
-
[CLKID_VPU_1_SEL] = &meson8b_vpu_1_sel.hw,
3170
-
[CLKID_VPU_1_DIV] = &meson8b_vpu_1_div.hw,
3171
-
[CLKID_VPU_1] = &meson8b_vpu_1.hw,
3172
-
[CLKID_VPU] = &meson8b_vpu.hw,
3173
-
[CLKID_VDEC_1_SEL] = &meson8b_vdec_1_sel.hw,
3174
-
[CLKID_VDEC_1_1_DIV] = &meson8b_vdec_1_1_div.hw,
3175
-
[CLKID_VDEC_1_1] = &meson8b_vdec_1_1.hw,
3176
-
[CLKID_VDEC_1_2_DIV] = &meson8b_vdec_1_2_div.hw,
3177
-
[CLKID_VDEC_1_2] = &meson8b_vdec_1_2.hw,
3178
-
[CLKID_VDEC_1] = &meson8b_vdec_1.hw,
3179
-
[CLKID_VDEC_HCODEC_SEL] = &meson8b_vdec_hcodec_sel.hw,
3180
-
[CLKID_VDEC_HCODEC_DIV] = &meson8b_vdec_hcodec_div.hw,
3181
-
[CLKID_VDEC_HCODEC] = &meson8b_vdec_hcodec.hw,
3182
-
[CLKID_VDEC_2_SEL] = &meson8b_vdec_2_sel.hw,
3183
-
[CLKID_VDEC_2_DIV] = &meson8b_vdec_2_div.hw,
3184
-
[CLKID_VDEC_2] = &meson8b_vdec_2.hw,
3185
-
[CLKID_VDEC_HEVC_SEL] = &meson8b_vdec_hevc_sel.hw,
3186
-
[CLKID_VDEC_HEVC_DIV] = &meson8b_vdec_hevc_div.hw,
3187
-
[CLKID_VDEC_HEVC_EN] = &meson8b_vdec_hevc_en.hw,
3188
-
[CLKID_VDEC_HEVC] = &meson8b_vdec_hevc.hw,
3189
-
[CLKID_CTS_AMCLK_SEL] = &meson8b_cts_amclk_sel.hw,
3190
-
[CLKID_CTS_AMCLK_DIV] = &meson8b_cts_amclk_div.hw,
3191
-
[CLKID_CTS_AMCLK] = &meson8b_cts_amclk.hw,
3192
-
[CLKID_CTS_MCLK_I958_SEL] = &meson8b_cts_mclk_i958_sel.hw,
3193
-
[CLKID_CTS_MCLK_I958_DIV] = &meson8b_cts_mclk_i958_div.hw,
3194
-
[CLKID_CTS_MCLK_I958] = &meson8b_cts_mclk_i958.hw,
3195
-
[CLKID_CTS_I958] = &meson8b_cts_i958.hw,
3196
-
[CLKID_VID_PLL_LVDS_EN] = &meson8b_vid_pll_lvds_en.hw,
3197
-
[CLKID_HDMI_PLL_DCO_IN] = &hdmi_pll_dco_in.hw,
3198
-
[CLK_NR_CLKS] = NULL,
3199
-
},
3200
-
.num = CLK_NR_CLKS,
2979
+
static struct clk_hw *meson8b_hw_clks[] = {
2980
+
[CLKID_PLL_FIXED] = &meson8b_fixed_pll.hw,
2981
+
[CLKID_PLL_VID] = &meson8b_vid_pll.hw,
2982
+
[CLKID_PLL_SYS] = &meson8b_sys_pll.hw,
2983
+
[CLKID_FCLK_DIV2] = &meson8b_fclk_div2.hw,
2984
+
[CLKID_FCLK_DIV3] = &meson8b_fclk_div3.hw,
2985
+
[CLKID_FCLK_DIV4] = &meson8b_fclk_div4.hw,
2986
+
[CLKID_FCLK_DIV5] = &meson8b_fclk_div5.hw,
2987
+
[CLKID_FCLK_DIV7] = &meson8b_fclk_div7.hw,
2988
+
[CLKID_CPUCLK] = &meson8b_cpu_clk.hw,
2989
+
[CLKID_MPEG_SEL] = &meson8b_mpeg_clk_sel.hw,
2990
+
[CLKID_MPEG_DIV] = &meson8b_mpeg_clk_div.hw,
2991
+
[CLKID_CLK81] = &meson8b_clk81.hw,
2992
+
[CLKID_DDR] = &meson8b_ddr.hw,
2993
+
[CLKID_DOS] = &meson8b_dos.hw,
2994
+
[CLKID_ISA] = &meson8b_isa.hw,
2995
+
[CLKID_PL301] = &meson8b_pl301.hw,
2996
+
[CLKID_PERIPHS] = &meson8b_periphs.hw,
2997
+
[CLKID_SPICC] = &meson8b_spicc.hw,
2998
+
[CLKID_I2C] = &meson8b_i2c.hw,
2999
+
[CLKID_SAR_ADC] = &meson8b_sar_adc.hw,
3000
+
[CLKID_SMART_CARD] = &meson8b_smart_card.hw,
3001
+
[CLKID_RNG0] = &meson8b_rng0.hw,
3002
+
[CLKID_UART0] = &meson8b_uart0.hw,
3003
+
[CLKID_SDHC] = &meson8b_sdhc.hw,
3004
+
[CLKID_STREAM] = &meson8b_stream.hw,
3005
+
[CLKID_ASYNC_FIFO] = &meson8b_async_fifo.hw,
3006
+
[CLKID_SDIO] = &meson8b_sdio.hw,
3007
+
[CLKID_ABUF] = &meson8b_abuf.hw,
3008
+
[CLKID_HIU_IFACE] = &meson8b_hiu_iface.hw,
3009
+
[CLKID_ASSIST_MISC] = &meson8b_assist_misc.hw,
3010
+
[CLKID_SPI] = &meson8b_spi.hw,
3011
+
[CLKID_I2S_SPDIF] = &meson8b_i2s_spdif.hw,
3012
+
[CLKID_ETH] = &meson8b_eth.hw,
3013
+
[CLKID_DEMUX] = &meson8b_demux.hw,
3014
+
[CLKID_AIU_GLUE] = &meson8b_aiu_glue.hw,
3015
+
[CLKID_IEC958] = &meson8b_iec958.hw,
3016
+
[CLKID_I2S_OUT] = &meson8b_i2s_out.hw,
3017
+
[CLKID_AMCLK] = &meson8b_amclk.hw,
3018
+
[CLKID_AIFIFO2] = &meson8b_aififo2.hw,
3019
+
[CLKID_MIXER] = &meson8b_mixer.hw,
3020
+
[CLKID_MIXER_IFACE] = &meson8b_mixer_iface.hw,
3021
+
[CLKID_ADC] = &meson8b_adc.hw,
3022
+
[CLKID_BLKMV] = &meson8b_blkmv.hw,
3023
+
[CLKID_AIU] = &meson8b_aiu.hw,
3024
+
[CLKID_UART1] = &meson8b_uart1.hw,
3025
+
[CLKID_G2D] = &meson8b_g2d.hw,
3026
+
[CLKID_USB0] = &meson8b_usb0.hw,
3027
+
[CLKID_USB1] = &meson8b_usb1.hw,
3028
+
[CLKID_RESET] = &meson8b_reset.hw,
3029
+
[CLKID_NAND] = &meson8b_nand.hw,
3030
+
[CLKID_DOS_PARSER] = &meson8b_dos_parser.hw,
3031
+
[CLKID_USB] = &meson8b_usb.hw,
3032
+
[CLKID_VDIN1] = &meson8b_vdin1.hw,
3033
+
[CLKID_AHB_ARB0] = &meson8b_ahb_arb0.hw,
3034
+
[CLKID_EFUSE] = &meson8b_efuse.hw,
3035
+
[CLKID_BOOT_ROM] = &meson8b_boot_rom.hw,
3036
+
[CLKID_AHB_DATA_BUS] = &meson8b_ahb_data_bus.hw,
3037
+
[CLKID_AHB_CTRL_BUS] = &meson8b_ahb_ctrl_bus.hw,
3038
+
[CLKID_HDMI_INTR_SYNC] = &meson8b_hdmi_intr_sync.hw,
3039
+
[CLKID_HDMI_PCLK] = &meson8b_hdmi_pclk.hw,
3040
+
[CLKID_USB1_DDR_BRIDGE] = &meson8b_usb1_ddr_bridge.hw,
3041
+
[CLKID_USB0_DDR_BRIDGE] = &meson8b_usb0_ddr_bridge.hw,
3042
+
[CLKID_MMC_PCLK] = &meson8b_mmc_pclk.hw,
3043
+
[CLKID_DVIN] = &meson8b_dvin.hw,
3044
+
[CLKID_UART2] = &meson8b_uart2.hw,
3045
+
[CLKID_SANA] = &meson8b_sana.hw,
3046
+
[CLKID_VPU_INTR] = &meson8b_vpu_intr.hw,
3047
+
[CLKID_SEC_AHB_AHB3_BRIDGE] = &meson8b_sec_ahb_ahb3_bridge.hw,
3048
+
[CLKID_CLK81_A9] = &meson8b_clk81_a9.hw,
3049
+
[CLKID_VCLK2_VENCI0] = &meson8b_vclk2_venci0.hw,
3050
+
[CLKID_VCLK2_VENCI1] = &meson8b_vclk2_venci1.hw,
3051
+
[CLKID_VCLK2_VENCP0] = &meson8b_vclk2_vencp0.hw,
3052
+
[CLKID_VCLK2_VENCP1] = &meson8b_vclk2_vencp1.hw,
3053
+
[CLKID_GCLK_VENCI_INT] = &meson8b_gclk_venci_int.hw,
3054
+
[CLKID_GCLK_VENCP_INT] = &meson8b_gclk_vencp_int.hw,
3055
+
[CLKID_DAC_CLK] = &meson8b_dac_clk.hw,
3056
+
[CLKID_AOCLK_GATE] = &meson8b_aoclk_gate.hw,
3057
+
[CLKID_IEC958_GATE] = &meson8b_iec958_gate.hw,
3058
+
[CLKID_ENC480P] = &meson8b_enc480p.hw,
3059
+
[CLKID_RNG1] = &meson8b_rng1.hw,
3060
+
[CLKID_GCLK_VENCL_INT] = &meson8b_gclk_vencl_int.hw,
3061
+
[CLKID_VCLK2_VENCLMCC] = &meson8b_vclk2_venclmcc.hw,
3062
+
[CLKID_VCLK2_VENCL] = &meson8b_vclk2_vencl.hw,
3063
+
[CLKID_VCLK2_OTHER] = &meson8b_vclk2_other.hw,
3064
+
[CLKID_EDP] = &meson8b_edp.hw,
3065
+
[CLKID_AO_MEDIA_CPU] = &meson8b_ao_media_cpu.hw,
3066
+
[CLKID_AO_AHB_SRAM] = &meson8b_ao_ahb_sram.hw,
3067
+
[CLKID_AO_AHB_BUS] = &meson8b_ao_ahb_bus.hw,
3068
+
[CLKID_AO_IFACE] = &meson8b_ao_iface.hw,
3069
+
[CLKID_MPLL0] = &meson8b_mpll0.hw,
3070
+
[CLKID_MPLL1] = &meson8b_mpll1.hw,
3071
+
[CLKID_MPLL2] = &meson8b_mpll2.hw,
3072
+
[CLKID_MPLL0_DIV] = &meson8b_mpll0_div.hw,
3073
+
[CLKID_MPLL1_DIV] = &meson8b_mpll1_div.hw,
3074
+
[CLKID_MPLL2_DIV] = &meson8b_mpll2_div.hw,
3075
+
[CLKID_CPU_IN_SEL] = &meson8b_cpu_in_sel.hw,
3076
+
[CLKID_CPU_IN_DIV2] = &meson8b_cpu_in_div2.hw,
3077
+
[CLKID_CPU_IN_DIV3] = &meson8b_cpu_in_div3.hw,
3078
+
[CLKID_CPU_SCALE_DIV] = &meson8b_cpu_scale_div.hw,
3079
+
[CLKID_CPU_SCALE_OUT_SEL] = &meson8b_cpu_scale_out_sel.hw,
3080
+
[CLKID_MPLL_PREDIV] = &meson8b_mpll_prediv.hw,
3081
+
[CLKID_FCLK_DIV2_DIV] = &meson8b_fclk_div2_div.hw,
3082
+
[CLKID_FCLK_DIV3_DIV] = &meson8b_fclk_div3_div.hw,
3083
+
[CLKID_FCLK_DIV4_DIV] = &meson8b_fclk_div4_div.hw,
3084
+
[CLKID_FCLK_DIV5_DIV] = &meson8b_fclk_div5_div.hw,
3085
+
[CLKID_FCLK_DIV7_DIV] = &meson8b_fclk_div7_div.hw,
3086
+
[CLKID_NAND_SEL] = &meson8b_nand_clk_sel.hw,
3087
+
[CLKID_NAND_DIV] = &meson8b_nand_clk_div.hw,
3088
+
[CLKID_NAND_CLK] = &meson8b_nand_clk_gate.hw,
3089
+
[CLKID_PLL_FIXED_DCO] = &meson8b_fixed_pll_dco.hw,
3090
+
[CLKID_HDMI_PLL_DCO] = &meson8b_hdmi_pll_dco.hw,
3091
+
[CLKID_PLL_SYS_DCO] = &meson8b_sys_pll_dco.hw,
3092
+
[CLKID_CPU_CLK_DIV2] = &meson8b_cpu_clk_div2.hw,
3093
+
[CLKID_CPU_CLK_DIV3] = &meson8b_cpu_clk_div3.hw,
3094
+
[CLKID_CPU_CLK_DIV4] = &meson8b_cpu_clk_div4.hw,
3095
+
[CLKID_CPU_CLK_DIV5] = &meson8b_cpu_clk_div5.hw,
3096
+
[CLKID_CPU_CLK_DIV6] = &meson8b_cpu_clk_div6.hw,
3097
+
[CLKID_CPU_CLK_DIV7] = &meson8b_cpu_clk_div7.hw,
3098
+
[CLKID_CPU_CLK_DIV8] = &meson8b_cpu_clk_div8.hw,
3099
+
[CLKID_APB_SEL] = &meson8b_apb_clk_sel.hw,
3100
+
[CLKID_APB] = &meson8b_apb_clk_gate.hw,
3101
+
[CLKID_PERIPH_SEL] = &meson8b_periph_clk_sel.hw,
3102
+
[CLKID_PERIPH] = &meson8b_periph_clk_gate.hw,
3103
+
[CLKID_AXI_SEL] = &meson8b_axi_clk_sel.hw,
3104
+
[CLKID_AXI] = &meson8b_axi_clk_gate.hw,
3105
+
[CLKID_L2_DRAM_SEL] = &meson8b_l2_dram_clk_sel.hw,
3106
+
[CLKID_L2_DRAM] = &meson8b_l2_dram_clk_gate.hw,
3107
+
[CLKID_HDMI_PLL_LVDS_OUT] = &meson8b_hdmi_pll_lvds_out.hw,
3108
+
[CLKID_HDMI_PLL_HDMI_OUT] = &meson8b_hdmi_pll_hdmi_out.hw,
3109
+
[CLKID_VID_PLL_IN_SEL] = &meson8b_vid_pll_in_sel.hw,
3110
+
[CLKID_VID_PLL_IN_EN] = &meson8b_vid_pll_in_en.hw,
3111
+
[CLKID_VID_PLL_PRE_DIV] = &meson8b_vid_pll_pre_div.hw,
3112
+
[CLKID_VID_PLL_POST_DIV] = &meson8b_vid_pll_post_div.hw,
3113
+
[CLKID_VID_PLL_FINAL_DIV] = &meson8b_vid_pll_final_div.hw,
3114
+
[CLKID_VCLK_IN_SEL] = &meson8b_vclk_in_sel.hw,
3115
+
[CLKID_VCLK_IN_EN] = &meson8b_vclk_in_en.hw,
3116
+
[CLKID_VCLK_EN] = &meson8b_vclk_en.hw,
3117
+
[CLKID_VCLK_DIV1] = &meson8b_vclk_div1_gate.hw,
3118
+
[CLKID_VCLK_DIV2_DIV] = &meson8b_vclk_div2_div.hw,
3119
+
[CLKID_VCLK_DIV2] = &meson8b_vclk_div2_div_gate.hw,
3120
+
[CLKID_VCLK_DIV4_DIV] = &meson8b_vclk_div4_div.hw,
3121
+
[CLKID_VCLK_DIV4] = &meson8b_vclk_div4_div_gate.hw,
3122
+
[CLKID_VCLK_DIV6_DIV] = &meson8b_vclk_div6_div.hw,
3123
+
[CLKID_VCLK_DIV6] = &meson8b_vclk_div6_div_gate.hw,
3124
+
[CLKID_VCLK_DIV12_DIV] = &meson8b_vclk_div12_div.hw,
3125
+
[CLKID_VCLK_DIV12] = &meson8b_vclk_div12_div_gate.hw,
3126
+
[CLKID_VCLK2_IN_SEL] = &meson8b_vclk2_in_sel.hw,
3127
+
[CLKID_VCLK2_IN_EN] = &meson8b_vclk2_clk_in_en.hw,
3128
+
[CLKID_VCLK2_EN] = &meson8b_vclk2_clk_en.hw,
3129
+
[CLKID_VCLK2_DIV1] = &meson8b_vclk2_div1_gate.hw,
3130
+
[CLKID_VCLK2_DIV2_DIV] = &meson8b_vclk2_div2_div.hw,
3131
+
[CLKID_VCLK2_DIV2] = &meson8b_vclk2_div2_div_gate.hw,
3132
+
[CLKID_VCLK2_DIV4_DIV] = &meson8b_vclk2_div4_div.hw,
3133
+
[CLKID_VCLK2_DIV4] = &meson8b_vclk2_div4_div_gate.hw,
3134
+
[CLKID_VCLK2_DIV6_DIV] = &meson8b_vclk2_div6_div.hw,
3135
+
[CLKID_VCLK2_DIV6] = &meson8b_vclk2_div6_div_gate.hw,
3136
+
[CLKID_VCLK2_DIV12_DIV] = &meson8b_vclk2_div12_div.hw,
3137
+
[CLKID_VCLK2_DIV12] = &meson8b_vclk2_div12_div_gate.hw,
3138
+
[CLKID_CTS_ENCT_SEL] = &meson8b_cts_enct_sel.hw,
3139
+
[CLKID_CTS_ENCT] = &meson8b_cts_enct.hw,
3140
+
[CLKID_CTS_ENCP_SEL] = &meson8b_cts_encp_sel.hw,
3141
+
[CLKID_CTS_ENCP] = &meson8b_cts_encp.hw,
3142
+
[CLKID_CTS_ENCI_SEL] = &meson8b_cts_enci_sel.hw,
3143
+
[CLKID_CTS_ENCI] = &meson8b_cts_enci.hw,
3144
+
[CLKID_HDMI_TX_PIXEL_SEL] = &meson8b_hdmi_tx_pixel_sel.hw,
3145
+
[CLKID_HDMI_TX_PIXEL] = &meson8b_hdmi_tx_pixel.hw,
3146
+
[CLKID_CTS_ENCL_SEL] = &meson8b_cts_encl_sel.hw,
3147
+
[CLKID_CTS_ENCL] = &meson8b_cts_encl.hw,
3148
+
[CLKID_CTS_VDAC0_SEL] = &meson8b_cts_vdac0_sel.hw,
3149
+
[CLKID_CTS_VDAC0] = &meson8b_cts_vdac0.hw,
3150
+
[CLKID_HDMI_SYS_SEL] = &meson8b_hdmi_sys_sel.hw,
3151
+
[CLKID_HDMI_SYS_DIV] = &meson8b_hdmi_sys_div.hw,
3152
+
[CLKID_HDMI_SYS] = &meson8b_hdmi_sys.hw,
3153
+
[CLKID_MALI_0_SEL] = &meson8b_mali_0_sel.hw,
3154
+
[CLKID_MALI_0_DIV] = &meson8b_mali_0_div.hw,
3155
+
[CLKID_MALI_0] = &meson8b_mali_0.hw,
3156
+
[CLKID_MALI_1_SEL] = &meson8b_mali_1_sel.hw,
3157
+
[CLKID_MALI_1_DIV] = &meson8b_mali_1_div.hw,
3158
+
[CLKID_MALI_1] = &meson8b_mali_1.hw,
3159
+
[CLKID_MALI] = &meson8b_mali.hw,
3160
+
[CLKID_VPU_0_SEL] = &meson8b_vpu_0_sel.hw,
3161
+
[CLKID_VPU_0_DIV] = &meson8b_vpu_0_div.hw,
3162
+
[CLKID_VPU_0] = &meson8b_vpu_0.hw,
3163
+
[CLKID_VPU_1_SEL] = &meson8b_vpu_1_sel.hw,
3164
+
[CLKID_VPU_1_DIV] = &meson8b_vpu_1_div.hw,
3165
+
[CLKID_VPU_1] = &meson8b_vpu_1.hw,
3166
+
[CLKID_VPU] = &meson8b_vpu.hw,
3167
+
[CLKID_VDEC_1_SEL] = &meson8b_vdec_1_sel.hw,
3168
+
[CLKID_VDEC_1_1_DIV] = &meson8b_vdec_1_1_div.hw,
3169
+
[CLKID_VDEC_1_1] = &meson8b_vdec_1_1.hw,
3170
+
[CLKID_VDEC_1_2_DIV] = &meson8b_vdec_1_2_div.hw,
3171
+
[CLKID_VDEC_1_2] = &meson8b_vdec_1_2.hw,
3172
+
[CLKID_VDEC_1] = &meson8b_vdec_1.hw,
3173
+
[CLKID_VDEC_HCODEC_SEL] = &meson8b_vdec_hcodec_sel.hw,
3174
+
[CLKID_VDEC_HCODEC_DIV] = &meson8b_vdec_hcodec_div.hw,
3175
+
[CLKID_VDEC_HCODEC] = &meson8b_vdec_hcodec.hw,
3176
+
[CLKID_VDEC_2_SEL] = &meson8b_vdec_2_sel.hw,
3177
+
[CLKID_VDEC_2_DIV] = &meson8b_vdec_2_div.hw,
3178
+
[CLKID_VDEC_2] = &meson8b_vdec_2.hw,
3179
+
[CLKID_VDEC_HEVC_SEL] = &meson8b_vdec_hevc_sel.hw,
3180
+
[CLKID_VDEC_HEVC_DIV] = &meson8b_vdec_hevc_div.hw,
3181
+
[CLKID_VDEC_HEVC_EN] = &meson8b_vdec_hevc_en.hw,
3182
+
[CLKID_VDEC_HEVC] = &meson8b_vdec_hevc.hw,
3183
+
[CLKID_CTS_AMCLK_SEL] = &meson8b_cts_amclk_sel.hw,
3184
+
[CLKID_CTS_AMCLK_DIV] = &meson8b_cts_amclk_div.hw,
3185
+
[CLKID_CTS_AMCLK] = &meson8b_cts_amclk.hw,
3186
+
[CLKID_CTS_MCLK_I958_SEL] = &meson8b_cts_mclk_i958_sel.hw,
3187
+
[CLKID_CTS_MCLK_I958_DIV] = &meson8b_cts_mclk_i958_div.hw,
3188
+
[CLKID_CTS_MCLK_I958] = &meson8b_cts_mclk_i958.hw,
3189
+
[CLKID_CTS_I958] = &meson8b_cts_i958.hw,
3190
+
[CLKID_VID_PLL_LVDS_EN] = &meson8b_vid_pll_lvds_en.hw,
3191
+
[CLKID_HDMI_PLL_DCO_IN] = &hdmi_pll_dco_in.hw,
3201
3192
};
3202
3193
3203
-
static struct clk_hw_onecell_data meson8m2_hw_onecell_data = {
3204
-
.hws = {
3205
-
[CLKID_PLL_FIXED] = &meson8b_fixed_pll.hw,
3206
-
[CLKID_PLL_VID] = &meson8b_vid_pll.hw,
3207
-
[CLKID_PLL_SYS] = &meson8b_sys_pll.hw,
3208
-
[CLKID_FCLK_DIV2] = &meson8b_fclk_div2.hw,
3209
-
[CLKID_FCLK_DIV3] = &meson8b_fclk_div3.hw,
3210
-
[CLKID_FCLK_DIV4] = &meson8b_fclk_div4.hw,
3211
-
[CLKID_FCLK_DIV5] = &meson8b_fclk_div5.hw,
3212
-
[CLKID_FCLK_DIV7] = &meson8b_fclk_div7.hw,
3213
-
[CLKID_CPUCLK] = &meson8b_cpu_clk.hw,
3214
-
[CLKID_MPEG_SEL] = &meson8b_mpeg_clk_sel.hw,
3215
-
[CLKID_MPEG_DIV] = &meson8b_mpeg_clk_div.hw,
3216
-
[CLKID_CLK81] = &meson8b_clk81.hw,
3217
-
[CLKID_DDR] = &meson8b_ddr.hw,
3218
-
[CLKID_DOS] = &meson8b_dos.hw,
3219
-
[CLKID_ISA] = &meson8b_isa.hw,
3220
-
[CLKID_PL301] = &meson8b_pl301.hw,
3221
-
[CLKID_PERIPHS] = &meson8b_periphs.hw,
3222
-
[CLKID_SPICC] = &meson8b_spicc.hw,
3223
-
[CLKID_I2C] = &meson8b_i2c.hw,
3224
-
[CLKID_SAR_ADC] = &meson8b_sar_adc.hw,
3225
-
[CLKID_SMART_CARD] = &meson8b_smart_card.hw,
3226
-
[CLKID_RNG0] = &meson8b_rng0.hw,
3227
-
[CLKID_UART0] = &meson8b_uart0.hw,
3228
-
[CLKID_SDHC] = &meson8b_sdhc.hw,
3229
-
[CLKID_STREAM] = &meson8b_stream.hw,
3230
-
[CLKID_ASYNC_FIFO] = &meson8b_async_fifo.hw,
3231
-
[CLKID_SDIO] = &meson8b_sdio.hw,
3232
-
[CLKID_ABUF] = &meson8b_abuf.hw,
3233
-
[CLKID_HIU_IFACE] = &meson8b_hiu_iface.hw,
3234
-
[CLKID_ASSIST_MISC] = &meson8b_assist_misc.hw,
3235
-
[CLKID_SPI] = &meson8b_spi.hw,
3236
-
[CLKID_I2S_SPDIF] = &meson8b_i2s_spdif.hw,
3237
-
[CLKID_ETH] = &meson8b_eth.hw,
3238
-
[CLKID_DEMUX] = &meson8b_demux.hw,
3239
-
[CLKID_AIU_GLUE] = &meson8b_aiu_glue.hw,
3240
-
[CLKID_IEC958] = &meson8b_iec958.hw,
3241
-
[CLKID_I2S_OUT] = &meson8b_i2s_out.hw,
3242
-
[CLKID_AMCLK] = &meson8b_amclk.hw,
3243
-
[CLKID_AIFIFO2] = &meson8b_aififo2.hw,
3244
-
[CLKID_MIXER] = &meson8b_mixer.hw,
3245
-
[CLKID_MIXER_IFACE] = &meson8b_mixer_iface.hw,
3246
-
[CLKID_ADC] = &meson8b_adc.hw,
3247
-
[CLKID_BLKMV] = &meson8b_blkmv.hw,
3248
-
[CLKID_AIU] = &meson8b_aiu.hw,
3249
-
[CLKID_UART1] = &meson8b_uart1.hw,
3250
-
[CLKID_G2D] = &meson8b_g2d.hw,
3251
-
[CLKID_USB0] = &meson8b_usb0.hw,
3252
-
[CLKID_USB1] = &meson8b_usb1.hw,
3253
-
[CLKID_RESET] = &meson8b_reset.hw,
3254
-
[CLKID_NAND] = &meson8b_nand.hw,
3255
-
[CLKID_DOS_PARSER] = &meson8b_dos_parser.hw,
3256
-
[CLKID_USB] = &meson8b_usb.hw,
3257
-
[CLKID_VDIN1] = &meson8b_vdin1.hw,
3258
-
[CLKID_AHB_ARB0] = &meson8b_ahb_arb0.hw,
3259
-
[CLKID_EFUSE] = &meson8b_efuse.hw,
3260
-
[CLKID_BOOT_ROM] = &meson8b_boot_rom.hw,
3261
-
[CLKID_AHB_DATA_BUS] = &meson8b_ahb_data_bus.hw,
3262
-
[CLKID_AHB_CTRL_BUS] = &meson8b_ahb_ctrl_bus.hw,
3263
-
[CLKID_HDMI_INTR_SYNC] = &meson8b_hdmi_intr_sync.hw,
3264
-
[CLKID_HDMI_PCLK] = &meson8b_hdmi_pclk.hw,
3265
-
[CLKID_USB1_DDR_BRIDGE] = &meson8b_usb1_ddr_bridge.hw,
3266
-
[CLKID_USB0_DDR_BRIDGE] = &meson8b_usb0_ddr_bridge.hw,
3267
-
[CLKID_MMC_PCLK] = &meson8b_mmc_pclk.hw,
3268
-
[CLKID_DVIN] = &meson8b_dvin.hw,
3269
-
[CLKID_UART2] = &meson8b_uart2.hw,
3270
-
[CLKID_SANA] = &meson8b_sana.hw,
3271
-
[CLKID_VPU_INTR] = &meson8b_vpu_intr.hw,
3272
-
[CLKID_SEC_AHB_AHB3_BRIDGE] = &meson8b_sec_ahb_ahb3_bridge.hw,
3273
-
[CLKID_CLK81_A9] = &meson8b_clk81_a9.hw,
3274
-
[CLKID_VCLK2_VENCI0] = &meson8b_vclk2_venci0.hw,
3275
-
[CLKID_VCLK2_VENCI1] = &meson8b_vclk2_venci1.hw,
3276
-
[CLKID_VCLK2_VENCP0] = &meson8b_vclk2_vencp0.hw,
3277
-
[CLKID_VCLK2_VENCP1] = &meson8b_vclk2_vencp1.hw,
3278
-
[CLKID_GCLK_VENCI_INT] = &meson8b_gclk_venci_int.hw,
3279
-
[CLKID_GCLK_VENCP_INT] = &meson8b_gclk_vencp_int.hw,
3280
-
[CLKID_DAC_CLK] = &meson8b_dac_clk.hw,
3281
-
[CLKID_AOCLK_GATE] = &meson8b_aoclk_gate.hw,
3282
-
[CLKID_IEC958_GATE] = &meson8b_iec958_gate.hw,
3283
-
[CLKID_ENC480P] = &meson8b_enc480p.hw,
3284
-
[CLKID_RNG1] = &meson8b_rng1.hw,
3285
-
[CLKID_GCLK_VENCL_INT] = &meson8b_gclk_vencl_int.hw,
3286
-
[CLKID_VCLK2_VENCLMCC] = &meson8b_vclk2_venclmcc.hw,
3287
-
[CLKID_VCLK2_VENCL] = &meson8b_vclk2_vencl.hw,
3288
-
[CLKID_VCLK2_OTHER] = &meson8b_vclk2_other.hw,
3289
-
[CLKID_EDP] = &meson8b_edp.hw,
3290
-
[CLKID_AO_MEDIA_CPU] = &meson8b_ao_media_cpu.hw,
3291
-
[CLKID_AO_AHB_SRAM] = &meson8b_ao_ahb_sram.hw,
3292
-
[CLKID_AO_AHB_BUS] = &meson8b_ao_ahb_bus.hw,
3293
-
[CLKID_AO_IFACE] = &meson8b_ao_iface.hw,
3294
-
[CLKID_MPLL0] = &meson8b_mpll0.hw,
3295
-
[CLKID_MPLL1] = &meson8b_mpll1.hw,
3296
-
[CLKID_MPLL2] = &meson8b_mpll2.hw,
3297
-
[CLKID_MPLL0_DIV] = &meson8b_mpll0_div.hw,
3298
-
[CLKID_MPLL1_DIV] = &meson8b_mpll1_div.hw,
3299
-
[CLKID_MPLL2_DIV] = &meson8b_mpll2_div.hw,
3300
-
[CLKID_CPU_IN_SEL] = &meson8b_cpu_in_sel.hw,
3301
-
[CLKID_CPU_IN_DIV2] = &meson8b_cpu_in_div2.hw,
3302
-
[CLKID_CPU_IN_DIV3] = &meson8b_cpu_in_div3.hw,
3303
-
[CLKID_CPU_SCALE_DIV] = &meson8b_cpu_scale_div.hw,
3304
-
[CLKID_CPU_SCALE_OUT_SEL] = &meson8b_cpu_scale_out_sel.hw,
3305
-
[CLKID_MPLL_PREDIV] = &meson8b_mpll_prediv.hw,
3306
-
[CLKID_FCLK_DIV2_DIV] = &meson8b_fclk_div2_div.hw,
3307
-
[CLKID_FCLK_DIV3_DIV] = &meson8b_fclk_div3_div.hw,
3308
-
[CLKID_FCLK_DIV4_DIV] = &meson8b_fclk_div4_div.hw,
3309
-
[CLKID_FCLK_DIV5_DIV] = &meson8b_fclk_div5_div.hw,
3310
-
[CLKID_FCLK_DIV7_DIV] = &meson8b_fclk_div7_div.hw,
3311
-
[CLKID_NAND_SEL] = &meson8b_nand_clk_sel.hw,
3312
-
[CLKID_NAND_DIV] = &meson8b_nand_clk_div.hw,
3313
-
[CLKID_NAND_CLK] = &meson8b_nand_clk_gate.hw,
3314
-
[CLKID_PLL_FIXED_DCO] = &meson8b_fixed_pll_dco.hw,
3315
-
[CLKID_HDMI_PLL_DCO] = &meson8b_hdmi_pll_dco.hw,
3316
-
[CLKID_PLL_SYS_DCO] = &meson8b_sys_pll_dco.hw,
3317
-
[CLKID_CPU_CLK_DIV2] = &meson8b_cpu_clk_div2.hw,
3318
-
[CLKID_CPU_CLK_DIV3] = &meson8b_cpu_clk_div3.hw,
3319
-
[CLKID_CPU_CLK_DIV4] = &meson8b_cpu_clk_div4.hw,
3320
-
[CLKID_CPU_CLK_DIV5] = &meson8b_cpu_clk_div5.hw,
3321
-
[CLKID_CPU_CLK_DIV6] = &meson8b_cpu_clk_div6.hw,
3322
-
[CLKID_CPU_CLK_DIV7] = &meson8b_cpu_clk_div7.hw,
3323
-
[CLKID_CPU_CLK_DIV8] = &meson8b_cpu_clk_div8.hw,
3324
-
[CLKID_APB_SEL] = &meson8b_apb_clk_sel.hw,
3325
-
[CLKID_APB] = &meson8b_apb_clk_gate.hw,
3326
-
[CLKID_PERIPH_SEL] = &meson8b_periph_clk_sel.hw,
3327
-
[CLKID_PERIPH] = &meson8b_periph_clk_gate.hw,
3328
-
[CLKID_AXI_SEL] = &meson8b_axi_clk_sel.hw,
3329
-
[CLKID_AXI] = &meson8b_axi_clk_gate.hw,
3330
-
[CLKID_L2_DRAM_SEL] = &meson8b_l2_dram_clk_sel.hw,
3331
-
[CLKID_L2_DRAM] = &meson8b_l2_dram_clk_gate.hw,
3332
-
[CLKID_HDMI_PLL_LVDS_OUT] = &meson8b_hdmi_pll_lvds_out.hw,
3333
-
[CLKID_HDMI_PLL_HDMI_OUT] = &meson8b_hdmi_pll_hdmi_out.hw,
3334
-
[CLKID_VID_PLL_IN_SEL] = &meson8b_vid_pll_in_sel.hw,
3335
-
[CLKID_VID_PLL_IN_EN] = &meson8b_vid_pll_in_en.hw,
3336
-
[CLKID_VID_PLL_PRE_DIV] = &meson8b_vid_pll_pre_div.hw,
3337
-
[CLKID_VID_PLL_POST_DIV] = &meson8b_vid_pll_post_div.hw,
3338
-
[CLKID_VID_PLL_FINAL_DIV] = &meson8b_vid_pll_final_div.hw,
3339
-
[CLKID_VCLK_IN_SEL] = &meson8b_vclk_in_sel.hw,
3340
-
[CLKID_VCLK_IN_EN] = &meson8b_vclk_in_en.hw,
3341
-
[CLKID_VCLK_EN] = &meson8b_vclk_en.hw,
3342
-
[CLKID_VCLK_DIV1] = &meson8b_vclk_div1_gate.hw,
3343
-
[CLKID_VCLK_DIV2_DIV] = &meson8b_vclk_div2_div.hw,
3344
-
[CLKID_VCLK_DIV2] = &meson8b_vclk_div2_div_gate.hw,
3345
-
[CLKID_VCLK_DIV4_DIV] = &meson8b_vclk_div4_div.hw,
3346
-
[CLKID_VCLK_DIV4] = &meson8b_vclk_div4_div_gate.hw,
3347
-
[CLKID_VCLK_DIV6_DIV] = &meson8b_vclk_div6_div.hw,
3348
-
[CLKID_VCLK_DIV6] = &meson8b_vclk_div6_div_gate.hw,
3349
-
[CLKID_VCLK_DIV12_DIV] = &meson8b_vclk_div12_div.hw,
3350
-
[CLKID_VCLK_DIV12] = &meson8b_vclk_div12_div_gate.hw,
3351
-
[CLKID_VCLK2_IN_SEL] = &meson8b_vclk2_in_sel.hw,
3352
-
[CLKID_VCLK2_IN_EN] = &meson8b_vclk2_clk_in_en.hw,
3353
-
[CLKID_VCLK2_EN] = &meson8b_vclk2_clk_en.hw,
3354
-
[CLKID_VCLK2_DIV1] = &meson8b_vclk2_div1_gate.hw,
3355
-
[CLKID_VCLK2_DIV2_DIV] = &meson8b_vclk2_div2_div.hw,
3356
-
[CLKID_VCLK2_DIV2] = &meson8b_vclk2_div2_div_gate.hw,
3357
-
[CLKID_VCLK2_DIV4_DIV] = &meson8b_vclk2_div4_div.hw,
3358
-
[CLKID_VCLK2_DIV4] = &meson8b_vclk2_div4_div_gate.hw,
3359
-
[CLKID_VCLK2_DIV6_DIV] = &meson8b_vclk2_div6_div.hw,
3360
-
[CLKID_VCLK2_DIV6] = &meson8b_vclk2_div6_div_gate.hw,
3361
-
[CLKID_VCLK2_DIV12_DIV] = &meson8b_vclk2_div12_div.hw,
3362
-
[CLKID_VCLK2_DIV12] = &meson8b_vclk2_div12_div_gate.hw,
3363
-
[CLKID_CTS_ENCT_SEL] = &meson8b_cts_enct_sel.hw,
3364
-
[CLKID_CTS_ENCT] = &meson8b_cts_enct.hw,
3365
-
[CLKID_CTS_ENCP_SEL] = &meson8b_cts_encp_sel.hw,
3366
-
[CLKID_CTS_ENCP] = &meson8b_cts_encp.hw,
3367
-
[CLKID_CTS_ENCI_SEL] = &meson8b_cts_enci_sel.hw,
3368
-
[CLKID_CTS_ENCI] = &meson8b_cts_enci.hw,
3369
-
[CLKID_HDMI_TX_PIXEL_SEL] = &meson8b_hdmi_tx_pixel_sel.hw,
3370
-
[CLKID_HDMI_TX_PIXEL] = &meson8b_hdmi_tx_pixel.hw,
3371
-
[CLKID_CTS_ENCL_SEL] = &meson8b_cts_encl_sel.hw,
3372
-
[CLKID_CTS_ENCL] = &meson8b_cts_encl.hw,
3373
-
[CLKID_CTS_VDAC0_SEL] = &meson8b_cts_vdac0_sel.hw,
3374
-
[CLKID_CTS_VDAC0] = &meson8b_cts_vdac0.hw,
3375
-
[CLKID_HDMI_SYS_SEL] = &meson8b_hdmi_sys_sel.hw,
3376
-
[CLKID_HDMI_SYS_DIV] = &meson8b_hdmi_sys_div.hw,
3377
-
[CLKID_HDMI_SYS] = &meson8b_hdmi_sys.hw,
3378
-
[CLKID_MALI_0_SEL] = &meson8b_mali_0_sel.hw,
3379
-
[CLKID_MALI_0_DIV] = &meson8b_mali_0_div.hw,
3380
-
[CLKID_MALI_0] = &meson8b_mali_0.hw,
3381
-
[CLKID_MALI_1_SEL] = &meson8b_mali_1_sel.hw,
3382
-
[CLKID_MALI_1_DIV] = &meson8b_mali_1_div.hw,
3383
-
[CLKID_MALI_1] = &meson8b_mali_1.hw,
3384
-
[CLKID_MALI] = &meson8b_mali.hw,
3385
-
[CLKID_GP_PLL_DCO] = &meson8m2_gp_pll_dco.hw,
3386
-
[CLKID_GP_PLL] = &meson8m2_gp_pll.hw,
3387
-
[CLKID_VPU_0_SEL] = &meson8m2_vpu_0_sel.hw,
3388
-
[CLKID_VPU_0_DIV] = &meson8b_vpu_0_div.hw,
3389
-
[CLKID_VPU_0] = &meson8b_vpu_0.hw,
3390
-
[CLKID_VPU_1_SEL] = &meson8m2_vpu_1_sel.hw,
3391
-
[CLKID_VPU_1_DIV] = &meson8b_vpu_1_div.hw,
3392
-
[CLKID_VPU_1] = &meson8b_vpu_1.hw,
3393
-
[CLKID_VPU] = &meson8b_vpu.hw,
3394
-
[CLKID_VDEC_1_SEL] = &meson8b_vdec_1_sel.hw,
3395
-
[CLKID_VDEC_1_1_DIV] = &meson8b_vdec_1_1_div.hw,
3396
-
[CLKID_VDEC_1_1] = &meson8b_vdec_1_1.hw,
3397
-
[CLKID_VDEC_1_2_DIV] = &meson8b_vdec_1_2_div.hw,
3398
-
[CLKID_VDEC_1_2] = &meson8b_vdec_1_2.hw,
3399
-
[CLKID_VDEC_1] = &meson8b_vdec_1.hw,
3400
-
[CLKID_VDEC_HCODEC_SEL] = &meson8b_vdec_hcodec_sel.hw,
3401
-
[CLKID_VDEC_HCODEC_DIV] = &meson8b_vdec_hcodec_div.hw,
3402
-
[CLKID_VDEC_HCODEC] = &meson8b_vdec_hcodec.hw,
3403
-
[CLKID_VDEC_2_SEL] = &meson8b_vdec_2_sel.hw,
3404
-
[CLKID_VDEC_2_DIV] = &meson8b_vdec_2_div.hw,
3405
-
[CLKID_VDEC_2] = &meson8b_vdec_2.hw,
3406
-
[CLKID_VDEC_HEVC_SEL] = &meson8b_vdec_hevc_sel.hw,
3407
-
[CLKID_VDEC_HEVC_DIV] = &meson8b_vdec_hevc_div.hw,
3408
-
[CLKID_VDEC_HEVC_EN] = &meson8b_vdec_hevc_en.hw,
3409
-
[CLKID_VDEC_HEVC] = &meson8b_vdec_hevc.hw,
3410
-
[CLKID_CTS_AMCLK_SEL] = &meson8b_cts_amclk_sel.hw,
3411
-
[CLKID_CTS_AMCLK_DIV] = &meson8b_cts_amclk_div.hw,
3412
-
[CLKID_CTS_AMCLK] = &meson8b_cts_amclk.hw,
3413
-
[CLKID_CTS_MCLK_I958_SEL] = &meson8b_cts_mclk_i958_sel.hw,
3414
-
[CLKID_CTS_MCLK_I958_DIV] = &meson8b_cts_mclk_i958_div.hw,
3415
-
[CLKID_CTS_MCLK_I958] = &meson8b_cts_mclk_i958.hw,
3416
-
[CLKID_CTS_I958] = &meson8b_cts_i958.hw,
3417
-
[CLKID_VID_PLL_LVDS_EN] = &meson8b_vid_pll_lvds_en.hw,
3418
-
[CLKID_HDMI_PLL_DCO_IN] = &hdmi_pll_dco_in.hw,
3419
-
[CLK_NR_CLKS] = NULL,
3420
-
},
3421
-
.num = CLK_NR_CLKS,
3194
+
static struct clk_hw *meson8m2_hw_clks[] = {
3195
+
[CLKID_PLL_FIXED] = &meson8b_fixed_pll.hw,
3196
+
[CLKID_PLL_VID] = &meson8b_vid_pll.hw,
3197
+
[CLKID_PLL_SYS] = &meson8b_sys_pll.hw,
3198
+
[CLKID_FCLK_DIV2] = &meson8b_fclk_div2.hw,
3199
+
[CLKID_FCLK_DIV3] = &meson8b_fclk_div3.hw,
3200
+
[CLKID_FCLK_DIV4] = &meson8b_fclk_div4.hw,
3201
+
[CLKID_FCLK_DIV5] = &meson8b_fclk_div5.hw,
3202
+
[CLKID_FCLK_DIV7] = &meson8b_fclk_div7.hw,
3203
+
[CLKID_CPUCLK] = &meson8b_cpu_clk.hw,
3204
+
[CLKID_MPEG_SEL] = &meson8b_mpeg_clk_sel.hw,
3205
+
[CLKID_MPEG_DIV] = &meson8b_mpeg_clk_div.hw,
3206
+
[CLKID_CLK81] = &meson8b_clk81.hw,
3207
+
[CLKID_DDR] = &meson8b_ddr.hw,
3208
+
[CLKID_DOS] = &meson8b_dos.hw,
3209
+
[CLKID_ISA] = &meson8b_isa.hw,
3210
+
[CLKID_PL301] = &meson8b_pl301.hw,
3211
+
[CLKID_PERIPHS] = &meson8b_periphs.hw,
3212
+
[CLKID_SPICC] = &meson8b_spicc.hw,
3213
+
[CLKID_I2C] = &meson8b_i2c.hw,
3214
+
[CLKID_SAR_ADC] = &meson8b_sar_adc.hw,
3215
+
[CLKID_SMART_CARD] = &meson8b_smart_card.hw,
3216
+
[CLKID_RNG0] = &meson8b_rng0.hw,
3217
+
[CLKID_UART0] = &meson8b_uart0.hw,
3218
+
[CLKID_SDHC] = &meson8b_sdhc.hw,
3219
+
[CLKID_STREAM] = &meson8b_stream.hw,
3220
+
[CLKID_ASYNC_FIFO] = &meson8b_async_fifo.hw,
3221
+
[CLKID_SDIO] = &meson8b_sdio.hw,
3222
+
[CLKID_ABUF] = &meson8b_abuf.hw,
3223
+
[CLKID_HIU_IFACE] = &meson8b_hiu_iface.hw,
3224
+
[CLKID_ASSIST_MISC] = &meson8b_assist_misc.hw,
3225
+
[CLKID_SPI] = &meson8b_spi.hw,
3226
+
[CLKID_I2S_SPDIF] = &meson8b_i2s_spdif.hw,
3227
+
[CLKID_ETH] = &meson8b_eth.hw,
3228
+
[CLKID_DEMUX] = &meson8b_demux.hw,
3229
+
[CLKID_AIU_GLUE] = &meson8b_aiu_glue.hw,
3230
+
[CLKID_IEC958] = &meson8b_iec958.hw,
3231
+
[CLKID_I2S_OUT] = &meson8b_i2s_out.hw,
3232
+
[CLKID_AMCLK] = &meson8b_amclk.hw,
3233
+
[CLKID_AIFIFO2] = &meson8b_aififo2.hw,
3234
+
[CLKID_MIXER] = &meson8b_mixer.hw,
3235
+
[CLKID_MIXER_IFACE] = &meson8b_mixer_iface.hw,
3236
+
[CLKID_ADC] = &meson8b_adc.hw,
3237
+
[CLKID_BLKMV] = &meson8b_blkmv.hw,
3238
+
[CLKID_AIU] = &meson8b_aiu.hw,
3239
+
[CLKID_UART1] = &meson8b_uart1.hw,
3240
+
[CLKID_G2D] = &meson8b_g2d.hw,
3241
+
[CLKID_USB0] = &meson8b_usb0.hw,
3242
+
[CLKID_USB1] = &meson8b_usb1.hw,
3243
+
[CLKID_RESET] = &meson8b_reset.hw,
3244
+
[CLKID_NAND] = &meson8b_nand.hw,
3245
+
[CLKID_DOS_PARSER] = &meson8b_dos_parser.hw,
3246
+
[CLKID_USB] = &meson8b_usb.hw,
3247
+
[CLKID_VDIN1] = &meson8b_vdin1.hw,
3248
+
[CLKID_AHB_ARB0] = &meson8b_ahb_arb0.hw,
3249
+
[CLKID_EFUSE] = &meson8b_efuse.hw,
3250
+
[CLKID_BOOT_ROM] = &meson8b_boot_rom.hw,
3251
+
[CLKID_AHB_DATA_BUS] = &meson8b_ahb_data_bus.hw,
3252
+
[CLKID_AHB_CTRL_BUS] = &meson8b_ahb_ctrl_bus.hw,
3253
+
[CLKID_HDMI_INTR_SYNC] = &meson8b_hdmi_intr_sync.hw,
3254
+
[CLKID_HDMI_PCLK] = &meson8b_hdmi_pclk.hw,
3255
+
[CLKID_USB1_DDR_BRIDGE] = &meson8b_usb1_ddr_bridge.hw,
3256
+
[CLKID_USB0_DDR_BRIDGE] = &meson8b_usb0_ddr_bridge.hw,
3257
+
[CLKID_MMC_PCLK] = &meson8b_mmc_pclk.hw,
3258
+
[CLKID_DVIN] = &meson8b_dvin.hw,
3259
+
[CLKID_UART2] = &meson8b_uart2.hw,
3260
+
[CLKID_SANA] = &meson8b_sana.hw,
3261
+
[CLKID_VPU_INTR] = &meson8b_vpu_intr.hw,
3262
+
[CLKID_SEC_AHB_AHB3_BRIDGE] = &meson8b_sec_ahb_ahb3_bridge.hw,
3263
+
[CLKID_CLK81_A9] = &meson8b_clk81_a9.hw,
3264
+
[CLKID_VCLK2_VENCI0] = &meson8b_vclk2_venci0.hw,
3265
+
[CLKID_VCLK2_VENCI1] = &meson8b_vclk2_venci1.hw,
3266
+
[CLKID_VCLK2_VENCP0] = &meson8b_vclk2_vencp0.hw,
3267
+
[CLKID_VCLK2_VENCP1] = &meson8b_vclk2_vencp1.hw,
3268
+
[CLKID_GCLK_VENCI_INT] = &meson8b_gclk_venci_int.hw,
3269
+
[CLKID_GCLK_VENCP_INT] = &meson8b_gclk_vencp_int.hw,
3270
+
[CLKID_DAC_CLK] = &meson8b_dac_clk.hw,
3271
+
[CLKID_AOCLK_GATE] = &meson8b_aoclk_gate.hw,
3272
+
[CLKID_IEC958_GATE] = &meson8b_iec958_gate.hw,
3273
+
[CLKID_ENC480P] = &meson8b_enc480p.hw,
3274
+
[CLKID_RNG1] = &meson8b_rng1.hw,
3275
+
[CLKID_GCLK_VENCL_INT] = &meson8b_gclk_vencl_int.hw,
3276
+
[CLKID_VCLK2_VENCLMCC] = &meson8b_vclk2_venclmcc.hw,
3277
+
[CLKID_VCLK2_VENCL] = &meson8b_vclk2_vencl.hw,
3278
+
[CLKID_VCLK2_OTHER] = &meson8b_vclk2_other.hw,
3279
+
[CLKID_EDP] = &meson8b_edp.hw,
3280
+
[CLKID_AO_MEDIA_CPU] = &meson8b_ao_media_cpu.hw,
3281
+
[CLKID_AO_AHB_SRAM] = &meson8b_ao_ahb_sram.hw,
3282
+
[CLKID_AO_AHB_BUS] = &meson8b_ao_ahb_bus.hw,
3283
+
[CLKID_AO_IFACE] = &meson8b_ao_iface.hw,
3284
+
[CLKID_MPLL0] = &meson8b_mpll0.hw,
3285
+
[CLKID_MPLL1] = &meson8b_mpll1.hw,
3286
+
[CLKID_MPLL2] = &meson8b_mpll2.hw,
3287
+
[CLKID_MPLL0_DIV] = &meson8b_mpll0_div.hw,
3288
+
[CLKID_MPLL1_DIV] = &meson8b_mpll1_div.hw,
3289
+
[CLKID_MPLL2_DIV] = &meson8b_mpll2_div.hw,
3290
+
[CLKID_CPU_IN_SEL] = &meson8b_cpu_in_sel.hw,
3291
+
[CLKID_CPU_IN_DIV2] = &meson8b_cpu_in_div2.hw,
3292
+
[CLKID_CPU_IN_DIV3] = &meson8b_cpu_in_div3.hw,
3293
+
[CLKID_CPU_SCALE_DIV] = &meson8b_cpu_scale_div.hw,
3294
+
[CLKID_CPU_SCALE_OUT_SEL] = &meson8b_cpu_scale_out_sel.hw,
3295
+
[CLKID_MPLL_PREDIV] = &meson8b_mpll_prediv.hw,
3296
+
[CLKID_FCLK_DIV2_DIV] = &meson8b_fclk_div2_div.hw,
3297
+
[CLKID_FCLK_DIV3_DIV] = &meson8b_fclk_div3_div.hw,
3298
+
[CLKID_FCLK_DIV4_DIV] = &meson8b_fclk_div4_div.hw,
3299
+
[CLKID_FCLK_DIV5_DIV] = &meson8b_fclk_div5_div.hw,
3300
+
[CLKID_FCLK_DIV7_DIV] = &meson8b_fclk_div7_div.hw,
3301
+
[CLKID_NAND_SEL] = &meson8b_nand_clk_sel.hw,
3302
+
[CLKID_NAND_DIV] = &meson8b_nand_clk_div.hw,
3303
+
[CLKID_NAND_CLK] = &meson8b_nand_clk_gate.hw,
3304
+
[CLKID_PLL_FIXED_DCO] = &meson8b_fixed_pll_dco.hw,
3305
+
[CLKID_HDMI_PLL_DCO] = &meson8b_hdmi_pll_dco.hw,
3306
+
[CLKID_PLL_SYS_DCO] = &meson8b_sys_pll_dco.hw,
3307
+
[CLKID_CPU_CLK_DIV2] = &meson8b_cpu_clk_div2.hw,
3308
+
[CLKID_CPU_CLK_DIV3] = &meson8b_cpu_clk_div3.hw,
3309
+
[CLKID_CPU_CLK_DIV4] = &meson8b_cpu_clk_div4.hw,
3310
+
[CLKID_CPU_CLK_DIV5] = &meson8b_cpu_clk_div5.hw,
3311
+
[CLKID_CPU_CLK_DIV6] = &meson8b_cpu_clk_div6.hw,
3312
+
[CLKID_CPU_CLK_DIV7] = &meson8b_cpu_clk_div7.hw,
3313
+
[CLKID_CPU_CLK_DIV8] = &meson8b_cpu_clk_div8.hw,
3314
+
[CLKID_APB_SEL] = &meson8b_apb_clk_sel.hw,
3315
+
[CLKID_APB] = &meson8b_apb_clk_gate.hw,
3316
+
[CLKID_PERIPH_SEL] = &meson8b_periph_clk_sel.hw,
3317
+
[CLKID_PERIPH] = &meson8b_periph_clk_gate.hw,
3318
+
[CLKID_AXI_SEL] = &meson8b_axi_clk_sel.hw,
3319
+
[CLKID_AXI] = &meson8b_axi_clk_gate.hw,
3320
+
[CLKID_L2_DRAM_SEL] = &meson8b_l2_dram_clk_sel.hw,
3321
+
[CLKID_L2_DRAM] = &meson8b_l2_dram_clk_gate.hw,
3322
+
[CLKID_HDMI_PLL_LVDS_OUT] = &meson8b_hdmi_pll_lvds_out.hw,
3323
+
[CLKID_HDMI_PLL_HDMI_OUT] = &meson8b_hdmi_pll_hdmi_out.hw,
3324
+
[CLKID_VID_PLL_IN_SEL] = &meson8b_vid_pll_in_sel.hw,
3325
+
[CLKID_VID_PLL_IN_EN] = &meson8b_vid_pll_in_en.hw,
3326
+
[CLKID_VID_PLL_PRE_DIV] = &meson8b_vid_pll_pre_div.hw,
3327
+
[CLKID_VID_PLL_POST_DIV] = &meson8b_vid_pll_post_div.hw,
3328
+
[CLKID_VID_PLL_FINAL_DIV] = &meson8b_vid_pll_final_div.hw,
3329
+
[CLKID_VCLK_IN_SEL] = &meson8b_vclk_in_sel.hw,
3330
+
[CLKID_VCLK_IN_EN] = &meson8b_vclk_in_en.hw,
3331
+
[CLKID_VCLK_EN] = &meson8b_vclk_en.hw,
3332
+
[CLKID_VCLK_DIV1] = &meson8b_vclk_div1_gate.hw,
3333
+
[CLKID_VCLK_DIV2_DIV] = &meson8b_vclk_div2_div.hw,
3334
+
[CLKID_VCLK_DIV2] = &meson8b_vclk_div2_div_gate.hw,
3335
+
[CLKID_VCLK_DIV4_DIV] = &meson8b_vclk_div4_div.hw,
3336
+
[CLKID_VCLK_DIV4] = &meson8b_vclk_div4_div_gate.hw,
3337
+
[CLKID_VCLK_DIV6_DIV] = &meson8b_vclk_div6_div.hw,
3338
+
[CLKID_VCLK_DIV6] = &meson8b_vclk_div6_div_gate.hw,
3339
+
[CLKID_VCLK_DIV12_DIV] = &meson8b_vclk_div12_div.hw,
3340
+
[CLKID_VCLK_DIV12] = &meson8b_vclk_div12_div_gate.hw,
3341
+
[CLKID_VCLK2_IN_SEL] = &meson8b_vclk2_in_sel.hw,
3342
+
[CLKID_VCLK2_IN_EN] = &meson8b_vclk2_clk_in_en.hw,
3343
+
[CLKID_VCLK2_EN] = &meson8b_vclk2_clk_en.hw,
3344
+
[CLKID_VCLK2_DIV1] = &meson8b_vclk2_div1_gate.hw,
3345
+
[CLKID_VCLK2_DIV2_DIV] = &meson8b_vclk2_div2_div.hw,
3346
+
[CLKID_VCLK2_DIV2] = &meson8b_vclk2_div2_div_gate.hw,
3347
+
[CLKID_VCLK2_DIV4_DIV] = &meson8b_vclk2_div4_div.hw,
3348
+
[CLKID_VCLK2_DIV4] = &meson8b_vclk2_div4_div_gate.hw,
3349
+
[CLKID_VCLK2_DIV6_DIV] = &meson8b_vclk2_div6_div.hw,
3350
+
[CLKID_VCLK2_DIV6] = &meson8b_vclk2_div6_div_gate.hw,
3351
+
[CLKID_VCLK2_DIV12_DIV] = &meson8b_vclk2_div12_div.hw,
3352
+
[CLKID_VCLK2_DIV12] = &meson8b_vclk2_div12_div_gate.hw,
3353
+
[CLKID_CTS_ENCT_SEL] = &meson8b_cts_enct_sel.hw,
3354
+
[CLKID_CTS_ENCT] = &meson8b_cts_enct.hw,
3355
+
[CLKID_CTS_ENCP_SEL] = &meson8b_cts_encp_sel.hw,
3356
+
[CLKID_CTS_ENCP] = &meson8b_cts_encp.hw,
3357
+
[CLKID_CTS_ENCI_SEL] = &meson8b_cts_enci_sel.hw,
3358
+
[CLKID_CTS_ENCI] = &meson8b_cts_enci.hw,
3359
+
[CLKID_HDMI_TX_PIXEL_SEL] = &meson8b_hdmi_tx_pixel_sel.hw,
3360
+
[CLKID_HDMI_TX_PIXEL] = &meson8b_hdmi_tx_pixel.hw,
3361
+
[CLKID_CTS_ENCL_SEL] = &meson8b_cts_encl_sel.hw,
3362
+
[CLKID_CTS_ENCL] = &meson8b_cts_encl.hw,
3363
+
[CLKID_CTS_VDAC0_SEL] = &meson8b_cts_vdac0_sel.hw,
3364
+
[CLKID_CTS_VDAC0] = &meson8b_cts_vdac0.hw,
3365
+
[CLKID_HDMI_SYS_SEL] = &meson8b_hdmi_sys_sel.hw,
3366
+
[CLKID_HDMI_SYS_DIV] = &meson8b_hdmi_sys_div.hw,
3367
+
[CLKID_HDMI_SYS] = &meson8b_hdmi_sys.hw,
3368
+
[CLKID_MALI_0_SEL] = &meson8b_mali_0_sel.hw,
3369
+
[CLKID_MALI_0_DIV] = &meson8b_mali_0_div.hw,
3370
+
[CLKID_MALI_0] = &meson8b_mali_0.hw,
3371
+
[CLKID_MALI_1_SEL] = &meson8b_mali_1_sel.hw,
3372
+
[CLKID_MALI_1_DIV] = &meson8b_mali_1_div.hw,
3373
+
[CLKID_MALI_1] = &meson8b_mali_1.hw,
3374
+
[CLKID_MALI] = &meson8b_mali.hw,
3375
+
[CLKID_GP_PLL_DCO] = &meson8m2_gp_pll_dco.hw,
3376
+
[CLKID_GP_PLL] = &meson8m2_gp_pll.hw,
3377
+
[CLKID_VPU_0_SEL] = &meson8m2_vpu_0_sel.hw,
3378
+
[CLKID_VPU_0_DIV] = &meson8b_vpu_0_div.hw,
3379
+
[CLKID_VPU_0] = &meson8b_vpu_0.hw,
3380
+
[CLKID_VPU_1_SEL] = &meson8m2_vpu_1_sel.hw,
3381
+
[CLKID_VPU_1_DIV] = &meson8b_vpu_1_div.hw,
3382
+
[CLKID_VPU_1] = &meson8b_vpu_1.hw,
3383
+
[CLKID_VPU] = &meson8b_vpu.hw,
3384
+
[CLKID_VDEC_1_SEL] = &meson8b_vdec_1_sel.hw,
3385
+
[CLKID_VDEC_1_1_DIV] = &meson8b_vdec_1_1_div.hw,
3386
+
[CLKID_VDEC_1_1] = &meson8b_vdec_1_1.hw,
3387
+
[CLKID_VDEC_1_2_DIV] = &meson8b_vdec_1_2_div.hw,
3388
+
[CLKID_VDEC_1_2] = &meson8b_vdec_1_2.hw,
3389
+
[CLKID_VDEC_1] = &meson8b_vdec_1.hw,
3390
+
[CLKID_VDEC_HCODEC_SEL] = &meson8b_vdec_hcodec_sel.hw,
3391
+
[CLKID_VDEC_HCODEC_DIV] = &meson8b_vdec_hcodec_div.hw,
3392
+
[CLKID_VDEC_HCODEC] = &meson8b_vdec_hcodec.hw,
3393
+
[CLKID_VDEC_2_SEL] = &meson8b_vdec_2_sel.hw,
3394
+
[CLKID_VDEC_2_DIV] = &meson8b_vdec_2_div.hw,
3395
+
[CLKID_VDEC_2] = &meson8b_vdec_2.hw,
3396
+
[CLKID_VDEC_HEVC_SEL] = &meson8b_vdec_hevc_sel.hw,
3397
+
[CLKID_VDEC_HEVC_DIV] = &meson8b_vdec_hevc_div.hw,
3398
+
[CLKID_VDEC_HEVC_EN] = &meson8b_vdec_hevc_en.hw,
3399
+
[CLKID_VDEC_HEVC] = &meson8b_vdec_hevc.hw,
3400
+
[CLKID_CTS_AMCLK_SEL] = &meson8b_cts_amclk_sel.hw,
3401
+
[CLKID_CTS_AMCLK_DIV] = &meson8b_cts_amclk_div.hw,
3402
+
[CLKID_CTS_AMCLK] = &meson8b_cts_amclk.hw,
3403
+
[CLKID_CTS_MCLK_I958_SEL] = &meson8b_cts_mclk_i958_sel.hw,
3404
+
[CLKID_CTS_MCLK_I958_DIV] = &meson8b_cts_mclk_i958_div.hw,
3405
+
[CLKID_CTS_MCLK_I958] = &meson8b_cts_mclk_i958.hw,
3406
+
[CLKID_CTS_I958] = &meson8b_cts_i958.hw,
3407
+
[CLKID_VID_PLL_LVDS_EN] = &meson8b_vid_pll_lvds_en.hw,
3408
+
[CLKID_HDMI_PLL_DCO_IN] = &hdmi_pll_dco_in.hw,
3422
3409
};
3423
3410
3424
3411
static struct clk_regmap *const meson8b_clk_regmaps[] = {
···
3777
3788
.nb.notifier_call = meson8b_cpu_clk_notifier_cb,
3778
3789
};
3779
3790
3791
+
static struct meson_clk_hw_data meson8_clks = {
3792
+
.hws = meson8_hw_clks,
3793
+
.num = ARRAY_SIZE(meson8_hw_clks),
3794
+
};
3795
+
3796
+
static struct meson_clk_hw_data meson8b_clks = {
3797
+
.hws = meson8b_hw_clks,
3798
+
.num = ARRAY_SIZE(meson8b_hw_clks),
3799
+
};
3800
+
3801
+
static struct meson_clk_hw_data meson8m2_clks = {
3802
+
.hws = meson8m2_hw_clks,
3803
+
.num = ARRAY_SIZE(meson8m2_hw_clks),
3804
+
};
3805
+
3780
3806
static void __init meson8b_clkc_init_common(struct device_node *np,
3781
-
struct clk_hw_onecell_data *clk_hw_onecell_data)
3807
+
struct meson_clk_hw_data *hw_clks)
3782
3808
{
3783
3809
struct meson8b_clk_reset *rstc;
3784
3810
struct device_node *parent_np;
···
3834
3830
* register all clks and start with the first used ID (which is
3835
3831
* CLKID_PLL_FIXED)
3836
3832
*/
3837
-
for (i = CLKID_PLL_FIXED; i < CLK_NR_CLKS; i++) {
3833
+
for (i = CLKID_PLL_FIXED; i < hw_clks->num; i++) {
3838
3834
/* array might be sparse */
3839
-
if (!clk_hw_onecell_data->hws[i])
3835
+
if (!hw_clks->hws[i])
3840
3836
continue;
3841
3837
3842
-
ret = of_clk_hw_register(np, clk_hw_onecell_data->hws[i]);
3838
+
ret = of_clk_hw_register(np, hw_clks->hws[i]);
3843
3839
if (ret)
3844
3840
return;
3845
3841
}
3846
3842
3847
-
meson8b_cpu_nb_data.cpu_clk = clk_hw_onecell_data->hws[CLKID_CPUCLK];
3843
+
meson8b_cpu_nb_data.cpu_clk = hw_clks->hws[CLKID_CPUCLK];
3848
3844
3849
3845
/*
3850
3846
* FIXME we shouldn't program the muxes in notifier handlers. The
···
3860
3856
return;
3861
3857
}
3862
3858
3863
-
ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get,
3864
-
clk_hw_onecell_data);
3859
+
ret = of_clk_add_hw_provider(np, meson_clk_hw_get, hw_clks);
3865
3860
if (ret)
3866
3861
pr_err("%s: failed to register clock provider\n", __func__);
3867
3862
}
3868
3863
3869
3864
static void __init meson8_clkc_init(struct device_node *np)
3870
3865
{
3871
-
return meson8b_clkc_init_common(np, &meson8_hw_onecell_data);
3866
+
return meson8b_clkc_init_common(np, &meson8_clks);
3872
3867
}
3873
3868
3874
3869
static void __init meson8b_clkc_init(struct device_node *np)
3875
3870
{
3876
-
return meson8b_clkc_init_common(np, &meson8b_hw_onecell_data);
3871
+
return meson8b_clkc_init_common(np, &meson8b_clks);
3877
3872
}
3878
3873
3879
3874
static void __init meson8m2_clkc_init(struct device_node *np)
3880
3875
{
3881
-
return meson8b_clkc_init_common(np, &meson8m2_hw_onecell_data);
3876
+
return meson8b_clkc_init_common(np, &meson8m2_clks);
3882
3877
}
3883
3878
3884
3879
CLK_OF_DECLARE_DRIVER(meson8_clkc, "amlogic,meson8-clkc",