Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/msm/registers: Generate _HI/LO builders for reg64
The upstream mesa copy of the GPU regs has shifted more things to reg64
instead of seperate 32b HI/LO reg32's. This works better with the "new-
style" c++ builders that mesa has been migrating to for a6xx+ (to better
handle register shuffling between gens), but it leaves the C builders
with missing _HI/LO builders.
So handle the special case of reg64, automatically generating the
missing _HI/LO builders.
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/673559/
+7
+7
drivers/gpu/drm/msm/registers/gen_header.py
+7
drivers/gpu/drm/msm/registers/gen_header.py
···
161
161
def __init__(self, name, template):
162
162
self.name = name
163
163
self.inline = False
164
+
self.reg = None
164
165
if template:
165
166
self.fields = template.fields[:]
166
167
else:
···
267
266
def dump(self, is_deprecated, prefix=None):
268
267
if prefix is None:
269
268
prefix = self.name
269
+
if self.reg and self.reg.bit_size == 64:
270
+
print("static inline uint32_t %s_LO(uint32_t val)\n{" % prefix)
271
+
print("\treturn val;\n}")
272
+
print("static inline uint32_t %s_HI(uint32_t val)\n{" % prefix)
273
+
print("\treturn val;\n}")
270
274
for f in self.fields:
271
275
if f.name:
272
276
name = prefix + "_" + f.name
···
651
645
652
646
self.current_reg = Reg(attrs, self.prefix(variant), self.current_array, bit_size)
653
647
self.current_reg.bitset = self.current_bitset
648
+
self.current_bitset.reg = self.current_reg
654
649
655
650
if len(self.stack) == 1:
656
651
self.file.append(self.current_reg)