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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
iio: dac: ad3552r: share model data structures
Preparing for new parts to be added also in the hs driver,
set model data structures in ad3552r-common.c, to be accessible
from both -hs and non hs driver.
Reviewed-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Nuno Sa <nuno.sa@analog.com>
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
Link: https://patch.msgid.link/20250114-wip-bl-ad3552r-axi-v0-iio-testing-carlos-v4-7-979402e33545@baylibre.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
authored by
Angelo Dureghello
and committed by
Jonathan Cameron
67a0f040
21889245
+46
-50
+42
-4
drivers/iio/dac/ad3552r-common.c
+42
-4
drivers/iio/dac/ad3552r-common.c
···
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#include "ad3552r.h"
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-
const s32 ad3552r_ch_ranges[AD3552R_MAX_RANGES][2] = {
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static const s32 ad3552r_ch_ranges[AD3552R_MAX_RANGES][2] = {
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[AD3552R_CH_OUTPUT_RANGE_0__2P5V] = { 0, 2500 },
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[AD3552R_CH_OUTPUT_RANGE_0__5V] = { 0, 5000 },
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[AD3552R_CH_OUTPUT_RANGE_0__10V] = { 0, 10000 },
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[AD3552R_CH_OUTPUT_RANGE_NEG_5__5V] = { -5000, 5000 },
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[AD3552R_CH_OUTPUT_RANGE_NEG_10__10V] = { -10000, 10000 }
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};
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EXPORT_SYMBOL_NS_GPL(ad3552r_ch_ranges, "IIO_AD3552R");
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const s32 ad3542r_ch_ranges[AD3542R_MAX_RANGES][2] = {
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static const s32 ad3542r_ch_ranges[AD3542R_MAX_RANGES][2] = {
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[AD3542R_CH_OUTPUT_RANGE_0__2P5V] = { 0, 2500 },
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[AD3542R_CH_OUTPUT_RANGE_0__5V] = { 0, 5000 },
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[AD3542R_CH_OUTPUT_RANGE_0__10V] = { 0, 10000 },
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[AD3542R_CH_OUTPUT_RANGE_NEG_5__5V] = { -5000, 5000 },
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[AD3542R_CH_OUTPUT_RANGE_NEG_2P5__7P5V] = { -2500, 7500 }
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};
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EXPORT_SYMBOL_NS_GPL(ad3542r_ch_ranges, "IIO_AD3552R");
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/* Gain * AD3552R_GAIN_SCALE */
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static const s32 gains_scaling_table[] = {
···
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[AD3552R_CH_GAIN_SCALING_0_25] = 250,
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[AD3552R_CH_GAIN_SCALING_0_125] = 125
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};
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const struct ad3552r_model_data ad3541r_model_data = {
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.model_name = "ad3541r",
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.chip_id = AD3541R_ID,
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.num_hw_channels = 1,
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.ranges_table = ad3542r_ch_ranges,
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.num_ranges = ARRAY_SIZE(ad3542r_ch_ranges),
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.requires_output_range = true,
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};
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EXPORT_SYMBOL_NS_GPL(ad3541r_model_data, "IIO_AD3552R");
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const struct ad3552r_model_data ad3542r_model_data = {
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.model_name = "ad3542r",
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.chip_id = AD3542R_ID,
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.num_hw_channels = 2,
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.ranges_table = ad3542r_ch_ranges,
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.num_ranges = ARRAY_SIZE(ad3542r_ch_ranges),
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.requires_output_range = true,
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};
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EXPORT_SYMBOL_NS_GPL(ad3542r_model_data, "IIO_AD3552R");
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const struct ad3552r_model_data ad3551r_model_data = {
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.model_name = "ad3551r",
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.chip_id = AD3551R_ID,
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.num_hw_channels = 1,
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.ranges_table = ad3552r_ch_ranges,
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.num_ranges = ARRAY_SIZE(ad3552r_ch_ranges),
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.requires_output_range = false,
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};
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EXPORT_SYMBOL_NS_GPL(ad3551r_model_data, "IIO_AD3552R");
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const struct ad3552r_model_data ad3552r_model_data = {
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.model_name = "ad3552r",
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.chip_id = AD3552R_ID,
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.num_hw_channels = 2,
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.ranges_table = ad3552r_ch_ranges,
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.num_ranges = ARRAY_SIZE(ad3552r_ch_ranges),
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.requires_output_range = false,
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};
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EXPORT_SYMBOL_NS_GPL(ad3552r_model_data, "IIO_AD3552R");
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u16 ad3552r_calc_custom_gain(u8 p, u8 n, s16 goffs)
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{
-8
drivers/iio/dac/ad3552r-hs.c
-8
drivers/iio/dac/ad3552r-hs.c
···
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return devm_iio_device_register(&pdev->dev, indio_dev);
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}
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static const struct ad3552r_model_data ad3552r_model_data = {
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.model_name = "ad3552r",
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.chip_id = AD3552R_ID,
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.num_hw_channels = 2,
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.ranges_table = ad3552r_ch_ranges,
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.num_ranges = ARRAY_SIZE(ad3552r_ch_ranges),
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};
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static const struct of_device_id ad3552r_hs_of_id[] = {
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{ .compatible = "adi,ad3552r", .data = &ad3552r_model_data },
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{ }
-36
drivers/iio/dac/ad3552r.c
-36
drivers/iio/dac/ad3552r.c
···
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return devm_iio_device_register(&spi->dev, indio_dev);
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}
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static const struct ad3552r_model_data ad3541r_model_data = {
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.model_name = "ad3541r",
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.chip_id = AD3541R_ID,
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.num_hw_channels = 1,
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.ranges_table = ad3542r_ch_ranges,
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.num_ranges = ARRAY_SIZE(ad3542r_ch_ranges),
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.requires_output_range = true,
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};
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static const struct ad3552r_model_data ad3542r_model_data = {
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.model_name = "ad3542r",
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.chip_id = AD3542R_ID,
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.num_hw_channels = 2,
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.ranges_table = ad3542r_ch_ranges,
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.num_ranges = ARRAY_SIZE(ad3542r_ch_ranges),
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.requires_output_range = true,
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};
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static const struct ad3552r_model_data ad3551r_model_data = {
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.model_name = "ad3551r",
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.chip_id = AD3551R_ID,
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.num_hw_channels = 1,
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.ranges_table = ad3552r_ch_ranges,
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.num_ranges = ARRAY_SIZE(ad3552r_ch_ranges),
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.requires_output_range = false,
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};
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static const struct ad3552r_model_data ad3552r_model_data = {
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.model_name = "ad3552r",
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.chip_id = AD3552R_ID,
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.num_hw_channels = 2,
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.ranges_table = ad3552r_ch_ranges,
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.num_ranges = ARRAY_SIZE(ad3552r_ch_ranges),
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.requires_output_range = false,
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};
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static const struct spi_device_id ad3552r_id[] = {
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{
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.name = "ad3541r",
+4
-2
drivers/iio/dac/ad3552r.h
+4
-2
drivers/iio/dac/ad3552r.h
···
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#define AD3542R_MAX_RANGES 5
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#define AD3552R_QUAD_SPI 2
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extern const s32 ad3552r_ch_ranges[AD3552R_MAX_RANGES][2];
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extern const s32 ad3542r_ch_ranges[AD3542R_MAX_RANGES][2];
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extern const struct ad3552r_model_data ad3541r_model_data;
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extern const struct ad3552r_model_data ad3542r_model_data;
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extern const struct ad3552r_model_data ad3551r_model_data;
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extern const struct ad3552r_model_data ad3552r_model_data;
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enum ad3552r_id {
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AD3541R_ID = 0x400b,