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ASoC: SOF: amd: Add support for signed fw image loading

Add support for signed firmware code bin and data bin
loading for amd platforms.

Signed-off-by: Venkata Prasad Potturu <venkataprasad.potturu@amd.com>
Link: https://lore.kernel.org/r/20230809123534.287707-2-venkataprasad.potturu@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Venkata Prasad Potturu and committed by
Mark Brown
6a69b724 d0dab6b7

+51 -3
+1
sound/soc/sof/amd/acp-dsp-offset.h
··· 87 87 #define ACP_SHA_DMA_CMD_STS 0x1CC0 88 88 #define ACP_SHA_DMA_ERR_STATUS 0x1CC4 89 89 #define ACP_SHA_TRANSFER_BYTE_CNT 0x1CC8 90 + #define ACP_SHA_DMA_INCLUDE_HDR 0x1CCC 90 91 #define ACP_SHA_PSP_ACK 0x1C74 91 92 92 93 #define ACP_SCRATCH_REG_0 0x10000
+37 -2
sound/soc/sof/amd/acp-loader.c
··· 3 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 4 // redistributing this file, you may do so under either license. 5 5 // 6 - // Copyright(c) 2021 Advanced Micro Devices, Inc. 6 + // Copyright(c) 2021, 2023 Advanced Micro Devices, Inc. 7 7 // 8 8 // Authors: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com> 9 9 ··· 158 158 int ret; 159 159 160 160 adata = sdev->pdata->hw_pdata; 161 - size_fw = adata->fw_bin_size; 161 + 162 + if (adata->signed_fw_image) 163 + size_fw = adata->fw_bin_size - ACP_FIRMWARE_SIGNATURE; 164 + else 165 + size_fw = adata->fw_bin_size; 162 166 163 167 page_count = PAGE_ALIGN(size_fw) >> PAGE_SHIFT; 164 168 adata->fw_bin_page_count = page_count; ··· 223 219 return 0; 224 220 } 225 221 EXPORT_SYMBOL_NS(acp_sof_dsp_run, SND_SOC_SOF_AMD_COMMON); 222 + 223 + int acp_sof_load_signed_firmware(struct snd_sof_dev *sdev) 224 + { 225 + struct snd_sof_pdata *plat_data = sdev->pdata; 226 + struct acp_dev_data *adata = plat_data->hw_pdata; 227 + int ret; 228 + 229 + ret = request_firmware(&sdev->basefw.fw, adata->fw_code_bin, sdev->dev); 230 + if (ret < 0) { 231 + dev_err(sdev->dev, "sof signed firmware code bin is missing\n"); 232 + return ret; 233 + } else { 234 + dev_dbg(sdev->dev, "request_firmware %s successful\n", adata->fw_code_bin); 235 + } 236 + ret = snd_sof_dsp_block_write(sdev, SOF_FW_BLK_TYPE_IRAM, 0, 237 + (void *)sdev->basefw.fw->data, sdev->basefw.fw->size); 238 + 239 + ret = request_firmware(&adata->fw_dbin, adata->fw_data_bin, sdev->dev); 240 + if (ret < 0) { 241 + dev_err(sdev->dev, "sof signed firmware data bin is missing\n"); 242 + return ret; 243 + 244 + } else { 245 + dev_dbg(sdev->dev, "request_firmware %s successful\n", adata->fw_data_bin); 246 + } 247 + 248 + ret = snd_sof_dsp_block_write(sdev, SOF_FW_BLK_TYPE_DRAM, 0, 249 + (void *)adata->fw_dbin->data, adata->fw_dbin->size); 250 + return ret; 251 + } 252 + EXPORT_SYMBOL_NS(acp_sof_load_signed_firmware, SND_SOC_SOF_AMD_COMMON);
+5 -1
sound/soc/sof/amd/acp.c
··· 3 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 4 // redistributing this file, you may do so under either license. 5 5 // 6 - // Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved. 6 + // Copyright(c) 2021, 2023 Advanced Micro Devices, Inc. All rights reserved. 7 7 // 8 8 // Authors: Vijendar Mukunda <Vijendar.Mukunda@amd.com> 9 9 // Ajit Kumar Pandey <AjitKumar.Pandey@amd.com> ··· 234 234 return ret; 235 235 } 236 236 } 237 + 238 + if (adata->signed_fw_image) 239 + snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_DMA_INCLUDE_HDR, ACP_SHA_HEADER); 237 240 238 241 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_DMA_STRT_ADDR, start_addr); 239 242 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_DMA_DESTINATION_ADDR, dest_addr); ··· 530 527 sdev->debug_box.offset = sdev->host_box.offset + sdev->host_box.size; 531 528 sdev->debug_box.size = BOX_SIZE_1024; 532 529 530 + adata->signed_fw_image = false; 533 531 acp_memory_init(sdev); 534 532 535 533 acp_dsp_stream_init(sdev);
+8
sound/soc/sof/amd/acp.h
··· 41 41 #define DSP_FW_RUN_ENABLE 0x01 42 42 #define ACP_SHA_RUN 0x01 43 43 #define ACP_SHA_RESET 0x02 44 + #define ACP_SHA_HEADER 0x01 44 45 #define ACP_DMA_CH_RST 0x01 45 46 #define ACP_DMA_CH_GRACEFUL_RST_EN 0x10 46 47 #define ACP_ATU_CACHE_INVALID 0x01 ··· 82 81 83 82 #define SRAM1_SIZE 0x13A000 84 83 #define PROBE_STATUS_BIT BIT(31) 84 + 85 + #define ACP_FIRMWARE_SIGNATURE 0x100 85 86 86 87 enum clock_source { 87 88 ACP_CLOCK_96M = 0, ··· 184 181 /* Common device data struct for ACP devices */ 185 182 struct acp_dev_data { 186 183 struct snd_sof_dev *dev; 184 + const struct firmware *fw_dbin; 187 185 /* DMIC device */ 188 186 struct platform_device *dmic_dev; 189 187 unsigned int fw_bin_size; 190 188 unsigned int fw_data_bin_size; 189 + const char *fw_code_bin; 190 + const char *fw_data_bin; 191 191 u32 fw_bin_page_count; 192 192 dma_addr_t sha_dma_addr; 193 193 u8 *bin_buf; 194 194 dma_addr_t dma_addr; 195 195 u8 *data_buf; 196 + bool signed_fw_image; 196 197 struct dma_descriptor dscr_info[ACP_MAX_DESC]; 197 198 struct acp_dsp_stream stream_buf[ACP_MAX_STREAM]; 198 199 struct acp_dsp_stream *dtrace_stream; ··· 221 214 /* DSP Loader callbacks */ 222 215 int acp_sof_dsp_run(struct snd_sof_dev *sdev); 223 216 int acp_dsp_pre_fw_run(struct snd_sof_dev *sdev); 217 + int acp_sof_load_signed_firmware(struct snd_sof_dev *sdev); 224 218 int acp_get_bar_index(struct snd_sof_dev *sdev, u32 type); 225 219 226 220 /* Block IO callbacks */