Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/amdgpu: Modify hdp block to fit for the unified ras block data and ops
1.Modify hdp block to fit for the unified ras block data and ops.
2.Change amdgpu_hdp_ras_funcs to amdgpu_hdp_ras, and the corresponding variable name remove _funcs suffix.
3.Remove the const flag of hdp ras variable so that hdp ras block can be able to be inserted into amdgpu device ras block link list.
4.Invoke amdgpu_ras_register_ras_block function to register hdp ras block into amdgpu device ras block link list.
5.Remove the redundant code about hdp in amdgpu_ras.c after using the unified ras block.
Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: John Clements <john.clements@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
yipechai
and committed by
Alex Deucher
6d76e904
6c245386
+35
-31
+4
-6
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+4
-6
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
···
465
465
return r;
466
466
}
467
467
468
-
if (adev->hdp.ras_funcs &&
469
-
adev->hdp.ras_funcs->ras_late_init) {
470
-
r = adev->hdp.ras_funcs->ras_late_init(adev);
468
+
if (adev->hdp.ras && adev->hdp.ras->ras_block.ras_late_init) {
469
+
r = adev->hdp.ras->ras_block.ras_late_init(adev, NULL);
471
470
if (r)
472
471
return r;
473
472
}
···
508
509
if (adev->gmc.xgmi.ras && adev->gmc.xgmi.ras->ras_block.ras_fini)
509
510
adev->gmc.xgmi.ras->ras_block.ras_fini(adev);
510
511
511
-
if (adev->hdp.ras_funcs &&
512
-
adev->hdp.ras_funcs->ras_fini)
513
-
adev->hdp.ras_funcs->ras_fini(adev);
512
+
if (adev->hdp.ras && adev->hdp.ras->ras_block.ras_fini)
513
+
adev->hdp.ras->ras_block.ras_fini(adev);
514
514
}
515
515
516
516
/*
+1
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c
+1
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c
+5
-8
drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
+5
-8
drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
···
22
22
*/
23
23
#ifndef __AMDGPU_HDP_H__
24
24
#define __AMDGPU_HDP_H__
25
+
#include "amdgpu_ras.h"
25
26
26
-
struct amdgpu_hdp_ras_funcs {
27
-
int (*ras_late_init)(struct amdgpu_device *adev);
28
-
void (*ras_fini)(struct amdgpu_device *adev);
29
-
void (*query_ras_error_count)(struct amdgpu_device *adev,
30
-
void *ras_error_status);
31
-
void (*reset_ras_error_count)(struct amdgpu_device *adev);
27
+
struct amdgpu_hdp_ras{
28
+
struct amdgpu_ras_block_object ras_block;
32
29
};
33
30
34
31
struct amdgpu_hdp_funcs {
···
40
43
struct amdgpu_hdp {
41
44
struct ras_common_if *ras_if;
42
45
const struct amdgpu_hdp_funcs *funcs;
43
-
const struct amdgpu_hdp_ras_funcs *ras_funcs;
46
+
struct amdgpu_hdp_ras *ras;
44
47
};
45
48
46
-
int amdgpu_hdp_ras_late_init(struct amdgpu_device *adev);
49
+
int amdgpu_hdp_ras_late_init(struct amdgpu_device *adev, void *ras_info);
47
50
void amdgpu_hdp_ras_fini(struct amdgpu_device *adev);
48
51
#endif /* __AMDGPU_HDP_H__ */
+8
-8
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+8
-8
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
···
1012
1012
adev->nbio.ras_funcs->query_ras_error_count(adev, &err_data);
1013
1013
break;
1014
1014
case AMDGPU_RAS_BLOCK__XGMI_WAFL:
1015
+
case AMDGPU_RAS_BLOCK__HDP:
1015
1016
if (!block_obj || !block_obj->hw_ops) {
1016
1017
dev_info(adev->dev, "%s doesn't config ras function \n",
1017
1018
get_ras_block_str(&info->head));
···
1020
1019
}
1021
1020
if (block_obj->hw_ops->query_ras_error_count)
1022
1021
block_obj->hw_ops->query_ras_error_count(adev, &err_data);
1023
-
break;
1024
-
case AMDGPU_RAS_BLOCK__HDP:
1025
-
if (adev->hdp.ras_funcs &&
1026
-
adev->hdp.ras_funcs->query_ras_error_count)
1027
-
adev->hdp.ras_funcs->query_ras_error_count(adev, &err_data);
1028
1022
break;
1029
1023
case AMDGPU_RAS_BLOCK__MCA:
1030
1024
amdgpu_ras_mca_query_error_status(adev, &info->head, &err_data);
···
1114
1118
adev->sdma.funcs->reset_ras_error_count(adev);
1115
1119
break;
1116
1120
case AMDGPU_RAS_BLOCK__HDP:
1117
-
if (adev->hdp.ras_funcs &&
1118
-
adev->hdp.ras_funcs->reset_ras_error_count)
1119
-
adev->hdp.ras_funcs->reset_ras_error_count(adev);
1121
+
if (!block_obj || !block_obj->hw_ops) {
1122
+
dev_info(adev->dev, "%s doesn't config ras function \n", ras_block_str(block));
1123
+
return -EINVAL;
1124
+
}
1125
+
1126
+
if (block_obj->hw_ops->reset_ras_error_count)
1127
+
block_obj->hw_ops->reset_ras_error_count(adev);
1120
1128
break;
1121
1129
default:
1122
1130
break;
+5
-4
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+5
-4
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
···
1269
1269
1270
1270
static void gmc_v9_0_set_hdp_ras_funcs(struct amdgpu_device *adev)
1271
1271
{
1272
-
adev->hdp.ras_funcs = &hdp_v4_0_ras_funcs;
1272
+
adev->hdp.ras = &hdp_v4_0_ras;
1273
+
amdgpu_ras_register_ras_block(adev, &adev->hdp.ras->ras_block);
1273
1274
}
1274
1275
1275
1276
static void gmc_v9_0_set_mca_funcs(struct amdgpu_device *adev)
···
1347
1346
adev->mmhub.ras_funcs->reset_ras_error_count)
1348
1347
adev->mmhub.ras_funcs->reset_ras_error_count(adev);
1349
1348
1350
-
if (adev->hdp.ras_funcs &&
1351
-
adev->hdp.ras_funcs->reset_ras_error_count)
1352
-
adev->hdp.ras_funcs->reset_ras_error_count(adev);
1349
+
if (adev->hdp.ras && adev->hdp.ras->ras_block.hw_ops &&
1350
+
adev->hdp.ras->ras_block.hw_ops->reset_ras_error_count)
1351
+
adev->hdp.ras->ras_block.hw_ops->reset_ras_error_count(adev);
1353
1352
}
1354
1353
1355
1354
r = amdgpu_gmc_ras_late_init(adev);
+11
-3
drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
+11
-3
drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
···
150
150
WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));
151
151
}
152
152
153
-
const struct amdgpu_hdp_ras_funcs hdp_v4_0_ras_funcs = {
154
-
.ras_late_init = amdgpu_hdp_ras_late_init,
155
-
.ras_fini = amdgpu_hdp_ras_fini,
153
+
struct amdgpu_ras_block_hw_ops hdp_v4_0_ras_hw_ops = {
156
154
.query_ras_error_count = hdp_v4_0_query_ras_error_count,
157
155
.reset_ras_error_count = hdp_v4_0_reset_ras_error_count,
156
+
};
157
+
158
+
struct amdgpu_hdp_ras hdp_v4_0_ras = {
159
+
.ras_block = {
160
+
.name = "hdp",
161
+
.block = AMDGPU_RAS_BLOCK__HDP,
162
+
.hw_ops = &hdp_v4_0_ras_hw_ops,
163
+
.ras_late_init = amdgpu_hdp_ras_late_init,
164
+
.ras_fini = amdgpu_hdp_ras_fini,
165
+
},
158
166
};
159
167
160
168
const struct amdgpu_hdp_funcs hdp_v4_0_funcs = {