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drm/rockchip: inno-hdmi: switch to FIELD_PREP_WM16 macro

The era of hand-rolled HIWORD_UPDATE macros is over, at least for those
drivers that use constant masks.

The inno-hdmi driver's own HIWORD_UPDATE macro is instantiated only
twice. Remove it, and replace its uses with FIELD_PREP_WM16. Since
FIELD_PREP_WM16 shifts the value for us, we replace using the mask as
the value by simply using 1 instead.

With the new FIELD_PREP_WM16 macro, we gain better error checking and a
central shared definition.

This has been compile-tested only as I lack hardware this old, but the
change is trivial enough that I am fairly certain it's equivalent.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>

authored by

Nicolas Frattaroli and committed by
Yury Norov 6fd524c3 ad24f6e1

+5 -6
+5 -6
drivers/gpu/drm/rockchip/inno_hdmi.c
··· 10 10 #include <linux/delay.h> 11 11 #include <linux/err.h> 12 12 #include <linux/hdmi.h> 13 + #include <linux/hw_bitfield.h> 13 14 #include <linux/mfd/syscon.h> 14 15 #include <linux/mod_devicetable.h> 15 16 #include <linux/module.h> ··· 382 381 #define HDMI_CEC_BUSFREETIME_L 0xdc 383 382 #define HDMI_CEC_BUSFREETIME_H 0xdd 384 383 #define HDMI_CEC_LOGICADDR 0xde 385 - 386 - #define HIWORD_UPDATE(val, mask) ((val) | (mask) << 16) 387 384 388 385 #define RK3036_GRF_SOC_CON2 0x148 389 386 #define RK3036_HDMI_PHSYNC BIT(4) ··· 755 756 int value, psync; 756 757 757 758 if (hdmi->variant->dev_type == RK3036_HDMI) { 758 - psync = mode->flags & DRM_MODE_FLAG_PHSYNC ? RK3036_HDMI_PHSYNC : 0; 759 - value = HIWORD_UPDATE(psync, RK3036_HDMI_PHSYNC); 760 - psync = mode->flags & DRM_MODE_FLAG_PVSYNC ? RK3036_HDMI_PVSYNC : 0; 761 - value |= HIWORD_UPDATE(psync, RK3036_HDMI_PVSYNC); 759 + psync = mode->flags & DRM_MODE_FLAG_PHSYNC ? 1 : 0; 760 + value = FIELD_PREP_WM16(RK3036_HDMI_PHSYNC, psync); 761 + psync = mode->flags & DRM_MODE_FLAG_PVSYNC ? 1 : 0; 762 + value |= FIELD_PREP_WM16(RK3036_HDMI_PVSYNC, psync); 762 763 regmap_write(hdmi->grf, RK3036_GRF_SOC_CON2, value); 763 764 } 764 765