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drm/amd/display: Revert "drm/amd/display: remove duplicated edp relink to fastboot"

Revert commit 984abb5384b0 ("drm/amd/display: remove duplicated edp relink to fastboot")

Because it cause 4k EDP not light up on boot

Reviewed-by: Tom Chung <chiahsuan.chung@amd.com>
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Aric Cyr and committed by
Alex Deucher 6fe01ed4 3557db42

+59
+59
drivers/gpu/drm/amd/display/dc/core/dc.c
··· 1215 1215 dc_release_state(current_ctx); 1216 1216 } 1217 1217 1218 + static void disable_vbios_mode_if_required( 1219 + struct dc *dc, 1220 + struct dc_state *context) 1221 + { 1222 + unsigned int i, j; 1223 + 1224 + /* check if timing_changed, disable stream*/ 1225 + for (i = 0; i < dc->res_pool->pipe_count; i++) { 1226 + struct dc_stream_state *stream = NULL; 1227 + struct dc_link *link = NULL; 1228 + struct pipe_ctx *pipe = NULL; 1229 + 1230 + pipe = &context->res_ctx.pipe_ctx[i]; 1231 + stream = pipe->stream; 1232 + if (stream == NULL) 1233 + continue; 1234 + 1235 + // only looking for first odm pipe 1236 + if (pipe->prev_odm_pipe) 1237 + continue; 1238 + 1239 + if (stream->link->local_sink && 1240 + stream->link->local_sink->sink_signal == SIGNAL_TYPE_EDP) { 1241 + link = stream->link; 1242 + } 1243 + 1244 + if (link != NULL && link->link_enc->funcs->is_dig_enabled(link->link_enc)) { 1245 + unsigned int enc_inst, tg_inst = 0; 1246 + unsigned int pix_clk_100hz; 1247 + 1248 + enc_inst = link->link_enc->funcs->get_dig_frontend(link->link_enc); 1249 + if (enc_inst != ENGINE_ID_UNKNOWN) { 1250 + for (j = 0; j < dc->res_pool->stream_enc_count; j++) { 1251 + if (dc->res_pool->stream_enc[j]->id == enc_inst) { 1252 + tg_inst = dc->res_pool->stream_enc[j]->funcs->dig_source_otg( 1253 + dc->res_pool->stream_enc[j]); 1254 + break; 1255 + } 1256 + } 1257 + 1258 + dc->res_pool->dp_clock_source->funcs->get_pixel_clk_frequency_100hz( 1259 + dc->res_pool->dp_clock_source, 1260 + tg_inst, &pix_clk_100hz); 1261 + 1262 + if (link->link_status.link_active) { 1263 + uint32_t requested_pix_clk_100hz = 1264 + pipe->stream_res.pix_clk_params.requested_pix_clk_100hz; 1265 + 1266 + if (pix_clk_100hz != requested_pix_clk_100hz) { 1267 + dc->link_srv->set_dpms_off(pipe); 1268 + pipe->stream->dpms_off = false; 1269 + } 1270 + } 1271 + } 1272 + } 1273 + } 1274 + } 1275 + 1218 1276 static void wait_for_no_pipes_pending(struct dc *dc, struct dc_state *context) 1219 1277 { 1220 1278 int i; ··· 1842 1784 dc_streams[i] = context->streams[i]; 1843 1785 1844 1786 if (!dcb->funcs->is_accelerated_mode(dcb)) { 1787 + disable_vbios_mode_if_required(dc, context); 1845 1788 dc->hwss.enable_accelerated_mode(dc, context); 1846 1789 } 1847 1790