tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'tegra-for-6.2-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

ARM: tegra: Device tree changes for v6.2-rc1

This fixes various minor issues in device trees that are flagged by the
DT validation tools.

* tag 'tegra-for-6.2-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Remove duplicate pin entry in pinmux
ARM: tegra: Remove unused interrupt-parent properties
ARM: tegra: Fix nvidia,io-reset properties
ARM: tegra: Add missing power-supply for panels
ARM: tegra: Fixup pinmux node names
ARM: tegra: Use correct compatible string for ASUS TF101 panel

Link: https://lore.kernel.org/r/20221119012025.3968358-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Arnd Bergmann 714aac5d 8ccf49d7

+42 -44
+12 -12
arch/arm/boot/dts/tegra114-asus-tf701t.dts
··· 80 80 }; 81 81 82 82 pinmux@70000868 { 83 - asus_pad_ec_default: asus-pad-ec-default { 83 + asus_pad_ec_default: pinmux-asus-pad-ec-default { 84 84 ec-interrupt { 85 85 nvidia,pins = "kb_col5_pq5"; 86 86 nvidia,function = "kbc"; ··· 98 98 }; 99 99 }; 100 100 101 - backlight_default: backlight-default { 101 + backlight_default: pinmux-backlight-default { 102 102 backlight-enable { 103 103 nvidia,pins = "gmi_ad10_ph2"; 104 104 nvidia,function = "gmi"; ··· 108 108 }; 109 109 }; 110 110 111 - codec_default: codec-default { 111 + codec_default: pinmux-codec-default { 112 112 ldo1-en { 113 113 nvidia,pins = "sdmmc1_wp_n_pv3"; 114 114 nvidia,function = "sdmmc1"; ··· 127 127 }; 128 128 }; 129 129 130 - gpio_keys_default: gpio-keys-default { 130 + gpio_keys_default: pinmux-gpio-keys-default { 131 131 power { 132 132 nvidia,pins = "kb_col0_pq0"; 133 133 nvidia,function = "kbc"; ··· 146 146 }; 147 147 }; 148 148 149 - gpio_hall_sensor_default: gpio-hall-sensor-default { 149 + gpio_hall_sensor_default: pinmux-gpio-hall-sensor-default { 150 150 ulpi_data4_po5 { 151 151 nvidia,pins = "ulpi_data4_po5"; 152 152 nvidia,function = "spi2"; ··· 156 156 }; 157 157 }; 158 158 159 - hp_det_default: hp-det-default { 159 + hp_det_default: pinmux-hp-det-default { 160 160 gmi_iordy_pi5 { 161 161 nvidia,pins = "kb_row7_pr7"; 162 162 nvidia,function = "rsvd2"; ··· 166 166 }; 167 167 }; 168 168 169 - imu_default: imu-default { 169 + imu_default: pinmux-imu-default { 170 170 kb_row3_pr3 { 171 171 nvidia,pins = "kb_row3_pr3"; 172 172 nvidia,function = "rsvd3"; ··· 176 176 }; 177 177 }; 178 178 179 - pwm_default: pwm-default { 179 + pwm_default: pinmux-pwm-default { 180 180 gmi_ad9_ph1 { 181 181 nvidia,pins = "gmi_ad9_ph1"; 182 182 nvidia,function = "pwm1"; ··· 187 187 }; 188 188 189 189 /* XXX make this something more sensible */ 190 - pwm_sleep: pwm-sleep { 190 + pwm_sleep: pinmux-pwm-sleep { 191 191 gmi_ad9_ph1 { 192 192 nvidia,pins = "gmi_ad9_ph1"; 193 193 nvidia,function = "pwm1"; ··· 197 197 }; 198 198 }; 199 199 200 - sdmmc3_default: sdmmc3-default { 200 + sdmmc3_default: pinmux-sdmmc3-default { 201 201 sdmmc3_clk_pa6 { 202 202 nvidia,pins = "sdmmc3_clk_pa6"; 203 203 nvidia,function = "sdmmc3"; ··· 233 233 }; 234 234 }; 235 235 236 - sdmmc3_vdd_default: sdmmc3-vdd-default { 236 + sdmmc3_vdd_default: pinmux-sdmmc3-vdd-default { 237 237 gmi_clk_pk1 { 238 238 nvidia,pins = "gmi_clk_pk1"; 239 239 nvidia,function = "gmi"; ··· 243 243 }; 244 244 }; 245 245 246 - vdd_lcd_default: vdd-lcd-default { 246 + vdd_lcd_default: pinmux-vdd-lcd-default { 247 247 sdmmc4_clk_pcc4 { 248 248 nvidia,pins = "sdmmc4_clk_pcc4"; 249 249 nvidia,function = "sdmmc4";
+2 -1
arch/arm/boot/dts/tegra124-nyan-big.dts
··· 18 18 aux-bus { 19 19 panel: panel { 20 20 compatible = "auo,b133xtn01"; 21 + power-supply = <&vdd_3v3_panel>; 21 22 backlight = <&backlight>; 22 23 }; 23 24 }; ··· 40 39 pinctrl-names = "default"; 41 40 pinctrl-0 = <&pinmux_default>; 42 41 43 - pinmux_default: common { 42 + pinmux_default: pinmux { 44 43 clk_32k_out_pa0 { 45 44 nvidia,pins = "clk_32k_out_pa0"; 46 45 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+2 -1
arch/arm/boot/dts/tegra124-nyan-blaze.dts
··· 20 20 aux-bus { 21 21 panel: panel { 22 22 compatible = "samsung,ltn140at29-301"; 23 + power-supply = <&vdd_3v3_panel>; 23 24 backlight = <&backlight>; 24 25 }; 25 26 }; ··· 38 37 pinctrl-names = "default"; 39 38 pinctrl-0 = <&pinmux_default>; 40 39 41 - pinmux_default: common { 40 + pinmux_default: pinmux { 42 41 clk_32k_out_pa0 { 43 42 nvidia,pins = "clk_32k_out_pa0"; 44 43 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+2 -1
arch/arm/boot/dts/tegra124-venice2.dts
··· 52 52 aux-bus { 53 53 panel: panel { 54 54 compatible = "lg,lp129qe"; 55 + power-supply = <&vdd_3v3_panel>; 55 56 backlight = <&backlight>; 56 57 }; 57 58 }; ··· 71 70 pinctrl-names = "boot"; 72 71 pinctrl-0 = <&pinmux_boot>; 73 72 74 - pinmux_boot: common { 73 + pinmux_boot: pinmux { 75 74 dap_mclk1_pw4 { 76 75 nvidia,pins = "dap_mclk1_pw4"; 77 76 nvidia,function = "extperiph1";
+3 -3
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
··· 342 342 }; 343 343 }; 344 344 345 - state_i2cmux_ddc: pinmux_i2cmux_ddc { 345 + state_i2cmux_ddc: pinmux-i2cmux-ddc { 346 346 ddc { 347 347 nvidia,pins = "ddc"; 348 348 nvidia,function = "i2c2"; ··· 353 353 }; 354 354 }; 355 355 356 - state_i2cmux_pta: pinmux_i2cmux_pta { 356 + state_i2cmux_pta: pinmux-i2cmux-pta { 357 357 ddc { 358 358 nvidia,pins = "ddc"; 359 359 nvidia,function = "rsvd4"; ··· 364 364 }; 365 365 }; 366 366 367 - state_i2cmux_idle: pinmux_i2cmux_idle { 367 + state_i2cmux_idle: pinmux-i2cmux-idle { 368 368 ddc { 369 369 nvidia,pins = "ddc"; 370 370 nvidia,function = "rsvd4";
+4 -4
arch/arm/boot/dts/tegra20-asus-tf101.dts
··· 399 399 }; 400 400 }; 401 401 402 - state_i2cmux_ddc: pinmux_i2cmux_ddc { 402 + state_i2cmux_ddc: pinmux-i2cmux-ddc { 403 403 ddc { 404 404 nvidia,pins = "ddc"; 405 405 nvidia,function = "i2c2"; ··· 411 411 }; 412 412 }; 413 413 414 - state_i2cmux_pta: pinmux_i2cmux_pta { 414 + state_i2cmux_pta: pinmux-i2cmux-pta { 415 415 ddc { 416 416 nvidia,pins = "ddc"; 417 417 nvidia,function = "rsvd4"; ··· 423 423 }; 424 424 }; 425 425 426 - state_i2cmux_idle: pinmux_i2cmux_idle { 426 + state_i2cmux_idle: pinmux-i2cmux-idle { 427 427 ddc { 428 428 nvidia,pins = "ddc"; 429 429 nvidia,function = "rsvd4"; ··· 1019 1019 }; 1020 1020 1021 1021 display-panel { 1022 - compatible = "panel-lvds"; 1022 + compatible = "auo,b101ew05", "panel-lvds"; 1023 1023 1024 1024 /* AUO B101EW05 using custom timings */ 1025 1025
+3 -3
arch/arm/boot/dts/tegra20-seaboard.dts
··· 285 285 }; 286 286 }; 287 287 288 - state_i2cmux_ddc: pinmux_i2cmux_ddc { 288 + state_i2cmux_ddc: pinmux-i2cmux-ddc { 289 289 ddc { 290 290 nvidia,pins = "ddc"; 291 291 nvidia,function = "i2c2"; ··· 296 296 }; 297 297 }; 298 298 299 - state_i2cmux_pta: pinmux_i2cmux_pta { 299 + state_i2cmux_pta: pinmux-i2cmux-pta { 300 300 ddc { 301 301 nvidia,pins = "ddc"; 302 302 nvidia,function = "rsvd4"; ··· 307 307 }; 308 308 }; 309 309 310 - state_i2cmux_idle: pinmux_i2cmux_idle { 310 + state_i2cmux_idle: pinmux-i2cmux-idle { 311 311 ddc { 312 312 nvidia,pins = "ddc"; 313 313 nvidia,function = "rsvd4";
+3 -3
arch/arm/boot/dts/tegra20-tamonten.dtsi
··· 249 249 }; 250 250 }; 251 251 252 - state_i2cmux_ddc: pinmux_i2cmux_ddc { 252 + state_i2cmux_ddc: pinmux-i2cmux-ddc { 253 253 ddc { 254 254 nvidia,pins = "ddc"; 255 255 nvidia,function = "i2c2"; ··· 260 260 }; 261 261 }; 262 262 263 - state_i2cmux_pta: pinmux_i2cmux_pta { 263 + state_i2cmux_pta: pinmux-i2cmux-pta { 264 264 ddc { 265 265 nvidia,pins = "ddc"; 266 266 nvidia,function = "rsvd4"; ··· 271 271 }; 272 272 }; 273 273 274 - state_i2cmux_idle: pinmux_i2cmux_idle { 274 + state_i2cmux_idle: pinmux-i2cmux-idle { 275 275 ddc { 276 276 nvidia,pins = "ddc"; 277 277 nvidia,function = "rsvd4";
+3 -3
arch/arm/boot/dts/tegra20-ventana.dts
··· 284 284 }; 285 285 }; 286 286 287 - state_i2cmux_ddc: pinmux_i2cmux_ddc { 287 + state_i2cmux_ddc: pinmux-i2cmux-ddc { 288 288 ddc { 289 289 nvidia,pins = "ddc"; 290 290 nvidia,function = "i2c2"; ··· 295 295 }; 296 296 }; 297 297 298 - state_i2cmux_pta: pinmux_i2cmux_pta { 298 + state_i2cmux_pta: pinmux-i2cmux-pta { 299 299 ddc { 300 300 nvidia,pins = "ddc"; 301 301 nvidia,function = "rsvd4"; ··· 306 306 }; 307 307 }; 308 308 309 - state_i2cmux_idle: pinmux_i2cmux_idle { 309 + state_i2cmux_idle: pinmux-i2cmux-idle { 310 310 ddc { 311 311 nvidia,pins = "ddc"; 312 312 nvidia,function = "rsvd4";
+4 -6
arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi
··· 168 168 nvidia,tristate = <TEGRA_PIN_DISABLE>; 169 169 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 170 170 nvidia,lock = <0>; 171 - nvidia,ioreset = <0>; 171 + nvidia,io-reset = <0>; 172 172 }; 173 173 174 174 /* SDMMC3 pinmux */ ··· 711 711 nvidia,tristate = <TEGRA_PIN_ENABLE>; 712 712 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 713 713 nvidia,lock = <0>; 714 - nvidia,ioreset = <0>; 714 + nvidia,io-reset = <0>; 715 715 }; 716 716 717 717 /* GPIO keys pinmux */ ··· 805 805 nvidia,tristate = <TEGRA_PIN_DISABLE>; 806 806 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 807 807 nvidia,lock = <0>; 808 - nvidia,ioreset = <0>; 808 + nvidia,io-reset = <0>; 809 809 }; 810 810 811 811 vi_d10_pt2 { ··· 937 937 nvidia,tristate = <TEGRA_PIN_DISABLE>; 938 938 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 939 939 nvidia,lock = <0>; 940 - nvidia,ioreset = <0>; 940 + nvidia,io-reset = <0>; 941 941 }; 942 942 943 943 vi_mclk_pt1 { ··· 1509 1509 1510 1510 extcon-keys { 1511 1511 compatible = "gpio-keys"; 1512 - interrupt-parent = <&gpio>; 1513 1512 1514 1513 switch-dock-hall-sensor { 1515 1514 label = "Lid sensor"; ··· 1541 1542 1542 1543 gpio-keys { 1543 1544 compatible = "gpio-keys"; 1544 - interrupt-parent = <&gpio>; 1545 1545 1546 1546 key-power { 1547 1547 label = "Power";
+4 -7
arch/arm/boot/dts/tegra30-pegatron-chagall.dts
··· 134 134 nvidia,tristate = <TEGRA_PIN_DISABLE>; 135 135 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 136 136 nvidia,lock = <0>; 137 - nvidia,ioreset = <0>; 137 + nvidia,io-reset = <0>; 138 138 }; 139 139 140 140 /* SDMMC3 pinmux */ ··· 149 149 sdmmc3_cmd_pa7 { 150 150 nvidia,pins = "sdmmc3_cmd_pa7", 151 151 "sdmmc3_dat3_pb4", 152 - "sdmmc3_dat2_pb5", 153 152 "sdmmc3_dat2_pb5", 154 153 "sdmmc3_dat1_pb6", 155 154 "sdmmc3_dat0_pb7", ··· 621 622 nvidia,tristate = <TEGRA_PIN_ENABLE>; 622 623 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 623 624 nvidia,lock = <0>; 624 - nvidia,ioreset = <0>; 625 + nvidia,io-reset = <0>; 625 626 }; 626 627 627 628 pu1 { ··· 688 689 nvidia,tristate = <TEGRA_PIN_DISABLE>; 689 690 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 690 691 nvidia,lock = <0>; 691 - nvidia,ioreset = <0>; 692 + nvidia,io-reset = <0>; 692 693 }; 693 694 694 695 vi_d10_pt2 { ··· 863 864 nvidia,tristate = <TEGRA_PIN_DISABLE>; 864 865 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 865 866 nvidia,lock = <0>; 866 - nvidia,ioreset = <0>; 867 + nvidia,io-reset = <0>; 867 868 }; 868 869 869 870 vi_mclk_pt1 { ··· 2652 2653 2653 2654 extcon-keys { 2654 2655 compatible = "gpio-keys"; 2655 - interrupt-parent = <&gpio>; 2656 2656 2657 2657 switch-dock-insert { 2658 2658 label = "Chagall Dock"; ··· 2684 2686 2685 2687 gpio-keys { 2686 2688 compatible = "gpio-keys"; 2687 - interrupt-parent = <&gpio>; 2688 2689 2689 2690 key-power { 2690 2691 label = "Power";