Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"These are three fixes for the Marvell EBU family and one for the
Samsung s3c platforms. All of them are obvious should still make it
into 3.7."
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: Kirkwood: Update PCI-E fixup
Dove: Fix irq_to_pmu()
Dove: Attempt to fix PMU/RTC interrupts
ARM: S3C24XX: Fix potential NULL pointer dereference error
+28
-9
+1
arch/arm/Kconfig
+1
arch/arm/Kconfig
+1
-1
arch/arm/mach-dove/include/mach/pm.h
+1
-1
arch/arm/mach-dove/include/mach/pm.h
+13
-1
arch/arm/mach-dove/irq.c
+13
-1
arch/arm/mach-dove/irq.c
···
46
46
int pin = irq_to_pmu(d->irq);
47
47
u32 u;
48
48
49
+
/*
50
+
* The PMU mask register is not RW0C: it is RW. This means that
51
+
* the bits take whatever value is written to them; if you write
52
+
* a '1', you will set the interrupt.
53
+
*
54
+
* Unfortunately this means there is NO race free way to clear
55
+
* these interrupts.
56
+
*
57
+
* So, let's structure the code so that the window is as small as
58
+
* possible.
59
+
*/
49
60
u = ~(1 << (pin & 31));
50
-
writel(u, PMU_INTERRUPT_CAUSE);
61
+
u &= readl_relaxed(PMU_INTERRUPT_CAUSE);
62
+
writel_relaxed(u, PMU_INTERRUPT_CAUSE);
51
63
}
52
64
53
65
static struct irq_chip pmu_irq_chip = {
+8
-3
arch/arm/mach-kirkwood/pcie.c
+8
-3
arch/arm/mach-kirkwood/pcie.c
···
207
207
return 1;
208
208
}
209
209
210
+
/*
211
+
* The root complex has a hardwired class of PCI_CLASS_MEMORY_OTHER, when it
212
+
* is operating as a root complex this needs to be switched to
213
+
* PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on
214
+
* the device. Decoding setup is handled by the orion code.
215
+
*/
210
216
static void __devinit rc_pci_fixup(struct pci_dev *dev)
211
217
{
212
-
/*
213
-
* Prevent enumeration of root complex.
214
-
*/
215
218
if (dev->bus->parent == NULL && dev->devfn == 0) {
216
219
int i;
217
220
221
+
dev->class &= 0xff;
222
+
dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
218
223
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
219
224
dev->resource[i].start = 0;
220
225
dev->resource[i].end = 0;
+5
-4
arch/arm/plat-s3c24xx/dma.c
+5
-4
arch/arm/plat-s3c24xx/dma.c
···
473
473
pr_debug("dma%d: %s: buffer %p queued onto non-empty channel\n",
474
474
chan->number, __func__, buf);
475
475
476
-
if (chan->end == NULL)
476
+
if (chan->end == NULL) {
477
477
pr_debug("dma%d: %s: %p not empty, and chan->end==NULL?\n",
478
478
chan->number, __func__, chan);
479
-
480
-
chan->end->next = buf;
481
-
chan->end = buf;
479
+
} else {
480
+
chan->end->next = buf;
481
+
chan->end = buf;
482
+
}
482
483
}
483
484
484
485
/* if necessary, update the next buffer field */