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drm/amd/pm: drop redundant or unused APIs and data structures

Drop those unused APIs and data structures.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Evan Quan and committed by
Alex Deucher
7689dab4 a627967e

+4 -49
-49
drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
··· 88 88 struct amdgpu_irq_src irq; 89 89 }; 90 90 91 - enum amdgpu_clk_action 92 - { 93 - AMDGPU_SCLK_UP = 1, 94 - AMDGPU_SCLK_DOWN 95 - }; 96 - 97 - struct amdgpu_blacklist_clocks 98 - { 99 - u32 sclk; 100 - u32 mclk; 101 - enum amdgpu_clk_action action; 102 - }; 103 - 104 91 struct amdgpu_clock_and_voltage_limits { 105 92 u32 sclk; 106 93 u32 mclk; ··· 226 239 bool ucode_fan_control; 227 240 }; 228 241 229 - #define amdgpu_dpm_reset_power_profile_state(adev, request) \ 230 - ((adev)->powerplay.pp_funcs->reset_power_profile_state(\ 231 - (adev)->powerplay.pp_handle, request)) 232 - 233 242 struct amdgpu_dpm { 234 243 struct amdgpu_ps *ps; 235 244 /* number of valid power states */ ··· 330 347 bool pp_force_state_enabled; 331 348 }; 332 349 333 - #define R600_SSTU_DFLT 0 334 - #define R600_SST_DFLT 0x00C8 335 - 336 - /* XXX are these ok? */ 337 - #define R600_TEMP_RANGE_MIN (90 * 1000) 338 - #define R600_TEMP_RANGE_MAX (120 * 1000) 339 - 340 - #define FDO_PWM_MODE_STATIC 1 341 - #define FDO_PWM_MODE_STATIC_RPM 5 342 - 343 - enum amdgpu_td { 344 - AMDGPU_TD_AUTO, 345 - AMDGPU_TD_UP, 346 - AMDGPU_TD_DOWN, 347 - }; 348 - 349 - enum amdgpu_display_watermark { 350 - AMDGPU_DISPLAY_WATERMARK_LOW = 0, 351 - AMDGPU_DISPLAY_WATERMARK_HIGH = 1, 352 - }; 353 - 354 - enum amdgpu_display_gap 355 - { 356 - AMDGPU_PM_DISPLAY_GAP_VBLANK_OR_WM = 0, 357 - AMDGPU_PM_DISPLAY_GAP_VBLANK = 1, 358 - AMDGPU_PM_DISPLAY_GAP_WATERMARK = 2, 359 - AMDGPU_PM_DISPLAY_GAP_IGNORE = 3, 360 - }; 361 - 362 350 u32 amdgpu_dpm_get_vblank_time(struct amdgpu_device *adev); 363 351 int amdgpu_dpm_read_sensor(struct amdgpu_device *adev, enum amd_pp_sensors sensor, 364 352 void *data, uint32_t *size); ··· 378 424 bool acquire); 379 425 380 426 void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev); 381 - 382 - int amdgpu_dpm_read_sensor(struct amdgpu_device *adev, enum amd_pp_sensors sensor, 383 - void *data, uint32_t *size); 384 427 385 428 void amdgpu_dpm_compute_clocks(struct amdgpu_device *adev); 386 429 void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable);
+4
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
··· 26 26 #include "amdgpu_smu.h" 27 27 28 28 #if defined(SWSMU_CODE_LAYER_L2) || defined(SWSMU_CODE_LAYER_L3) || defined(SWSMU_CODE_LAYER_L4) 29 + 30 + #define FDO_PWM_MODE_STATIC 1 31 + #define FDO_PWM_MODE_STATIC_RPM 5 32 + 29 33 int smu_cmn_send_msg_without_waiting(struct smu_context *smu, 30 34 uint16_t msg_index, 31 35 uint32_t param);