Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'sound-5.12-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound fixes from Takashi Iwai:
"The majority of changes are various ASoC device/platform-specific
small fixes (including a removal of stale file) while the only common
change is a clk management fix in ASoC simple-card driver.
The rest are the usual HD-audio quirks"
* tag 'sound-5.12-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (44 commits)
ALSA: usb-audio: Fix unintentional sign extension issue
ALSA: hda/realtek: fix mute/micmute LEDs for HP 850 G8
ASoC: dt-bindings: fsl_spdif: Add compatible string for new platforms
ASoC: rt711: add snd_soc_component remove callback
ASoC: rt5659: Update MCLK rate in set_sysclk()
ASoC: simple-card-utils: Do not handle device clock
ALSA: hda/realtek: fix mute/micmute LEDs for HP 440 G8
ALSA: hda/realtek: fix mute/micmute LEDs for HP 840 G8
ALSA: hda/realtek: apply pin quirk for XiaomiNotebook Pro
ALSA: hda/realtek: Apply headset-mic quirks for Xiaomi Redmibook Air
ASoC: mediatek: mt8192: fix tdm out data is valid on rising edge
ALSA: dice: fix null pointer dereference when node is disconnected
ALSA: hda: generic: Fix the micmute led init state
ASoC: qcom: lpass-cpu: Fix lpass dai ids parse
spi: cadence: set cqspi to the driver_data field of struct device
ASoC: SOF: intel: fix wrong poll bits in dsp power down
ASoC: codecs: wcd934x: add a sanity check in set channel map
ASoC: qcom: sdm845: Fix array out of range on rx slim channels
ASoC: qcom: sdm845: Fix array out of bounds access
ASoC: remove remnants of sirf prima/atlas audio codec
...
+253
-292
+4
Documentation/devicetree/bindings/sound/fsl,spdif.yaml
+4
Documentation/devicetree/bindings/sound/fsl,spdif.yaml
+1
drivers/spi/spi-cadence-quadspi.c
+1
drivers/spi/spi-cadence-quadspi.c
+2
-3
sound/firewire/dice/dice-stream.c
+2
-3
sound/firewire/dice/dice-stream.c
···
493
493
struct reg_params tx_params, rx_params;
494
494
495
495
if (dice->substreams_counter == 0) {
496
-
if (get_register_params(dice, &tx_params, &rx_params) >= 0) {
497
-
amdtp_domain_stop(&dice->domain);
496
+
if (get_register_params(dice, &tx_params, &rx_params) >= 0)
498
497
finish_session(dice, &tx_params, &rx_params);
499
-
}
500
498
499
+
amdtp_domain_stop(&dice->domain);
501
500
release_resources(dice);
502
501
}
503
502
}
+1
-1
sound/pci/hda/hda_generic.c
+1
-1
sound/pci/hda/hda_generic.c
···
4065
4065
4066
4066
spec->micmute_led.led_mode = MICMUTE_LED_FOLLOW_MUTE;
4067
4067
spec->micmute_led.capture = 0;
4068
-
spec->micmute_led.led_value = 0;
4068
+
spec->micmute_led.led_value = -1;
4069
4069
spec->micmute_led.old_hook = spec->cap_sync_hook;
4070
4070
spec->cap_sync_hook = update_micmute_led;
4071
4071
if (!snd_hda_gen_add_kctl(spec, NULL, &micmute_led_mode_ctl))
+16
sound/pci/hda/patch_realtek.c
+16
sound/pci/hda/patch_realtek.c
···
4225
4225
}
4226
4226
}
4227
4227
4228
+
static void alc236_fixup_hp_gpio_led(struct hda_codec *codec,
4229
+
const struct hda_fixup *fix, int action)
4230
+
{
4231
+
alc_fixup_hp_gpio_led(codec, action, 0x02, 0x01);
4232
+
}
4233
+
4228
4234
static void alc269_fixup_hp_gpio_led(struct hda_codec *codec,
4229
4235
const struct hda_fixup *fix, int action)
4230
4236
{
···
6387
6381
ALC294_FIXUP_ASUS_GX502_VERBS,
6388
6382
ALC285_FIXUP_HP_GPIO_LED,
6389
6383
ALC285_FIXUP_HP_MUTE_LED,
6384
+
ALC236_FIXUP_HP_GPIO_LED,
6390
6385
ALC236_FIXUP_HP_MUTE_LED,
6391
6386
ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET,
6392
6387
ALC295_FIXUP_ASUS_MIC_NO_PRESENCE,
···
7623
7616
.type = HDA_FIXUP_FUNC,
7624
7617
.v.func = alc285_fixup_hp_mute_led,
7625
7618
},
7619
+
[ALC236_FIXUP_HP_GPIO_LED] = {
7620
+
.type = HDA_FIXUP_FUNC,
7621
+
.v.func = alc236_fixup_hp_gpio_led,
7622
+
},
7626
7623
[ALC236_FIXUP_HP_MUTE_LED] = {
7627
7624
.type = HDA_FIXUP_FUNC,
7628
7625
.v.func = alc236_fixup_hp_mute_led,
···
8056
8045
SND_PCI_QUIRK(0x103c, 0x8783, "HP ZBook Fury 15 G7 Mobile Workstation",
8057
8046
ALC285_FIXUP_HP_GPIO_AMP_INIT),
8058
8047
SND_PCI_QUIRK(0x103c, 0x87c8, "HP", ALC287_FIXUP_HP_GPIO_LED),
8048
+
SND_PCI_QUIRK(0x103c, 0x87e5, "HP ProBook 440 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED),
8059
8049
SND_PCI_QUIRK(0x103c, 0x87f4, "HP", ALC287_FIXUP_HP_GPIO_LED),
8060
8050
SND_PCI_QUIRK(0x103c, 0x87f5, "HP", ALC287_FIXUP_HP_GPIO_LED),
8061
8051
SND_PCI_QUIRK(0x103c, 0x87f7, "HP Spectre x360 14", ALC245_FIXUP_HP_X360_AMP),
8052
+
SND_PCI_QUIRK(0x103c, 0x8846, "HP EliteBook 850 G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED),
8053
+
SND_PCI_QUIRK(0x103c, 0x884c, "HP EliteBook 840 G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED),
8062
8054
SND_PCI_QUIRK(0x1043, 0x103e, "ASUS X540SA", ALC256_FIXUP_ASUS_MIC),
8063
8055
SND_PCI_QUIRK(0x1043, 0x103f, "ASUS TX300", ALC282_FIXUP_ASUS_TX300),
8064
8056
SND_PCI_QUIRK(0x1043, 0x106d, "Asus K53BE", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
···
8256
8242
SND_PCI_QUIRK(0x1b35, 0x1237, "CZC L101", ALC269_FIXUP_CZC_L101),
8257
8243
SND_PCI_QUIRK(0x1b7d, 0xa831, "Ordissimo EVE2 ", ALC269VB_FIXUP_ORDISSIMO_EVE2), /* Also known as Malata PC-B1303 */
8258
8244
SND_PCI_QUIRK(0x1d72, 0x1602, "RedmiBook", ALC255_FIXUP_XIAOMI_HEADSET_MIC),
8245
+
SND_PCI_QUIRK(0x1d72, 0x1701, "XiaomiNotebook Pro", ALC298_FIXUP_DELL1_MIC_NO_PRESENCE),
8259
8246
SND_PCI_QUIRK(0x1d72, 0x1901, "RedmiBook 14", ALC256_FIXUP_ASUS_HEADSET_MIC),
8247
+
SND_PCI_QUIRK(0x1d72, 0x1947, "RedmiBook Air", ALC255_FIXUP_XIAOMI_HEADSET_MIC),
8260
8248
SND_PCI_QUIRK(0x10ec, 0x118c, "Medion EE4254 MD62100", ALC256_FIXUP_MEDION_HEADSET_NO_PRESENCE),
8261
8249
SND_PCI_QUIRK(0x1c06, 0x2013, "Lemote A1802", ALC269_FIXUP_LEMOTE_A1802),
8262
8250
SND_PCI_QUIRK(0x1c06, 0x2015, "Lemote A190X", ALC269_FIXUP_LEMOTE_A190X),
-5
sound/soc/codecs/Kconfig
-5
sound/soc/codecs/Kconfig
···
186
186
imply SND_SOC_SI476X
187
187
imply SND_SOC_SIMPLE_AMPLIFIER
188
188
imply SND_SOC_SIMPLE_MUX
189
-
imply SND_SOC_SIRF_AUDIO_CODEC
190
189
imply SND_SOC_SPDIF
191
190
imply SND_SOC_SSM2305
192
191
imply SND_SOC_SSM2518
···
1277
1278
config SND_SOC_SIMPLE_MUX
1278
1279
tristate "Simple Audio Mux"
1279
1280
select GPIOLIB
1280
-
1281
-
config SND_SOC_SIRF_AUDIO_CODEC
1282
-
tristate "SiRF SoC internal audio codec"
1283
-
select REGMAP_MMIO
1284
1281
1285
1282
config SND_SOC_SPDIF
1286
1283
tristate "S/PDIF CODEC"
+1
sound/soc/codecs/ak4458.c
+1
sound/soc/codecs/ak4458.c
+1
sound/soc/codecs/ak5558.c
+1
sound/soc/codecs/ak5558.c
+34
-78
sound/soc/codecs/cs42l42.c
+34
-78
sound/soc/codecs/cs42l42.c
···
401
401
};
402
402
403
403
static DECLARE_TLV_DB_SCALE(adc_tlv, -9600, 100, false);
404
-
static DECLARE_TLV_DB_SCALE(mixer_tlv, -6200, 100, false);
404
+
static DECLARE_TLV_DB_SCALE(mixer_tlv, -6300, 100, true);
405
405
406
406
static const char * const cs42l42_hpf_freq_text[] = {
407
407
"1.86Hz", "120Hz", "235Hz", "466Hz"
···
458
458
CS42L42_DAC_HPF_EN_SHIFT, true, false),
459
459
SOC_DOUBLE_R_TLV("Mixer Volume", CS42L42_MIXER_CHA_VOL,
460
460
CS42L42_MIXER_CHB_VOL, CS42L42_MIXER_CH_VOL_SHIFT,
461
-
0x3e, 1, mixer_tlv)
461
+
0x3f, 1, mixer_tlv)
462
462
};
463
463
464
464
static int cs42l42_hpdrv_evt(struct snd_soc_dapm_widget *w,
···
511
511
{"HP", NULL, "HPDRV"}
512
512
};
513
513
514
-
static int cs42l42_set_bias_level(struct snd_soc_component *component,
515
-
enum snd_soc_bias_level level)
516
-
{
517
-
struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
518
-
int ret;
519
-
520
-
switch (level) {
521
-
case SND_SOC_BIAS_ON:
522
-
break;
523
-
case SND_SOC_BIAS_PREPARE:
524
-
break;
525
-
case SND_SOC_BIAS_STANDBY:
526
-
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
527
-
regcache_cache_only(cs42l42->regmap, false);
528
-
regcache_sync(cs42l42->regmap);
529
-
ret = regulator_bulk_enable(
530
-
ARRAY_SIZE(cs42l42->supplies),
531
-
cs42l42->supplies);
532
-
if (ret != 0) {
533
-
dev_err(component->dev,
534
-
"Failed to enable regulators: %d\n",
535
-
ret);
536
-
return ret;
537
-
}
538
-
}
539
-
break;
540
-
case SND_SOC_BIAS_OFF:
541
-
542
-
regcache_cache_only(cs42l42->regmap, true);
543
-
regulator_bulk_disable(ARRAY_SIZE(cs42l42->supplies),
544
-
cs42l42->supplies);
545
-
break;
546
-
}
547
-
548
-
return 0;
549
-
}
550
-
551
514
static int cs42l42_component_probe(struct snd_soc_component *component)
552
515
{
553
516
struct cs42l42_private *cs42l42 =
···
523
560
524
561
static const struct snd_soc_component_driver soc_component_dev_cs42l42 = {
525
562
.probe = cs42l42_component_probe,
526
-
.set_bias_level = cs42l42_set_bias_level,
527
563
.dapm_widgets = cs42l42_dapm_widgets,
528
564
.num_dapm_widgets = ARRAY_SIZE(cs42l42_dapm_widgets),
529
565
.dapm_routes = cs42l42_audio_map,
···
653
691
CS42L42_CLK_OASRC_SEL_MASK,
654
692
CS42L42_CLK_OASRC_SEL_12 <<
655
693
CS42L42_CLK_OASRC_SEL_SHIFT);
656
-
/* channel 1 on low LRCLK, 32 bit */
657
-
snd_soc_component_update_bits(component,
658
-
CS42L42_ASP_RX_DAI0_CH1_AP_RES,
659
-
CS42L42_ASP_RX_CH_AP_MASK |
660
-
CS42L42_ASP_RX_CH_RES_MASK,
661
-
(CS42L42_ASP_RX_CH_AP_LOW <<
662
-
CS42L42_ASP_RX_CH_AP_SHIFT) |
663
-
(CS42L42_ASP_RX_CH_RES_32 <<
664
-
CS42L42_ASP_RX_CH_RES_SHIFT));
665
-
/* Channel 2 on high LRCLK, 32 bit */
666
-
snd_soc_component_update_bits(component,
667
-
CS42L42_ASP_RX_DAI0_CH2_AP_RES,
668
-
CS42L42_ASP_RX_CH_AP_MASK |
669
-
CS42L42_ASP_RX_CH_RES_MASK,
670
-
(CS42L42_ASP_RX_CH_AP_HI <<
671
-
CS42L42_ASP_RX_CH_AP_SHIFT) |
672
-
(CS42L42_ASP_RX_CH_RES_32 <<
673
-
CS42L42_ASP_RX_CH_RES_SHIFT));
674
694
if (pll_ratio_table[i].mclk_src_sel == 0) {
675
695
/* Pass the clock straight through */
676
696
snd_soc_component_update_bits(component,
···
741
797
/* Bitclock/frame inversion */
742
798
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
743
799
case SND_SOC_DAIFMT_NB_NF:
800
+
asp_cfg_val |= CS42L42_ASP_SCPOL_NOR << CS42L42_ASP_SCPOL_SHIFT;
744
801
break;
745
802
case SND_SOC_DAIFMT_NB_IF:
746
-
asp_cfg_val |= CS42L42_ASP_POL_INV <<
747
-
CS42L42_ASP_LCPOL_IN_SHIFT;
803
+
asp_cfg_val |= CS42L42_ASP_SCPOL_NOR << CS42L42_ASP_SCPOL_SHIFT;
804
+
asp_cfg_val |= CS42L42_ASP_LCPOL_INV << CS42L42_ASP_LCPOL_SHIFT;
748
805
break;
749
806
case SND_SOC_DAIFMT_IB_NF:
750
-
asp_cfg_val |= CS42L42_ASP_POL_INV <<
751
-
CS42L42_ASP_SCPOL_IN_DAC_SHIFT;
752
807
break;
753
808
case SND_SOC_DAIFMT_IB_IF:
754
-
asp_cfg_val |= CS42L42_ASP_POL_INV <<
755
-
CS42L42_ASP_LCPOL_IN_SHIFT;
756
-
asp_cfg_val |= CS42L42_ASP_POL_INV <<
757
-
CS42L42_ASP_SCPOL_IN_DAC_SHIFT;
809
+
asp_cfg_val |= CS42L42_ASP_LCPOL_INV << CS42L42_ASP_LCPOL_SHIFT;
758
810
break;
759
811
}
760
812
761
-
snd_soc_component_update_bits(component, CS42L42_ASP_CLK_CFG,
762
-
CS42L42_ASP_MODE_MASK |
763
-
CS42L42_ASP_SCPOL_IN_DAC_MASK |
764
-
CS42L42_ASP_LCPOL_IN_MASK, asp_cfg_val);
813
+
snd_soc_component_update_bits(component, CS42L42_ASP_CLK_CFG, CS42L42_ASP_MODE_MASK |
814
+
CS42L42_ASP_SCPOL_MASK |
815
+
CS42L42_ASP_LCPOL_MASK,
816
+
asp_cfg_val);
765
817
766
818
return 0;
767
819
}
···
768
828
{
769
829
struct snd_soc_component *component = dai->component;
770
830
struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
771
-
int retval;
831
+
unsigned int width = (params_width(params) / 8) - 1;
832
+
unsigned int val = 0;
772
833
773
834
cs42l42->srate = params_rate(params);
774
-
cs42l42->swidth = params_width(params);
775
835
776
-
retval = cs42l42_pll_config(component);
836
+
switch(substream->stream) {
837
+
case SNDRV_PCM_STREAM_PLAYBACK:
838
+
val |= width << CS42L42_ASP_RX_CH_RES_SHIFT;
839
+
/* channel 1 on low LRCLK */
840
+
snd_soc_component_update_bits(component, CS42L42_ASP_RX_DAI0_CH1_AP_RES,
841
+
CS42L42_ASP_RX_CH_AP_MASK |
842
+
CS42L42_ASP_RX_CH_RES_MASK, val);
843
+
/* Channel 2 on high LRCLK */
844
+
val |= CS42L42_ASP_RX_CH_AP_HI << CS42L42_ASP_RX_CH_AP_SHIFT;
845
+
snd_soc_component_update_bits(component, CS42L42_ASP_RX_DAI0_CH2_AP_RES,
846
+
CS42L42_ASP_RX_CH_AP_MASK |
847
+
CS42L42_ASP_RX_CH_RES_MASK, val);
848
+
break;
849
+
default:
850
+
break;
851
+
}
777
852
778
-
return retval;
853
+
return cs42l42_pll_config(component);
779
854
}
780
855
781
856
static int cs42l42_set_sysclk(struct snd_soc_dai *dai,
···
855
900
return 0;
856
901
}
857
902
858
-
#define CS42L42_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S18_3LE | \
859
-
SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE | \
860
-
SNDRV_PCM_FMTBIT_S32_LE)
903
+
#define CS42L42_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
904
+
SNDRV_PCM_FMTBIT_S24_LE |\
905
+
SNDRV_PCM_FMTBIT_S32_LE )
861
906
862
907
863
908
static const struct snd_soc_dai_ops cs42l42_ops = {
···
1756
1801
dev_dbg(&i2c_client->dev, "Found reset GPIO\n");
1757
1802
gpiod_set_value_cansleep(cs42l42->reset_gpio, 1);
1758
1803
}
1759
-
mdelay(3);
1804
+
usleep_range(CS42L42_BOOT_TIME_US, CS42L42_BOOT_TIME_US * 2);
1760
1805
1761
1806
/* Request IRQ */
1762
1807
ret = devm_request_threaded_irq(&i2c_client->dev,
···
1881
1926
}
1882
1927
1883
1928
gpiod_set_value_cansleep(cs42l42->reset_gpio, 1);
1929
+
usleep_range(CS42L42_BOOT_TIME_US, CS42L42_BOOT_TIME_US * 2);
1884
1930
1885
1931
regcache_cache_only(cs42l42->regmap, false);
1886
1932
regcache_sync(cs42l42->regmap);
+7
-6
sound/soc/codecs/cs42l42.h
+7
-6
sound/soc/codecs/cs42l42.h
···
258
258
#define CS42L42_ASP_SLAVE_MODE 0x00
259
259
#define CS42L42_ASP_MODE_SHIFT 4
260
260
#define CS42L42_ASP_MODE_MASK (1 << CS42L42_ASP_MODE_SHIFT)
261
-
#define CS42L42_ASP_SCPOL_IN_DAC_SHIFT 2
262
-
#define CS42L42_ASP_SCPOL_IN_DAC_MASK (1 << CS42L42_ASP_SCPOL_IN_DAC_SHIFT)
263
-
#define CS42L42_ASP_LCPOL_IN_SHIFT 0
264
-
#define CS42L42_ASP_LCPOL_IN_MASK (1 << CS42L42_ASP_LCPOL_IN_SHIFT)
265
-
#define CS42L42_ASP_POL_INV 1
261
+
#define CS42L42_ASP_SCPOL_SHIFT 2
262
+
#define CS42L42_ASP_SCPOL_MASK (3 << CS42L42_ASP_SCPOL_SHIFT)
263
+
#define CS42L42_ASP_SCPOL_NOR 3
264
+
#define CS42L42_ASP_LCPOL_SHIFT 0
265
+
#define CS42L42_ASP_LCPOL_MASK (3 << CS42L42_ASP_LCPOL_SHIFT)
266
+
#define CS42L42_ASP_LCPOL_INV 3
266
267
267
268
#define CS42L42_ASP_FRM_CFG (CS42L42_PAGE_12 + 0x08)
268
269
#define CS42L42_ASP_STP_SHIFT 4
···
740
739
#define CS42L42_FRAC2_VAL(val) (((val) & 0xff0000) >> 16)
741
740
742
741
#define CS42L42_NUM_SUPPLIES 5
742
+
#define CS42L42_BOOT_TIME_US 3000
743
743
744
744
static const char *const cs42l42_supply_names[CS42L42_NUM_SUPPLIES] = {
745
745
"VA",
···
758
756
struct completion pdn_done;
759
757
u32 sclk;
760
758
u32 srate;
761
-
u32 swidth;
762
759
u8 plug_state;
763
760
u8 hs_type;
764
761
u8 ts_inv;
+2
-7
sound/soc/codecs/es8316.c
+2
-7
sound/soc/codecs/es8316.c
···
63
63
1, 1, TLV_DB_SCALE_ITEM(0, 0, 0),
64
64
2, 2, TLV_DB_SCALE_ITEM(250, 0, 0),
65
65
3, 3, TLV_DB_SCALE_ITEM(450, 0, 0),
66
-
4, 4, TLV_DB_SCALE_ITEM(700, 0, 0),
67
-
5, 5, TLV_DB_SCALE_ITEM(1000, 0, 0),
68
-
6, 6, TLV_DB_SCALE_ITEM(1300, 0, 0),
69
-
7, 7, TLV_DB_SCALE_ITEM(1600, 0, 0),
70
-
8, 8, TLV_DB_SCALE_ITEM(1800, 0, 0),
71
-
9, 9, TLV_DB_SCALE_ITEM(2100, 0, 0),
72
-
10, 10, TLV_DB_SCALE_ITEM(2400, 0, 0),
66
+
4, 7, TLV_DB_SCALE_ITEM(700, 300, 0),
67
+
8, 10, TLV_DB_SCALE_ITEM(1800, 300, 0),
73
68
);
74
69
75
70
static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(hpout_vol_tlv,
+1
-1
sound/soc/codecs/lpass-rx-macro.c
+1
-1
sound/soc/codecs/lpass-rx-macro.c
+13
-15
sound/soc/codecs/lpass-va-macro.c
+13
-15
sound/soc/codecs/lpass-va-macro.c
···
189
189
struct device *dev;
190
190
unsigned long active_ch_mask[VA_MACRO_MAX_DAIS];
191
191
unsigned long active_ch_cnt[VA_MACRO_MAX_DAIS];
192
-
unsigned long active_decimator[VA_MACRO_MAX_DAIS];
193
192
u16 dmic_clk_div;
194
193
195
194
int dec_mode[VA_MACRO_NUM_DECIMATORS];
···
548
549
if (enable) {
549
550
set_bit(dec_id, &va->active_ch_mask[dai_id]);
550
551
va->active_ch_cnt[dai_id]++;
551
-
va->active_decimator[dai_id] = dec_id;
552
552
} else {
553
553
clear_bit(dec_id, &va->active_ch_mask[dai_id]);
554
554
va->active_ch_cnt[dai_id]--;
555
-
va->active_decimator[dai_id] = -1;
556
555
}
557
556
558
557
snd_soc_dapm_mixer_update_power(widget->dapm, kcontrol, enable, update);
···
877
880
struct va_macro *va = snd_soc_component_get_drvdata(component);
878
881
u16 tx_vol_ctl_reg, decimator;
879
882
880
-
decimator = va->active_decimator[dai->id];
881
-
882
-
tx_vol_ctl_reg = CDC_VA_TX0_TX_PATH_CTL +
883
-
VA_MACRO_TX_PATH_OFFSET * decimator;
884
-
if (mute)
885
-
snd_soc_component_update_bits(component, tx_vol_ctl_reg,
886
-
CDC_VA_TX_PATH_PGA_MUTE_EN_MASK,
887
-
CDC_VA_TX_PATH_PGA_MUTE_EN);
888
-
else
889
-
snd_soc_component_update_bits(component, tx_vol_ctl_reg,
890
-
CDC_VA_TX_PATH_PGA_MUTE_EN_MASK,
891
-
CDC_VA_TX_PATH_PGA_MUTE_DISABLE);
883
+
for_each_set_bit(decimator, &va->active_ch_mask[dai->id],
884
+
VA_MACRO_DEC_MAX) {
885
+
tx_vol_ctl_reg = CDC_VA_TX0_TX_PATH_CTL +
886
+
VA_MACRO_TX_PATH_OFFSET * decimator;
887
+
if (mute)
888
+
snd_soc_component_update_bits(component, tx_vol_ctl_reg,
889
+
CDC_VA_TX_PATH_PGA_MUTE_EN_MASK,
890
+
CDC_VA_TX_PATH_PGA_MUTE_EN);
891
+
else
892
+
snd_soc_component_update_bits(component, tx_vol_ctl_reg,
893
+
CDC_VA_TX_PATH_PGA_MUTE_EN_MASK,
894
+
CDC_VA_TX_PATH_PGA_MUTE_DISABLE);
895
+
}
892
896
893
897
return 0;
894
898
}
+11
-9
sound/soc/codecs/lpass-wsa-macro.c
+11
-9
sound/soc/codecs/lpass-wsa-macro.c
···
1211
1211
struct snd_kcontrol *kcontrol, int event)
1212
1212
{
1213
1213
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1214
-
u16 gain_reg;
1214
+
u16 path_reg, gain_reg;
1215
1215
int val;
1216
1216
1217
-
switch (w->reg) {
1218
-
case CDC_WSA_RX0_RX_PATH_MIX_CTL:
1217
+
switch (w->shift) {
1218
+
case WSA_MACRO_RX_MIX0:
1219
+
path_reg = CDC_WSA_RX0_RX_PATH_MIX_CTL;
1219
1220
gain_reg = CDC_WSA_RX0_RX_VOL_MIX_CTL;
1220
1221
break;
1221
-
case CDC_WSA_RX1_RX_PATH_MIX_CTL:
1222
+
case WSA_MACRO_RX_MIX1:
1223
+
path_reg = CDC_WSA_RX1_RX_PATH_MIX_CTL;
1222
1224
gain_reg = CDC_WSA_RX1_RX_VOL_MIX_CTL;
1223
1225
break;
1224
1226
default:
···
1233
1231
snd_soc_component_write(component, gain_reg, val);
1234
1232
break;
1235
1233
case SND_SOC_DAPM_POST_PMD:
1236
-
snd_soc_component_update_bits(component, w->reg,
1234
+
snd_soc_component_update_bits(component, path_reg,
1237
1235
CDC_WSA_RX_PATH_MIX_CLK_EN_MASK,
1238
1236
CDC_WSA_RX_PATH_MIX_CLK_DISABLE);
1239
1237
break;
···
2070
2068
SND_SOC_DAPM_MUX("WSA_RX0 INP0", SND_SOC_NOPM, 0, 0, &rx0_prim_inp0_mux),
2071
2069
SND_SOC_DAPM_MUX("WSA_RX0 INP1", SND_SOC_NOPM, 0, 0, &rx0_prim_inp1_mux),
2072
2070
SND_SOC_DAPM_MUX("WSA_RX0 INP2", SND_SOC_NOPM, 0, 0, &rx0_prim_inp2_mux),
2073
-
SND_SOC_DAPM_MUX_E("WSA_RX0 MIX INP", CDC_WSA_RX0_RX_PATH_MIX_CTL,
2074
-
0, 0, &rx0_mix_mux, wsa_macro_enable_mix_path,
2071
+
SND_SOC_DAPM_MUX_E("WSA_RX0 MIX INP", SND_SOC_NOPM, WSA_MACRO_RX_MIX0,
2072
+
0, &rx0_mix_mux, wsa_macro_enable_mix_path,
2075
2073
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
2076
2074
SND_SOC_DAPM_MUX("WSA_RX1 INP0", SND_SOC_NOPM, 0, 0, &rx1_prim_inp0_mux),
2077
2075
SND_SOC_DAPM_MUX("WSA_RX1 INP1", SND_SOC_NOPM, 0, 0, &rx1_prim_inp1_mux),
2078
2076
SND_SOC_DAPM_MUX("WSA_RX1 INP2", SND_SOC_NOPM, 0, 0, &rx1_prim_inp2_mux),
2079
-
SND_SOC_DAPM_MUX_E("WSA_RX1 MIX INP", CDC_WSA_RX1_RX_PATH_MIX_CTL,
2080
-
0, 0, &rx1_mix_mux, wsa_macro_enable_mix_path,
2077
+
SND_SOC_DAPM_MUX_E("WSA_RX1 MIX INP", SND_SOC_NOPM, WSA_MACRO_RX_MIX1,
2078
+
0, &rx1_mix_mux, wsa_macro_enable_mix_path,
2081
2079
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
2082
2080
2083
2081
SND_SOC_DAPM_MIXER_E("WSA_RX INT0 MIX", SND_SOC_NOPM, 0, 0, NULL, 0,
+2
sound/soc/codecs/rt1015.c
+2
sound/soc/codecs/rt1015.c
···
209
209
case RT1015_VENDOR_ID:
210
210
case RT1015_DEVICE_ID:
211
211
case RT1015_PRO_ALT:
212
+
case RT1015_MAN_I2C:
212
213
case RT1015_DAC3:
213
214
case RT1015_VBAT_TEST_OUT1:
214
215
case RT1015_VBAT_TEST_OUT2:
···
514
513
msleep(300);
515
514
regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x0008);
516
515
regmap_write(regmap, RT1015_SYS_RST1, 0x05F5);
516
+
regmap_write(regmap, RT1015_CLK_DET, 0x8000);
517
517
518
518
regcache_cache_bypass(regmap, false);
519
519
regcache_mark_dirty(regmap);
+2
-2
sound/soc/codecs/rt5640.c
+2
-2
sound/soc/codecs/rt5640.c
···
339
339
}
340
340
341
341
static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
342
-
static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
342
+
static const DECLARE_TLV_DB_MINMAX(dac_vol_tlv, -6562, 0);
343
343
static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
344
-
static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
344
+
static const DECLARE_TLV_DB_MINMAX(adc_vol_tlv, -1762, 3000);
345
345
static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
346
346
347
347
/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
+2
-2
sound/soc/codecs/rt5651.c
+2
-2
sound/soc/codecs/rt5651.c
···
285
285
}
286
286
287
287
static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
288
-
static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
288
+
static const DECLARE_TLV_DB_MINMAX(dac_vol_tlv, -6562, 0);
289
289
static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
290
-
static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
290
+
static const DECLARE_TLV_DB_MINMAX(adc_vol_tlv, -1762, 3000);
291
291
static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
292
292
293
293
/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
+5
sound/soc/codecs/rt5659.c
+5
sound/soc/codecs/rt5659.c
···
3426
3426
{
3427
3427
struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3428
3428
unsigned int reg_val = 0;
3429
+
int ret;
3429
3430
3430
3431
if (freq == rt5659->sysclk && clk_id == rt5659->sysclk_src)
3431
3432
return 0;
3432
3433
3433
3434
switch (clk_id) {
3434
3435
case RT5659_SCLK_S_MCLK:
3436
+
ret = clk_set_rate(rt5659->mclk, freq);
3437
+
if (ret)
3438
+
return ret;
3439
+
3435
3440
reg_val |= RT5659_SCLK_SRC_MCLK;
3436
3441
break;
3437
3442
case RT5659_SCLK_S_PLL1:
+96
-14
sound/soc/codecs/rt5670.c
+96
-14
sound/soc/codecs/rt5670.c
···
629
629
static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA,
630
630
RT5670_IF2_ADC_SEL_SFT, rt5670_data_select);
631
631
632
+
/*
633
+
* For reliable output-mute LED control we need a "DAC1 Playback Switch" control.
634
+
* We emulate this by only clearing the RT5670_M_DAC1_L/_R AD_DA_MIXER register
635
+
* bits when both our emulated DAC1 Playback Switch control and the DAC1 MIXL/R
636
+
* DAPM-mixer DAC1 input are enabled.
637
+
*/
638
+
static void rt5670_update_ad_da_mixer_dac1_m_bits(struct rt5670_priv *rt5670)
639
+
{
640
+
int val = RT5670_M_DAC1_L | RT5670_M_DAC1_R;
641
+
642
+
if (rt5670->dac1_mixl_dac1_switch && rt5670->dac1_playback_switch_l)
643
+
val &= ~RT5670_M_DAC1_L;
644
+
645
+
if (rt5670->dac1_mixr_dac1_switch && rt5670->dac1_playback_switch_r)
646
+
val &= ~RT5670_M_DAC1_R;
647
+
648
+
regmap_update_bits(rt5670->regmap, RT5670_AD_DA_MIXER,
649
+
RT5670_M_DAC1_L | RT5670_M_DAC1_R, val);
650
+
}
651
+
652
+
static int rt5670_dac1_playback_switch_get(struct snd_kcontrol *kcontrol,
653
+
struct snd_ctl_elem_value *ucontrol)
654
+
{
655
+
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
656
+
struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
657
+
658
+
ucontrol->value.integer.value[0] = rt5670->dac1_playback_switch_l;
659
+
ucontrol->value.integer.value[1] = rt5670->dac1_playback_switch_r;
660
+
661
+
return 0;
662
+
}
663
+
664
+
static int rt5670_dac1_playback_switch_put(struct snd_kcontrol *kcontrol,
665
+
struct snd_ctl_elem_value *ucontrol)
666
+
{
667
+
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
668
+
struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
669
+
670
+
if (rt5670->dac1_playback_switch_l == ucontrol->value.integer.value[0] &&
671
+
rt5670->dac1_playback_switch_r == ucontrol->value.integer.value[1])
672
+
return 0;
673
+
674
+
rt5670->dac1_playback_switch_l = ucontrol->value.integer.value[0];
675
+
rt5670->dac1_playback_switch_r = ucontrol->value.integer.value[1];
676
+
677
+
rt5670_update_ad_da_mixer_dac1_m_bits(rt5670);
678
+
679
+
return 1;
680
+
}
681
+
632
682
static const struct snd_kcontrol_new rt5670_snd_controls[] = {
633
683
/* Headphone Output Volume */
634
-
SOC_DOUBLE("HP Playback Switch", RT5670_HP_VOL,
635
-
RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
636
684
SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL,
637
685
RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
638
686
39, 1, out_vol_tlv),
639
687
/* OUTPUT Control */
640
-
SOC_DOUBLE("OUT Channel Switch", RT5670_LOUT1,
641
-
RT5670_VOL_L_SFT, RT5670_VOL_R_SFT, 1, 1),
642
688
SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1,
643
689
RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv),
644
690
/* DAC Digital Volume */
645
691
SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL,
646
692
RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1),
693
+
SOC_DOUBLE_EXT("DAC1 Playback Switch", SND_SOC_NOPM, 0, 1, 1, 0,
694
+
rt5670_dac1_playback_switch_get, rt5670_dac1_playback_switch_put),
647
695
SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL,
648
696
RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
649
697
175, 0, dac_vol_tlv),
···
961
913
RT5670_M_MONO_ADC_R2_SFT, 1, 1),
962
914
};
963
915
916
+
/* See comment above rt5670_update_ad_da_mixer_dac1_m_bits() */
917
+
static int rt5670_put_dac1_mix_dac1_switch(struct snd_kcontrol *kcontrol,
918
+
struct snd_ctl_elem_value *ucontrol)
919
+
{
920
+
struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value;
921
+
struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
922
+
struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
923
+
int ret;
924
+
925
+
if (mc->shift == 0)
926
+
rt5670->dac1_mixl_dac1_switch = ucontrol->value.integer.value[0];
927
+
else
928
+
rt5670->dac1_mixr_dac1_switch = ucontrol->value.integer.value[0];
929
+
930
+
/* Apply the update (if any) */
931
+
ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol);
932
+
if (ret == 0)
933
+
return 0;
934
+
935
+
rt5670_update_ad_da_mixer_dac1_m_bits(rt5670);
936
+
937
+
return 1;
938
+
}
939
+
940
+
#define SOC_DAPM_SINGLE_RT5670_DAC1_SW(name, shift) \
941
+
SOC_SINGLE_EXT(name, SND_SOC_NOPM, shift, 1, 0, \
942
+
snd_soc_dapm_get_volsw, rt5670_put_dac1_mix_dac1_switch)
943
+
964
944
static const struct snd_kcontrol_new rt5670_dac_l_mix[] = {
965
945
SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
966
946
RT5670_M_ADCMIX_L_SFT, 1, 1),
967
-
SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
968
-
RT5670_M_DAC1_L_SFT, 1, 1),
947
+
SOC_DAPM_SINGLE_RT5670_DAC1_SW("DAC1 Switch", 0),
969
948
};
970
949
971
950
static const struct snd_kcontrol_new rt5670_dac_r_mix[] = {
972
951
SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
973
952
RT5670_M_ADCMIX_R_SFT, 1, 1),
974
-
SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
975
-
RT5670_M_DAC1_R_SFT, 1, 1),
953
+
SOC_DAPM_SINGLE_RT5670_DAC1_SW("DAC1 Switch", 1),
976
954
};
977
955
978
956
static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = {
···
1730
1656
RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0),
1731
1657
SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2,
1732
1658
RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0),
1733
-
SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", RT5670_STO1_ADC_DIG_VOL,
1734
-
RT5670_L_MUTE_SFT, 1, rt5670_sto1_adc_l_mix,
1735
-
ARRAY_SIZE(rt5670_sto1_adc_l_mix)),
1736
-
SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", RT5670_STO1_ADC_DIG_VOL,
1737
-
RT5670_R_MUTE_SFT, 1, rt5670_sto1_adc_r_mix,
1738
-
ARRAY_SIZE(rt5670_sto1_adc_r_mix)),
1659
+
SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
1660
+
rt5670_sto1_adc_l_mix, ARRAY_SIZE(rt5670_sto1_adc_l_mix)),
1661
+
SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
1662
+
rt5670_sto1_adc_r_mix, ARRAY_SIZE(rt5670_sto1_adc_r_mix)),
1739
1663
SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0,
1740
1664
rt5670_sto2_adc_l_mix,
1741
1665
ARRAY_SIZE(rt5670_sto2_adc_l_mix)),
···
3070
2998
rt5670->jd_mode = 3;
3071
2999
dev_info(&i2c->dev, "quirk JD mode 3\n");
3072
3000
}
3001
+
3002
+
/*
3003
+
* Enable the emulated "DAC1 Playback Switch" by default to avoid
3004
+
* muting the output with older UCM profiles.
3005
+
*/
3006
+
rt5670->dac1_playback_switch_l = true;
3007
+
rt5670->dac1_playback_switch_r = true;
3008
+
/* The Power-On-Reset values for the DAC1 mixer have the DAC1 input enabled. */
3009
+
rt5670->dac1_mixl_dac1_switch = true;
3010
+
rt5670->dac1_mixr_dac1_switch = true;
3073
3011
3074
3012
rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap);
3075
3013
if (IS_ERR(rt5670->regmap)) {
+5
-4
sound/soc/codecs/rt5670.h
+5
-4
sound/soc/codecs/rt5670.h
···
212
212
/* global definition */
213
213
#define RT5670_L_MUTE (0x1 << 15)
214
214
#define RT5670_L_MUTE_SFT 15
215
-
#define RT5670_VOL_L_MUTE (0x1 << 14)
216
-
#define RT5670_VOL_L_SFT 14
217
215
#define RT5670_R_MUTE (0x1 << 7)
218
216
#define RT5670_R_MUTE_SFT 7
219
-
#define RT5670_VOL_R_MUTE (0x1 << 6)
220
-
#define RT5670_VOL_R_SFT 6
221
217
#define RT5670_L_VOL_MASK (0x3f << 8)
222
218
#define RT5670_L_VOL_SFT 8
223
219
#define RT5670_R_VOL_MASK (0x3f)
···
2013
2017
int dsp_rate;
2014
2018
int jack_type;
2015
2019
int jack_type_saved;
2020
+
2021
+
bool dac1_mixl_dac1_switch;
2022
+
bool dac1_mixr_dac1_switch;
2023
+
bool dac1_playback_switch_l;
2024
+
bool dac1_playback_switch_r;
2016
2025
};
2017
2026
2018
2027
void rt5670_jack_suspend(struct snd_soc_component *component);
+8
sound/soc/codecs/rt711.c
+8
sound/soc/codecs/rt711.c
···
895
895
return 0;
896
896
}
897
897
898
+
static void rt711_remove(struct snd_soc_component *component)
899
+
{
900
+
struct rt711_priv *rt711 = snd_soc_component_get_drvdata(component);
901
+
902
+
regcache_cache_only(rt711->regmap, true);
903
+
}
904
+
898
905
static const struct snd_soc_component_driver soc_codec_dev_rt711 = {
899
906
.probe = rt711_probe,
900
907
.set_bias_level = rt711_set_bias_level,
···
912
905
.dapm_routes = rt711_audio_map,
913
906
.num_dapm_routes = ARRAY_SIZE(rt711_audio_map),
914
907
.set_jack = rt711_set_jack_detect,
908
+
.remove = rt711_remove,
915
909
};
916
910
917
911
static int rt711_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
+1
-1
sound/soc/codecs/sgtl5000.c
+1
-1
sound/soc/codecs/sgtl5000.c
···
71
71
{ SGTL5000_DAP_EQ_BASS_BAND4, 0x002f },
72
72
{ SGTL5000_DAP_MAIN_CHAN, 0x8000 },
73
73
{ SGTL5000_DAP_MIX_CHAN, 0x0000 },
74
-
{ SGTL5000_DAP_AVC_CTRL, 0x0510 },
74
+
{ SGTL5000_DAP_AVC_CTRL, 0x5100 },
75
75
{ SGTL5000_DAP_AVC_THRESHOLD, 0x1473 },
76
76
{ SGTL5000_DAP_AVC_ATTACK, 0x0028 },
77
77
{ SGTL5000_DAP_AVC_DECAY, 0x0050 },
-124
sound/soc/codecs/sirf-audio-codec.h
-124
sound/soc/codecs/sirf-audio-codec.h
···
1
-
/* SPDX-License-Identifier: GPL-2.0-or-later */
2
-
/*
3
-
* SiRF inner codec controllers define
4
-
*
5
-
* Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
6
-
*/
7
-
8
-
#ifndef _SIRF_AUDIO_CODEC_H
9
-
#define _SIRF_AUDIO_CODEC_H
10
-
11
-
12
-
#define AUDIO_IC_CODEC_PWR (0x00E0)
13
-
#define AUDIO_IC_CODEC_CTRL0 (0x00E4)
14
-
#define AUDIO_IC_CODEC_CTRL1 (0x00E8)
15
-
#define AUDIO_IC_CODEC_CTRL2 (0x00EC)
16
-
#define AUDIO_IC_CODEC_CTRL3 (0x00F0)
17
-
18
-
#define MICBIASEN (1 << 3)
19
-
20
-
#define IC_RDACEN (1 << 0)
21
-
#define IC_LDACEN (1 << 1)
22
-
#define IC_HSREN (1 << 2)
23
-
#define IC_HSLEN (1 << 3)
24
-
#define IC_SPEN (1 << 4)
25
-
#define IC_CPEN (1 << 5)
26
-
27
-
#define IC_HPRSELR (1 << 6)
28
-
#define IC_HPLSELR (1 << 7)
29
-
#define IC_HPRSELL (1 << 8)
30
-
#define IC_HPLSELL (1 << 9)
31
-
#define IC_SPSELR (1 << 10)
32
-
#define IC_SPSELL (1 << 11)
33
-
34
-
#define IC_MONOR (1 << 12)
35
-
#define IC_MONOL (1 << 13)
36
-
37
-
#define IC_RXOSRSEL (1 << 28)
38
-
#define IC_CPFREQ (1 << 29)
39
-
#define IC_HSINVEN (1 << 30)
40
-
41
-
#define IC_MICINREN (1 << 0)
42
-
#define IC_MICINLEN (1 << 1)
43
-
#define IC_MICIN1SEL (1 << 2)
44
-
#define IC_MICIN2SEL (1 << 3)
45
-
#define IC_MICDIFSEL (1 << 4)
46
-
#define IC_LINEIN1SEL (1 << 5)
47
-
#define IC_LINEIN2SEL (1 << 6)
48
-
#define IC_RADCEN (1 << 7)
49
-
#define IC_LADCEN (1 << 8)
50
-
#define IC_ALM (1 << 9)
51
-
52
-
#define IC_DIGMICEN (1 << 22)
53
-
#define IC_DIGMICFREQ (1 << 23)
54
-
#define IC_ADC14B_12 (1 << 24)
55
-
#define IC_FIRDAC_HSL_EN (1 << 25)
56
-
#define IC_FIRDAC_HSR_EN (1 << 26)
57
-
#define IC_FIRDAC_LOUT_EN (1 << 27)
58
-
#define IC_POR (1 << 28)
59
-
#define IC_CODEC_CLK_EN (1 << 29)
60
-
#define IC_HP_3DB_BOOST (1 << 30)
61
-
62
-
#define IC_ADC_LEFT_GAIN_SHIFT 16
63
-
#define IC_ADC_RIGHT_GAIN_SHIFT 10
64
-
#define IC_ADC_GAIN_MASK 0x3F
65
-
#define IC_MIC_MAX_GAIN 0x39
66
-
67
-
#define IC_RXPGAR_MASK 0x3F
68
-
#define IC_RXPGAR_SHIFT 14
69
-
#define IC_RXPGAL_MASK 0x3F
70
-
#define IC_RXPGAL_SHIFT 21
71
-
#define IC_RXPGAR 0x7B
72
-
#define IC_RXPGAL 0x7B
73
-
74
-
#define AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK 0x3F
75
-
#define AUDIO_PORT_TX_FIFO_SC_OFFSET 0
76
-
#define AUDIO_PORT_TX_FIFO_LC_OFFSET 10
77
-
#define AUDIO_PORT_TX_FIFO_HC_OFFSET 20
78
-
79
-
#define TX_FIFO_SC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \
80
-
<< AUDIO_PORT_TX_FIFO_SC_OFFSET)
81
-
#define TX_FIFO_LC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \
82
-
<< AUDIO_PORT_TX_FIFO_LC_OFFSET)
83
-
#define TX_FIFO_HC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \
84
-
<< AUDIO_PORT_TX_FIFO_HC_OFFSET)
85
-
86
-
#define AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK 0x0F
87
-
#define AUDIO_PORT_RX_FIFO_SC_OFFSET 0
88
-
#define AUDIO_PORT_RX_FIFO_LC_OFFSET 10
89
-
#define AUDIO_PORT_RX_FIFO_HC_OFFSET 20
90
-
91
-
#define RX_FIFO_SC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \
92
-
<< AUDIO_PORT_RX_FIFO_SC_OFFSET)
93
-
#define RX_FIFO_LC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \
94
-
<< AUDIO_PORT_RX_FIFO_LC_OFFSET)
95
-
#define RX_FIFO_HC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \
96
-
<< AUDIO_PORT_RX_FIFO_HC_OFFSET)
97
-
#define AUDIO_PORT_IC_CODEC_TX_CTRL (0x00F4)
98
-
#define AUDIO_PORT_IC_CODEC_RX_CTRL (0x00F8)
99
-
100
-
#define AUDIO_PORT_IC_TXFIFO_OP (0x00FC)
101
-
#define AUDIO_PORT_IC_TXFIFO_LEV_CHK (0x0100)
102
-
#define AUDIO_PORT_IC_TXFIFO_STS (0x0104)
103
-
#define AUDIO_PORT_IC_TXFIFO_INT (0x0108)
104
-
#define AUDIO_PORT_IC_TXFIFO_INT_MSK (0x010C)
105
-
106
-
#define AUDIO_PORT_IC_RXFIFO_OP (0x0110)
107
-
#define AUDIO_PORT_IC_RXFIFO_LEV_CHK (0x0114)
108
-
#define AUDIO_PORT_IC_RXFIFO_STS (0x0118)
109
-
#define AUDIO_PORT_IC_RXFIFO_INT (0x011C)
110
-
#define AUDIO_PORT_IC_RXFIFO_INT_MSK (0x0120)
111
-
112
-
#define AUDIO_FIFO_START (1 << 0)
113
-
#define AUDIO_FIFO_RESET (1 << 1)
114
-
115
-
#define AUDIO_FIFO_FULL (1 << 0)
116
-
#define AUDIO_FIFO_EMPTY (1 << 1)
117
-
#define AUDIO_FIFO_OFLOW (1 << 2)
118
-
#define AUDIO_FIFO_UFLOW (1 << 3)
119
-
120
-
#define IC_TX_ENABLE (0x03)
121
-
#define IC_RX_ENABLE_MONO (0x01)
122
-
#define IC_RX_ENABLE_STEREO (0x03)
123
-
124
-
#endif /*__SIRF_AUDIO_CODEC_H*/
+6
sound/soc/codecs/wcd934x.c
+6
sound/soc/codecs/wcd934x.c
···
1873
1873
1874
1874
wcd = snd_soc_component_get_drvdata(dai->component);
1875
1875
1876
+
if (tx_num > WCD934X_TX_MAX || rx_num > WCD934X_RX_MAX) {
1877
+
dev_err(wcd->dev, "Invalid tx %d or rx %d channel count\n",
1878
+
tx_num, rx_num);
1879
+
return -EINVAL;
1880
+
}
1881
+
1876
1882
if (!tx_slot || !rx_slot) {
1877
1883
dev_err(wcd->dev, "Invalid tx_slot=%p, rx_slot=%p\n",
1878
1884
tx_slot, rx_slot);
+4
-2
sound/soc/fsl/fsl_ssi.c
+4
-2
sound/soc/fsl/fsl_ssi.c
···
878
878
static int _fsl_ssi_set_dai_fmt(struct fsl_ssi *ssi, unsigned int fmt)
879
879
{
880
880
u32 strcr = 0, scr = 0, stcr, srcr, mask;
881
+
unsigned int slots;
881
882
882
883
ssi->dai_fmt = fmt;
883
884
···
910
909
return -EINVAL;
911
910
}
912
911
912
+
slots = ssi->slots ? : 2;
913
913
regmap_update_bits(ssi->regs, REG_SSI_STCCR,
914
-
SSI_SxCCR_DC_MASK, SSI_SxCCR_DC(2));
914
+
SSI_SxCCR_DC_MASK, SSI_SxCCR_DC(slots));
915
915
regmap_update_bits(ssi->regs, REG_SSI_SRCCR,
916
-
SSI_SxCCR_DC_MASK, SSI_SxCCR_DC(2));
916
+
SSI_SxCCR_DC_MASK, SSI_SxCCR_DC(slots));
917
917
918
918
/* Data on rising edge of bclk, frame low, 1clk before data */
919
919
strcr |= SSI_STCR_TFSI | SSI_STCR_TSCKP | SSI_STCR_TEFS;
+7
-6
sound/soc/generic/simple-card-utils.c
+7
-6
sound/soc/generic/simple-card-utils.c
···
172
172
* or device's module clock.
173
173
*/
174
174
clk = devm_get_clk_from_child(dev, node, NULL);
175
-
if (IS_ERR(clk))
176
-
clk = devm_get_clk_from_child(dev, dlc->of_node, NULL);
177
-
178
175
if (!IS_ERR(clk)) {
179
-
simple_dai->clk = clk;
180
176
simple_dai->sysclk = clk_get_rate(clk);
181
-
} else if (!of_property_read_u32(node, "system-clock-frequency",
182
-
&val)) {
177
+
178
+
simple_dai->clk = clk;
179
+
} else if (!of_property_read_u32(node, "system-clock-frequency", &val)) {
183
180
simple_dai->sysclk = val;
181
+
} else {
182
+
clk = devm_get_clk_from_child(dev, dlc->of_node, NULL);
183
+
if (!IS_ERR(clk))
184
+
simple_dai->sysclk = clk_get_rate(clk);
184
185
}
185
186
186
187
if (of_property_read_bool(node, "system-clock-direction-out"))
+1
-1
sound/soc/intel/boards/bytcr_rt5640.c
+1
-1
sound/soc/intel/boards/bytcr_rt5640.c
+3
-1
sound/soc/mediatek/mt8192/mt8192-dai-tdm.c
+3
-1
sound/soc/mediatek/mt8192/mt8192-dai-tdm.c
···
555
555
556
556
/* set tdm */
557
557
if (tdm_priv->bck_invert)
558
-
tdm_con |= 1 << BCK_INVERSE_SFT;
558
+
regmap_update_bits(afe->regmap, AUDIO_TOP_CON3,
559
+
BCK_INVERSE_MASK_SFT,
560
+
0x1 << BCK_INVERSE_SFT);
559
561
560
562
if (tdm_priv->lck_invert)
561
563
tdm_con |= 1 << LRCK_INVERSE_SFT;
+5
-3
sound/soc/mediatek/mt8192/mt8192-reg.h
+5
-3
sound/soc/mediatek/mt8192/mt8192-reg.h
···
21
21
/*****************************************************************************
22
22
* R E G I S T E R D E F I N I T I O N
23
23
*****************************************************************************/
24
+
/* AUDIO_TOP_CON3 */
25
+
#define BCK_INVERSE_SFT 3
26
+
#define BCK_INVERSE_MASK 0x1
27
+
#define BCK_INVERSE_MASK_SFT (0x1 << 3)
28
+
24
29
/* AFE_DAC_CON0 */
25
30
#define VUL12_ON_SFT 31
26
31
#define VUL12_ON_MASK 0x1
···
2084
2079
#define TDM_EN_SFT 0
2085
2080
#define TDM_EN_MASK 0x1
2086
2081
#define TDM_EN_MASK_SFT (0x1 << 0)
2087
-
#define BCK_INVERSE_SFT 1
2088
-
#define BCK_INVERSE_MASK 0x1
2089
-
#define BCK_INVERSE_MASK_SFT (0x1 << 1)
2090
2082
#define LRCK_INVERSE_SFT 2
2091
2083
#define LRCK_INVERSE_MASK 0x1
2092
2084
#define LRCK_INVERSE_MASK_SFT (0x1 << 2)
+1
-1
sound/soc/qcom/lpass-cpu.c
+1
-1
sound/soc/qcom/lpass-cpu.c
+3
-3
sound/soc/qcom/sdm845.c
+3
-3
sound/soc/qcom/sdm845.c
···
27
27
#define SPK_TDM_RX_MASK 0x03
28
28
#define NUM_TDM_SLOTS 8
29
29
#define SLIM_MAX_TX_PORTS 16
30
-
#define SLIM_MAX_RX_PORTS 16
30
+
#define SLIM_MAX_RX_PORTS 13
31
31
#define WCD934X_DEFAULT_MCLK_RATE 9600000
32
32
33
33
struct sdm845_snd_data {
34
34
struct snd_soc_jack jack;
35
35
bool jack_setup;
36
-
bool stream_prepared[SLIM_MAX_RX_PORTS];
36
+
bool stream_prepared[AFE_PORT_MAX];
37
37
struct snd_soc_card *card;
38
38
uint32_t pri_mi2s_clk_count;
39
39
uint32_t sec_mi2s_clk_count;
40
40
uint32_t quat_tdm_clk_count;
41
-
struct sdw_stream_runtime *sruntime[SLIM_MAX_RX_PORTS];
41
+
struct sdw_stream_runtime *sruntime[AFE_PORT_MAX];
42
42
};
43
43
44
44
static unsigned int tdm_slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
+4
sound/soc/soc-core.c
+4
sound/soc/soc-core.c
···
31
31
#include <linux/of.h>
32
32
#include <linux/of_graph.h>
33
33
#include <linux/dmi.h>
34
+
#include <linux/acpi.h>
34
35
#include <sound/core.h>
35
36
#include <sound/pcm.h>
36
37
#include <sound/pcm_params.h>
···
1573
1572
1574
1573
if (card->long_name)
1575
1574
return 0; /* long name already set by driver or from DMI */
1575
+
1576
+
if (!is_acpi_device_node(card->dev->fwnode))
1577
+
return 0;
1576
1578
1577
1579
/* make up dmi long name as: vendor-product-version-board */
1578
1580
vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
+1
-1
sound/soc/sof/intel/hda-dsp.c
+1
-1
sound/soc/sof/intel/hda-dsp.c
···
207
207
208
208
ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR,
209
209
HDA_DSP_REG_ADSPCS, adspcs,
210
-
!(adspcs & HDA_DSP_ADSPCS_SPA_MASK(core_mask)),
210
+
!(adspcs & HDA_DSP_ADSPCS_CPA_MASK(core_mask)),
211
211
HDA_DSP_REG_POLL_INTERVAL_US,
212
212
HDA_DSP_PD_TIMEOUT * USEC_PER_MSEC);
213
213
if (ret < 0)
+1
sound/soc/sof/intel/hda.c
+1
sound/soc/sof/intel/hda.c
+2
-2
sound/usb/mixer_quirks.c
+2
-2
sound/usb/mixer_quirks.c
···
2883
2883
u8 group = (private_value & SND_DJM_GROUP_MASK) >> SND_DJM_GROUP_SHIFT;
2884
2884
u16 value = elem->value.enumerated.item[0];
2885
2885
2886
-
kctl->private_value = ((device << SND_DJM_DEVICE_SHIFT) |
2886
+
kctl->private_value = (((unsigned long)device << SND_DJM_DEVICE_SHIFT) |
2887
2887
(group << SND_DJM_GROUP_SHIFT) |
2888
2888
value);
2889
2889
···
2921
2921
value = device->controls[i].default_value;
2922
2922
knew.name = device->controls[i].name;
2923
2923
knew.private_value = (
2924
-
(device_idx << SND_DJM_DEVICE_SHIFT) |
2924
+
((unsigned long)device_idx << SND_DJM_DEVICE_SHIFT) |
2925
2925
(i << SND_DJM_GROUP_SHIFT) |
2926
2926
value);
2927
2927
err = snd_djm_controls_update(mixer, device_idx, i, value);