Merge branch 'net-stmmac-dwmac-loongson-add-loongson-2k3000-support'

+42 -28

1 changed file

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drivers

net

ethernet

stmicro

stmmac

dwmac-loongson.c

+42 -28

drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c

··· 66 66 DMA_STATUS_TPS | DMA_STATUS_TI | \ 67 67 DMA_STATUS_MSK_COMMON_LOONGSON) 68 68 69 - #define PCI_DEVICE_ID_LOONGSON_GMAC 0x7a03 69 + #define PCI_DEVICE_ID_LOONGSON_GMAC1 0x7a03 70 + #define PCI_DEVICE_ID_LOONGSON_GMAC2 0x7a23 70 71 #define PCI_DEVICE_ID_LOONGSON_GNET 0x7a13 71 - #define DWMAC_CORE_LS_MULTICHAN 0x10 /* Loongson custom ID */ 72 - #define CHANNEL_NUM 8 72 + #define DWMAC_CORE_MULTICHAN_V1 0x10 /* Loongson custom ID 0x10 */ 73 + #define DWMAC_CORE_MULTICHAN_V2 0x12 /* Loongson custom ID 0x12 */ 73 74 74 75 struct loongson_data { 76 + u32 multichan; 75 77 u32 loongson_id; 76 78 struct device *dev; 77 79 }; ··· 121 119 plat->dma_cfg->pbl = 32; 122 120 plat->dma_cfg->pblx8 = true; 123 121 124 - if (ld->loongson_id == DWMAC_CORE_LS_MULTICHAN) { 125 - plat->rx_queues_to_use = CHANNEL_NUM; 126 - plat->tx_queues_to_use = CHANNEL_NUM; 122 + switch (ld->loongson_id) { 123 + case DWMAC_CORE_MULTICHAN_V1: 124 + ld->multichan = 1; 125 + plat->rx_queues_to_use = 8; 126 + plat->tx_queues_to_use = 8; 127 127 128 128 /* Only channel 0 supports checksum, 129 129 * so turn off checksum to enable multiple channels. 130 130 */ 131 - for (int i = 1; i < CHANNEL_NUM; i++) 131 + for (int i = 1; i < 8; i++) 132 132 plat->tx_queues_cfg[i].coe_unsupported = 1; 133 - } else { 133 + 134 + break; 135 + case DWMAC_CORE_MULTICHAN_V2: 136 + ld->multichan = 1; 137 + plat->rx_queues_to_use = 4; 138 + plat->tx_queues_to_use = 4; 139 + break; 140 + default: 141 + ld->multichan = 0; 134 142 plat->tx_queues_to_use = 1; 135 143 plat->rx_queues_to_use = 1; 144 + break; 136 145 } 137 146 } 138 147 ··· 341 328 return NULL; 342 329 343 330 /* The Loongson GMAC and GNET devices are based on the DW GMAC 344 - * v3.50a and v3.73a IP-cores. But the HW designers have changed the 345 - * GMAC_VERSION.SNPSVER field to the custom 0x10 value on the 346 - * network controllers with the multi-channels feature 331 + * v3.50a and v3.73a IP-cores. But the HW designers have changed 332 + * the GMAC_VERSION.SNPSVER field to the custom 0x10/0x12 value 333 + * on the network controllers with the multi-channels feature 347 334 * available to emphasize the differences: multiple DMA-channels, 348 335 * AV feature and GMAC_INT_STATUS CSR flags layout. Get back the 349 336 * original value so the correct HW-interface would be selected. 350 337 */ 351 - if (ld->loongson_id == DWMAC_CORE_LS_MULTICHAN) { 338 + if (ld->multichan) { 352 339 priv->synopsys_id = DWMAC_CORE_3_70; 353 340 *dma = dwmac1000_dma_ops; 354 341 dma->init_chan = loongson_dwmac_dma_init_channel; ··· 369 356 if (mac->multicast_filter_bins) 370 357 mac->mcast_bits_log2 = ilog2(mac->multicast_filter_bins); 371 358 372 - /* Loongson GMAC doesn't support the flow control. LS2K2000 373 - * GNET doesn't support the half-duplex link mode. 359 + /* Loongson GMAC doesn't support the flow control. Loongson GNET 360 + * without multi-channel doesn't support the half-duplex link mode. 374 361 */ 375 - if (pdev->device == PCI_DEVICE_ID_LOONGSON_GMAC) { 362 + if (pdev->device != PCI_DEVICE_ID_LOONGSON_GNET) { 376 363 mac->link.caps = MAC_10 | MAC_100 | MAC_1000; 377 364 } else { 378 - if (ld->loongson_id == DWMAC_CORE_LS_MULTICHAN) 365 + if (ld->multichan) 379 366 mac->link.caps = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | 380 367 MAC_10 | MAC_100 | MAC_1000; 381 368 else ··· 404 391 struct plat_stmmacenet_data *plat, 405 392 struct stmmac_resources *res) 406 393 { 407 - int i, ret, vecs; 394 + int i, ch_num, ret, vecs; 408 395 409 - vecs = roundup_pow_of_two(CHANNEL_NUM * 2 + 1); 396 + ch_num = min(plat->tx_queues_to_use, plat->rx_queues_to_use); 397 + 398 + vecs = roundup_pow_of_two(ch_num * 2 + 1); 410 399 ret = pci_alloc_irq_vectors(pdev, vecs, vecs, PCI_IRQ_MSI); 411 400 if (ret < 0) { 412 401 dev_warn(&pdev->dev, "Failed to allocate MSI IRQs\n"); ··· 417 402 418 403 res->irq = pci_irq_vector(pdev, 0); 419 404 420 - for (i = 0; i < plat->rx_queues_to_use; i++) { 421 - res->rx_irq[CHANNEL_NUM - 1 - i] = 422 - pci_irq_vector(pdev, 1 + i * 2); 405 + for (i = 0; i < ch_num; i++) { 406 + res->rx_irq[ch_num - 1 - i] = pci_irq_vector(pdev, 1 + i * 2); 423 407 } 424 408 425 - for (i = 0; i < plat->tx_queues_to_use; i++) { 426 - res->tx_irq[CHANNEL_NUM - 1 - i] = 427 - pci_irq_vector(pdev, 2 + i * 2); 409 + for (i = 0; i < ch_num; i++) { 410 + res->tx_irq[ch_num - 1 - i] = pci_irq_vector(pdev, 2 + i * 2); 428 411 } 429 412 430 413 plat->flags |= STMMAC_FLAG_MULTI_MSI_EN; ··· 584 571 goto err_disable_device; 585 572 586 573 /* Use the common MAC IRQ if per-channel MSIs allocation failed */ 587 - if (ld->loongson_id == DWMAC_CORE_LS_MULTICHAN) 574 + if (ld->multichan) 588 575 loongson_dwmac_msi_config(pdev, plat, &res); 589 576 590 577 ret = stmmac_dvr_probe(&pdev->dev, plat, &res); ··· 596 583 err_plat_clear: 597 584 if (dev_of_node(&pdev->dev)) 598 585 loongson_dwmac_dt_clear(pdev, plat); 599 - if (ld->loongson_id == DWMAC_CORE_LS_MULTICHAN) 586 + if (ld->multichan) 600 587 loongson_dwmac_msi_clear(pdev); 601 588 err_disable_device: 602 589 pci_disable_device(pdev); ··· 615 602 if (dev_of_node(&pdev->dev)) 616 603 loongson_dwmac_dt_clear(pdev, priv->plat); 617 604 618 - if (ld->loongson_id == DWMAC_CORE_LS_MULTICHAN) 605 + if (ld->multichan) 619 606 loongson_dwmac_msi_clear(pdev); 620 607 621 608 pci_disable_device(pdev); ··· 660 647 loongson_dwmac_resume); 661 648 662 649 static const struct pci_device_id loongson_dwmac_id_table[] = { 663 - { PCI_DEVICE_DATA(LOONGSON, GMAC, &loongson_gmac_pci_info) }, 650 + { PCI_DEVICE_DATA(LOONGSON, GMAC1, &loongson_gmac_pci_info) }, 651 + { PCI_DEVICE_DATA(LOONGSON, GMAC2, &loongson_gmac_pci_info) }, 664 652 { PCI_DEVICE_DATA(LOONGSON, GNET, &loongson_gnet_pci_info) }, 665 653 {} 666 654 };

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