ASoC: qcom: volume fixes and codec cleanups

Merge series from Johan Hovold <johan+linaro@kernel.org>:

To reduce the risk of speaker damage the PA gain needs to be limited on
machines like the Lenovo Thinkpad X13s until we have active speaker
protection in place.

Limit the gain to the current default setting provided by the UCM
configuration which most user have so far been using (due to a bug in
the configuration files which prevented hardware volume control [1]).

The wsa883x PA volume control also turned out to be broken, which meant
that the default setting used by UCM configuration is actually the
lowest level (-3 dB). With the codec driver fixed, hardware volume
control also works as expected.

Note that the new wsa884x driver most likely suffers from a similar bug,
I'll send a fix for that once I've got that confirmed.

Included is also a related fix for the LPASS WSA macro driver, which
was changing the digital gain setting behind the back of user space and
which can result in excessive (or too low) digital gain.

There are further Qualcomm codec drivers that similarly appear to
manipulate various gain settings, but on closer inspection it turns out
that they only write back the current settings. Tests reveal that these
writes are indeed needed for any prior updates to take effect (at least
for the WSA and RX macros).

[1] https://github.com/alsa-project/alsa-ucm-conf/pull/382

Mark Brown 2 years ago 7c70825d 7c834a72

+5 -12

3 changed files

expand all

sound

soc

codecs

lpass-wsa-macro.c

wcd9335.c

wsa883x.c

-7

sound/soc/codecs/lpass-wsa-macro.c

··· 1584 1584 u16 gain_reg; 1585 1585 u16 reg; 1586 1586 int val; 1587 - int offset_val = 0; 1588 1587 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); 1589 1588 1590 1589 if (w->shift == WSA_MACRO_COMP1) { ··· 1622 1623 CDC_WSA_RX1_RX_PATH_MIX_SEC0, 1623 1624 CDC_WSA_RX_PGA_HALF_DB_MASK, 1624 1625 CDC_WSA_RX_PGA_HALF_DB_ENABLE); 1625 - offset_val = -2; 1626 1626 } 1627 1627 val = snd_soc_component_read(component, gain_reg); 1628 - val += offset_val; 1629 1628 snd_soc_component_write(component, gain_reg, val); 1630 1629 wsa_macro_config_ear_spkr_gain(component, wsa, 1631 1630 event, gain_reg); ··· 1651 1654 CDC_WSA_RX1_RX_PATH_MIX_SEC0, 1652 1655 CDC_WSA_RX_PGA_HALF_DB_MASK, 1653 1656 CDC_WSA_RX_PGA_HALF_DB_DISABLE); 1654 - offset_val = 2; 1655 - val = snd_soc_component_read(component, gain_reg); 1656 - val += offset_val; 1657 - snd_soc_component_write(component, gain_reg, val); 1658 1657 } 1659 1658 wsa_macro_config_ear_spkr_gain(component, wsa, 1660 1659 event, gain_reg);

-4

sound/soc/codecs/wcd9335.c

··· 3033 3033 { 3034 3034 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); 3035 3035 u16 gain_reg; 3036 - int offset_val = 0; 3037 3036 int val = 0; 3038 3037 3039 3038 switch (w->reg) { ··· 3072 3073 switch (event) { 3073 3074 case SND_SOC_DAPM_POST_PMU: 3074 3075 val = snd_soc_component_read(comp, gain_reg); 3075 - val += offset_val; 3076 3076 snd_soc_component_write(comp, gain_reg, val); 3077 3077 break; 3078 3078 case SND_SOC_DAPM_POST_PMD: ··· 3292 3294 u16 gain_reg; 3293 3295 u16 reg; 3294 3296 int val; 3295 - int offset_val = 0; 3296 3297 3297 3298 if (!(snd_soc_dapm_widget_name_cmp(w, "RX INT0 INTERP"))) { 3298 3299 reg = WCD9335_CDC_RX0_RX_PATH_CTL; ··· 3334 3337 case SND_SOC_DAPM_POST_PMU: 3335 3338 wcd9335_config_compander(comp, w->shift, event); 3336 3339 val = snd_soc_component_read(comp, gain_reg); 3337 - val += offset_val; 3338 3340 snd_soc_component_write(comp, gain_reg, val); 3339 3341 break; 3340 3342 case SND_SOC_DAPM_POST_PMD:

+5 -1

sound/soc/codecs/wsa883x.c

··· 1098 1098 return 1; 1099 1099 } 1100 1100 1101 - static const DECLARE_TLV_DB_SCALE(pa_gain, -300, 150, -300); 1101 + static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(pa_gain, 1102 + 0, 14, TLV_DB_SCALE_ITEM(-300, 0, 0), 1103 + 15, 29, TLV_DB_SCALE_ITEM(-300, 150, 0), 1104 + 30, 31, TLV_DB_SCALE_ITEM(1800, 0, 0), 1105 + ); 1102 1106 1103 1107 static int wsa883x_get_swr_port(struct snd_kcontrol *kcontrol, 1104 1108 struct snd_ctl_elem_value *ucontrol)

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