Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'sound-6.9-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound fixes from Takashi Iwai:
"As usual in a late stage, we received a fair amount of fixes for ASoC,
and it became bigger than wished. But all fixes are rather device-
specific, and they look pretty safe to apply.
A major par of changes are series of fixes for ASoC meson and SOF
drivers as well as for Realtek and Cirrus codecs. In addition, recent
emu10k1 regression fixes and usual HD-audio quirks are included"
* tag 'sound-6.9-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (46 commits)
ALSA: hda/realtek: Fix build error without CONFIG_PM
ALSA: hda/realtek: Fix conflicting PCI SSID 17aa:386f for Lenovo Legion models
ALSA: hda/realtek - Set GPIO3 to default at S4 state for Thinkpad with ALC1318
ALSA: hda: intel-sdw-acpi: fix usage of device_get_named_child_node()
ALSA: hda: intel-dsp-config: harden I2C/I2S codec detection
ASoC: cs35l56: fix usages of device_get_named_child_node()
ASoC: da7219-aad: fix usage of device_get_named_child_node()
ASoC: meson: cards: select SND_DYNAMIC_MINORS
ASoC: meson: axg-tdm: add continuous clock support
ASoC: meson: axg-tdm-interface: manage formatters in trigger
ASoC: meson: axg-card: make links nonatomic
ASoC: meson: axg-fifo: use threaded irq to check periods
ALSA: hda/realtek: Fix mute led of HP Laptop 15-da3001TU
ALSA: emu10k1: make E-MU FPGA writes potentially more reliable
ALSA: emu10k1: fix E-MU dock initialization
ALSA: emu10k1: use mutex for E-MU FPGA access locking
ALSA: emu10k1: move the whole GPIO event handling to the workqueue
ALSA: emu10k1: factor out snd_emu1010_load_dock_firmware()
ALSA: emu10k1: fix E-MU card dock presence monitoring
ASoC: rt715-sdca: volume step modification
...
+715
-252
+6
Documentation/devicetree/bindings/sound/rt5645.txt
+6
Documentation/devicetree/bindings/sound/rt5645.txt
···
20
20
a GPIO spec for the external headphone detect pin. If jd-mode = 0,
21
21
we will get the JD status by getting the value of hp-detect-gpios.
22
22
23
+
- cbj-sleeve-gpios:
24
+
a GPIO spec to control the external combo jack circuit to tie the sleeve/ring2
25
+
contacts to the ground or floating. It could avoid some electric noise from the
26
+
active speaker jacks.
27
+
23
28
- realtek,in2-differential
24
29
Boolean. Indicate MIC2 input are differential, rather than single-ended.
25
30
···
73
68
compatible = "realtek,rt5650";
74
69
reg = <0x1a>;
75
70
hp-detect-gpios = <&gpio 19 0>;
71
+
cbj-sleeve-gpios = <&gpio 20 0>;
76
72
interrupt-parent = <&gpio>;
77
73
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
78
74
realtek,dmic-en = "true";
+37
drivers/base/regmap/regmap.c
+37
drivers/base/regmap/regmap.c
···
2839
2839
EXPORT_SYMBOL_GPL(regmap_read);
2840
2840
2841
2841
/**
2842
+
* regmap_read_bypassed() - Read a value from a single register direct
2843
+
* from the device, bypassing the cache
2844
+
*
2845
+
* @map: Register map to read from
2846
+
* @reg: Register to be read from
2847
+
* @val: Pointer to store read value
2848
+
*
2849
+
* A value of zero will be returned on success, a negative errno will
2850
+
* be returned in error cases.
2851
+
*/
2852
+
int regmap_read_bypassed(struct regmap *map, unsigned int reg, unsigned int *val)
2853
+
{
2854
+
int ret;
2855
+
bool bypass, cache_only;
2856
+
2857
+
if (!IS_ALIGNED(reg, map->reg_stride))
2858
+
return -EINVAL;
2859
+
2860
+
map->lock(map->lock_arg);
2861
+
2862
+
bypass = map->cache_bypass;
2863
+
cache_only = map->cache_only;
2864
+
map->cache_bypass = true;
2865
+
map->cache_only = false;
2866
+
2867
+
ret = _regmap_read(map, reg, val);
2868
+
2869
+
map->cache_bypass = bypass;
2870
+
map->cache_only = cache_only;
2871
+
2872
+
map->unlock(map->lock_arg);
2873
+
2874
+
return ret;
2875
+
}
2876
+
EXPORT_SYMBOL_GPL(regmap_read_bypassed);
2877
+
2878
+
/**
2842
2879
* regmap_raw_read() - Read raw data from the device
2843
2880
*
2844
2881
* @map: Register map to read from
+8
include/linux/regmap.h
+8
include/linux/regmap.h
···
1230
1230
int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1231
1231
const void *val, size_t val_len);
1232
1232
int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
1233
+
int regmap_read_bypassed(struct regmap *map, unsigned int reg, unsigned int *val);
1233
1234
int regmap_raw_read(struct regmap *map, unsigned int reg,
1234
1235
void *val, size_t val_len);
1235
1236
int regmap_noinc_read(struct regmap *map, unsigned int reg,
···
1735
1734
1736
1735
static inline int regmap_read(struct regmap *map, unsigned int reg,
1737
1736
unsigned int *val)
1737
+
{
1738
+
WARN_ONCE(1, "regmap API is disabled");
1739
+
return -EINVAL;
1740
+
}
1741
+
1742
+
static inline int regmap_read_bypassed(struct regmap *map, unsigned int reg,
1743
+
unsigned int *val)
1738
1744
{
1739
1745
WARN_ONCE(1, "regmap API is disabled");
1740
1746
return -EINVAL;
+2
include/sound/cs35l56.h
+2
include/sound/cs35l56.h
···
267
267
bool fw_patched;
268
268
bool secured;
269
269
bool can_hibernate;
270
+
bool fw_owns_asp1;
270
271
bool cal_data_valid;
271
272
s8 cal_index;
272
273
struct cirrus_amp_cal_data cal_data;
···
284
283
extern const unsigned int cs35l56_tx_input_values[CS35L56_NUM_INPUT_SRC];
285
284
286
285
int cs35l56_set_patch(struct cs35l56_base *cs35l56_base);
286
+
int cs35l56_init_asp1_regs_for_driver_control(struct cs35l56_base *cs35l56_base);
287
287
int cs35l56_force_sync_asp1_registers_from_cache(struct cs35l56_base *cs35l56_base);
288
288
int cs35l56_mbox_send(struct cs35l56_base *cs35l56_base, unsigned int command);
289
289
int cs35l56_firmware_shutdown(struct cs35l56_base *cs35l56_base);
+5
-2
include/sound/emu10k1.h
+5
-2
include/sound/emu10k1.h
···
1684
1684
unsigned int clock_fallback;
1685
1685
unsigned int optical_in; /* 0:SPDIF, 1:ADAT */
1686
1686
unsigned int optical_out; /* 0:SPDIF, 1:ADAT */
1687
-
struct work_struct firmware_work;
1688
-
struct work_struct clock_work;
1687
+
struct work_struct work;
1688
+
struct mutex lock;
1689
1689
};
1690
1690
1691
1691
struct snd_emu10k1 {
···
1834
1834
void snd_emu10k1_ptr20_write(struct snd_emu10k1 *emu, unsigned int reg, unsigned int chn, unsigned int data);
1835
1835
int snd_emu10k1_spi_write(struct snd_emu10k1 * emu, unsigned int data);
1836
1836
int snd_emu10k1_i2c_write(struct snd_emu10k1 *emu, u32 reg, u32 value);
1837
+
static inline void snd_emu1010_fpga_lock(struct snd_emu10k1 *emu) { mutex_lock(&emu->emu1010.lock); };
1838
+
static inline void snd_emu1010_fpga_unlock(struct snd_emu10k1 *emu) { mutex_unlock(&emu->emu1010.lock); };
1839
+
void snd_emu1010_fpga_write_lock(struct snd_emu10k1 *emu, u32 reg, u32 value);
1837
1840
void snd_emu1010_fpga_write(struct snd_emu10k1 *emu, u32 reg, u32 value);
1838
1841
void snd_emu1010_fpga_read(struct snd_emu10k1 *emu, u32 reg, u32 *value);
1839
1842
void snd_emu1010_fpga_link_dst_src_write(struct snd_emu10k1 *emu, u32 dst, u32 src);
+25
-2
sound/hda/intel-dsp-config.c
+25
-2
sound/hda/intel-dsp-config.c
···
557
557
if (table->codec_hid) {
558
558
int i;
559
559
560
-
for (i = 0; i < table->codec_hid->num_codecs; i++)
561
-
if (acpi_dev_present(table->codec_hid->codecs[i], NULL, -1))
560
+
for (i = 0; i < table->codec_hid->num_codecs; i++) {
561
+
struct nhlt_acpi_table *nhlt;
562
+
bool ssp_found = false;
563
+
564
+
if (!acpi_dev_present(table->codec_hid->codecs[i], NULL, -1))
565
+
continue;
566
+
567
+
nhlt = intel_nhlt_init(&pci->dev);
568
+
if (!nhlt) {
569
+
dev_warn(&pci->dev, "%s: NHLT table not found, skipped HID %s\n",
570
+
__func__, table->codec_hid->codecs[i]);
571
+
continue;
572
+
}
573
+
574
+
if (intel_nhlt_has_endpoint_type(nhlt, NHLT_LINK_SSP) &&
575
+
intel_nhlt_ssp_endpoint_mask(nhlt, NHLT_DEVICE_I2S))
576
+
ssp_found = true;
577
+
578
+
intel_nhlt_free(nhlt);
579
+
580
+
if (ssp_found)
562
581
break;
582
+
583
+
dev_warn(&pci->dev, "%s: no valid SSP found for HID %s, skipped\n",
584
+
__func__, table->codec_hid->codecs[i]);
585
+
}
563
586
if (i == table->codec_hid->num_codecs)
564
587
continue;
565
588
}
+2
sound/hda/intel-sdw-acpi.c
+2
sound/hda/intel-sdw-acpi.c
+1
-2
sound/pci/emu10k1/emu10k1.c
+1
-2
sound/pci/emu10k1/emu10k1.c
+92
-66
sound/pci/emu10k1/emu10k1_main.c
+92
-66
sound/pci/emu10k1/emu10k1_main.c
···
732
732
return snd_emu1010_load_firmware_entry(emu, *fw);
733
733
}
734
734
735
-
static void emu1010_firmware_work(struct work_struct *work)
735
+
static void snd_emu1010_load_dock_firmware(struct snd_emu10k1 *emu)
736
736
{
737
-
struct snd_emu10k1 *emu;
738
-
u32 tmp, tmp2, reg;
737
+
u32 tmp, tmp2;
739
738
int err;
740
739
741
-
emu = container_of(work, struct snd_emu10k1,
742
-
emu1010.firmware_work);
743
-
if (emu->card->shutdown)
740
+
// The docking events clearly arrive prematurely - while the
741
+
// Dock's FPGA seems to be successfully programmed, the Dock
742
+
// fails to initialize subsequently if we don't give it some
743
+
// time to "warm up" here.
744
+
msleep(200);
745
+
746
+
dev_info(emu->card->dev, "emu1010: Loading Audio Dock Firmware\n");
747
+
/* Return to Audio Dock programming mode */
748
+
snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG,
749
+
EMU_HANA_FPGA_CONFIG_AUDIODOCK);
750
+
err = snd_emu1010_load_firmware(emu, 1, &emu->dock_fw);
751
+
if (err < 0)
744
752
return;
745
-
#ifdef CONFIG_PM_SLEEP
746
-
if (emu->suspend)
753
+
snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
754
+
755
+
snd_emu1010_fpga_read(emu, EMU_HANA_ID, &tmp);
756
+
dev_dbg(emu->card->dev, "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", tmp);
757
+
if ((tmp & 0x1f) != 0x15) {
758
+
/* FPGA failed to be programmed */
759
+
dev_err(emu->card->dev,
760
+
"emu1010: Loading Audio Dock Firmware failed, reg = 0x%x\n",
761
+
tmp);
747
762
return;
748
-
#endif
763
+
}
764
+
dev_info(emu->card->dev, "emu1010: Audio Dock Firmware loaded\n");
765
+
766
+
snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
767
+
snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
768
+
dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", tmp, tmp2);
769
+
770
+
/* Allow DLL to settle, to sync clocking between 1010 and Dock */
771
+
msleep(10);
772
+
}
773
+
774
+
static void emu1010_dock_event(struct snd_emu10k1 *emu)
775
+
{
776
+
u32 reg;
777
+
749
778
snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); /* OPTIONS: Which cards are attached to the EMU */
750
779
if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
751
780
/* Audio Dock attached */
752
-
/* Return to Audio Dock programming mode */
753
-
dev_info(emu->card->dev,
754
-
"emu1010: Loading Audio Dock Firmware\n");
755
-
snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG,
756
-
EMU_HANA_FPGA_CONFIG_AUDIODOCK);
757
-
err = snd_emu1010_load_firmware(emu, 1, &emu->dock_fw);
758
-
if (err < 0)
759
-
return;
760
-
snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
761
-
snd_emu1010_fpga_read(emu, EMU_HANA_ID, &tmp);
762
-
dev_info(emu->card->dev,
763
-
"emu1010: EMU_HANA+DOCK_ID = 0x%x\n", tmp);
764
-
if ((tmp & 0x1f) != 0x15) {
765
-
/* FPGA failed to be programmed */
766
-
dev_info(emu->card->dev,
767
-
"emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n",
768
-
tmp);
769
-
return;
770
-
}
771
-
dev_info(emu->card->dev,
772
-
"emu1010: Audio Dock Firmware loaded\n");
773
-
snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
774
-
snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
775
-
dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", tmp, tmp2);
776
-
/* Sync clocking between 1010 and Dock */
777
-
/* Allow DLL to settle */
778
-
msleep(10);
781
+
snd_emu1010_load_dock_firmware(emu);
779
782
/* Unmute all. Default is muted after a firmware load */
783
+
snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
784
+
} else if (!(reg & EMU_HANA_OPTION_DOCK_ONLINE)) {
785
+
/* Audio Dock removed */
786
+
dev_info(emu->card->dev, "emu1010: Audio Dock detached\n");
787
+
/* The hardware auto-mutes all, so we unmute again */
780
788
snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
781
789
}
782
790
}
783
791
784
-
static void emu1010_clock_work(struct work_struct *work)
792
+
static void emu1010_clock_event(struct snd_emu10k1 *emu)
785
793
{
786
-
struct snd_emu10k1 *emu;
787
794
struct snd_ctl_elem_id id;
788
-
789
-
emu = container_of(work, struct snd_emu10k1,
790
-
emu1010.clock_work);
791
-
if (emu->card->shutdown)
792
-
return;
793
-
#ifdef CONFIG_PM_SLEEP
794
-
if (emu->suspend)
795
-
return;
796
-
#endif
797
795
798
796
spin_lock_irq(&emu->reg_lock);
799
797
// This is the only thing that can actually happen.
···
803
805
snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE, &id);
804
806
}
805
807
806
-
static void emu1010_interrupt(struct snd_emu10k1 *emu)
808
+
static void emu1010_work(struct work_struct *work)
807
809
{
810
+
struct snd_emu10k1 *emu;
808
811
u32 sts;
809
812
813
+
emu = container_of(work, struct snd_emu10k1, emu1010.work);
814
+
if (emu->card->shutdown)
815
+
return;
816
+
#ifdef CONFIG_PM_SLEEP
817
+
if (emu->suspend)
818
+
return;
819
+
#endif
820
+
821
+
snd_emu1010_fpga_lock(emu);
822
+
810
823
snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &sts);
811
-
if (sts & EMU_HANA_IRQ_DOCK_LOST) {
812
-
/* Audio Dock removed */
813
-
dev_info(emu->card->dev, "emu1010: Audio Dock detached\n");
814
-
/* The hardware auto-mutes all, so we unmute again */
815
-
snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
816
-
} else if (sts & EMU_HANA_IRQ_DOCK) {
817
-
schedule_work(&emu->emu1010.firmware_work);
818
-
}
824
+
825
+
// The distinction of the IRQ status bits is unreliable,
826
+
// so we dispatch later based on option card status.
827
+
if (sts & (EMU_HANA_IRQ_DOCK | EMU_HANA_IRQ_DOCK_LOST))
828
+
emu1010_dock_event(emu);
829
+
819
830
if (sts & EMU_HANA_IRQ_WCLK_CHANGED)
820
-
schedule_work(&emu->emu1010.clock_work);
831
+
emu1010_clock_event(emu);
832
+
833
+
snd_emu1010_fpga_unlock(emu);
834
+
}
835
+
836
+
static void emu1010_interrupt(struct snd_emu10k1 *emu)
837
+
{
838
+
// We get an interrupt on each GPIO input pin change, but we
839
+
// care only about the ones triggered by the dedicated pin.
840
+
u16 sts = inw(emu->port + A_GPIO);
841
+
u16 bit = emu->card_capabilities->ca0108_chip ? 0x2000 : 0x8000;
842
+
if (!(sts & bit))
843
+
return;
844
+
845
+
schedule_work(&emu->emu1010.work);
821
846
}
822
847
823
848
/*
···
861
840
/* Mute, and disable audio and lock cache, just in case.
862
841
* Proper init follows in snd_emu10k1_init(). */
863
842
outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
843
+
844
+
snd_emu1010_fpga_lock(emu);
864
845
865
846
/* Disable 48Volt power to Audio Dock */
866
847
snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
···
889
866
err = snd_emu1010_load_firmware(emu, 0, &emu->firmware);
890
867
if (err < 0) {
891
868
dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n");
892
-
return err;
869
+
goto fail;
893
870
}
894
871
895
872
/* ID, should read & 0x7f = 0x55 when FPGA programmed. */
···
899
876
dev_info(emu->card->dev,
900
877
"emu1010: Loading Hana Firmware file failed, reg = 0x%x\n",
901
878
reg);
902
-
return -ENODEV;
879
+
err = -ENODEV;
880
+
goto fail;
903
881
}
904
882
905
883
dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n");
···
913
889
snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®);
914
890
dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
915
891
if (reg & EMU_HANA_OPTION_DOCK_OFFLINE)
916
-
schedule_work(&emu->emu1010.firmware_work);
892
+
snd_emu1010_load_dock_firmware(emu);
917
893
if (emu->card_capabilities->no_adat) {
918
894
emu->emu1010.optical_in = 0; /* IN_SPDIF */
919
895
emu->emu1010.optical_out = 0; /* OUT_SPDIF */
···
960
936
// so it is safe to simply enable the outputs.
961
937
snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
962
938
963
-
return 0;
939
+
fail:
940
+
snd_emu1010_fpga_unlock(emu);
941
+
return err;
964
942
}
965
943
/*
966
944
* Create the EMU10K1 instance
···
984
958
}
985
959
if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
986
960
/* Disable 48Volt power to Audio Dock */
987
-
snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
961
+
snd_emu1010_fpga_write_lock(emu, EMU_HANA_DOCK_PWR, 0);
988
962
}
989
-
cancel_work_sync(&emu->emu1010.firmware_work);
990
-
cancel_work_sync(&emu->emu1010.clock_work);
963
+
cancel_work_sync(&emu->emu1010.work);
964
+
mutex_destroy(&emu->emu1010.lock);
991
965
release_firmware(emu->firmware);
992
966
release_firmware(emu->dock_fw);
993
967
snd_util_memhdr_free(emu->memhdr);
···
1566
1540
emu->irq = -1;
1567
1541
emu->synth = NULL;
1568
1542
emu->get_synth_voice = NULL;
1569
-
INIT_WORK(&emu->emu1010.firmware_work, emu1010_firmware_work);
1570
-
INIT_WORK(&emu->emu1010.clock_work, emu1010_clock_work);
1543
+
INIT_WORK(&emu->emu1010.work, emu1010_work);
1544
+
mutex_init(&emu->emu1010.lock);
1571
1545
/* read revision & serial */
1572
1546
emu->revision = pci->revision;
1573
1547
pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
+13
-5
sound/pci/emu10k1/emumixer.c
+13
-5
sound/pci/emu10k1/emumixer.c
···
661
661
change = (emu->emu1010.output_source[channel] != val);
662
662
if (change) {
663
663
emu->emu1010.output_source[channel] = val;
664
+
snd_emu1010_fpga_lock(emu);
664
665
snd_emu1010_output_source_apply(emu, channel, val);
666
+
snd_emu1010_fpga_unlock(emu);
665
667
}
666
668
return change;
667
669
}
···
707
705
change = (emu->emu1010.input_source[channel] != val);
708
706
if (change) {
709
707
emu->emu1010.input_source[channel] = val;
708
+
snd_emu1010_fpga_lock(emu);
710
709
snd_emu1010_input_source_apply(emu, channel, val);
710
+
snd_emu1010_fpga_unlock(emu);
711
711
}
712
712
return change;
713
713
}
···
778
774
cache = cache & ~mask;
779
775
change = (cache != emu->emu1010.adc_pads);
780
776
if (change) {
781
-
snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, cache );
777
+
snd_emu1010_fpga_write_lock(emu, EMU_HANA_ADC_PADS, cache );
782
778
emu->emu1010.adc_pads = cache;
783
779
}
784
780
···
836
832
cache = cache & ~mask;
837
833
change = (cache != emu->emu1010.dac_pads);
838
834
if (change) {
839
-
snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, cache );
835
+
snd_emu1010_fpga_write_lock(emu, EMU_HANA_DAC_PADS, cache );
840
836
emu->emu1010.dac_pads = cache;
841
837
}
842
838
···
984
980
val = ucontrol->value.enumerated.item[0] ;
985
981
if (val >= emu_ci->num)
986
982
return -EINVAL;
983
+
snd_emu1010_fpga_lock(emu);
987
984
spin_lock_irq(&emu->reg_lock);
988
985
change = (emu->emu1010.clock_source != val);
989
986
if (change) {
···
1001
996
} else {
1002
997
spin_unlock_irq(&emu->reg_lock);
1003
998
}
999
+
snd_emu1010_fpga_unlock(emu);
1004
1000
return change;
1005
1001
}
1006
1002
···
1047
1041
change = (emu->emu1010.clock_fallback != val);
1048
1042
if (change) {
1049
1043
emu->emu1010.clock_fallback = val;
1050
-
snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 1 - val);
1044
+
snd_emu1010_fpga_write_lock(emu, EMU_HANA_DEFCLOCK, 1 - val);
1051
1045
}
1052
1046
return change;
1053
1047
}
···
1099
1093
emu->emu1010.optical_out = val;
1100
1094
tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) |
1101
1095
(emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF);
1102
-
snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
1096
+
snd_emu1010_fpga_write_lock(emu, EMU_HANA_OPTICAL_TYPE, tmp);
1103
1097
}
1104
1098
return change;
1105
1099
}
···
1150
1144
emu->emu1010.optical_in = val;
1151
1145
tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) |
1152
1146
(emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF);
1153
-
snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
1147
+
snd_emu1010_fpga_write_lock(emu, EMU_HANA_OPTICAL_TYPE, tmp);
1154
1148
}
1155
1149
return change;
1156
1150
}
···
2329
2323
for (i = 0; i < emu_ri->n_outs; i++)
2330
2324
emu->emu1010.output_source[i] =
2331
2325
emu1010_map_source(emu_ri, emu_ri->out_dflts[i]);
2326
+
snd_emu1010_fpga_lock(emu);
2332
2327
snd_emu1010_apply_sources(emu);
2328
+
snd_emu1010_fpga_unlock(emu);
2333
2329
2334
2330
kctl = emu->ctl_clock_source = snd_ctl_new1(&snd_emu1010_clock_source, emu);
2335
2331
err = snd_ctl_add(card, kctl);
+9
sound/pci/emu10k1/emuproc.c
+9
sound/pci/emu10k1/emuproc.c
···
165
165
u32 value2;
166
166
167
167
if (emu->card_capabilities->emu_model) {
168
+
snd_emu1010_fpga_lock(emu);
169
+
168
170
// This represents the S/PDIF lock status on 0404b, which is
169
171
// kinda weird and unhelpful, because monitoring it via IRQ is
170
172
// impractical (one gets an IRQ flood as long as it is desynced).
···
199
197
snd_iprintf(buffer, "\nS/PDIF mode: %s%s\n",
200
198
value & EMU_HANA_SPDIF_MODE_RX_PRO ? "professional" : "consumer",
201
199
value & EMU_HANA_SPDIF_MODE_RX_NOCOPY ? ", no copy" : "");
200
+
201
+
snd_emu1010_fpga_unlock(emu);
202
202
} else {
203
203
snd_emu10k1_proc_spdif_status(emu, buffer, "CD-ROM S/PDIF In", CDCS, CDSRCS);
204
204
snd_emu10k1_proc_spdif_status(emu, buffer, "Optical or Coax S/PDIF In", GPSCS, GPSRCS);
···
462
458
struct snd_emu10k1 *emu = entry->private_data;
463
459
u32 value;
464
460
int i;
461
+
462
+
snd_emu1010_fpga_lock(emu);
463
+
465
464
snd_iprintf(buffer, "EMU1010 Registers:\n\n");
466
465
467
466
for(i = 0; i < 0x40; i+=1) {
···
503
496
snd_emu_proc_emu1010_link_read(emu, buffer, 0x701);
504
497
}
505
498
}
499
+
500
+
snd_emu1010_fpga_unlock(emu);
506
501
}
507
502
508
503
static void snd_emu_proc_io_reg_read(struct snd_info_entry *entry,
+22
-29
sound/pci/emu10k1/io.c
+22
-29
sound/pci/emu10k1/io.c
···
285
285
outw(value, emu->port + A_GPIO);
286
286
udelay(10);
287
287
outw(value | 0x80 , emu->port + A_GPIO); /* High bit clocks the value into the fpga. */
288
+
udelay(10);
288
289
}
289
290
290
291
void snd_emu1010_fpga_write(struct snd_emu10k1 *emu, u32 reg, u32 value)
291
292
{
292
-
unsigned long flags;
293
-
294
-
spin_lock_irqsave(&emu->emu_lock, flags);
293
+
if (snd_BUG_ON(!mutex_is_locked(&emu->emu1010.lock)))
294
+
return;
295
295
snd_emu1010_fpga_write_locked(emu, reg, value);
296
-
spin_unlock_irqrestore(&emu->emu_lock, flags);
297
296
}
298
297
299
-
static void snd_emu1010_fpga_read_locked(struct snd_emu10k1 *emu, u32 reg, u32 *value)
298
+
void snd_emu1010_fpga_write_lock(struct snd_emu10k1 *emu, u32 reg, u32 value)
299
+
{
300
+
snd_emu1010_fpga_lock(emu);
301
+
snd_emu1010_fpga_write_locked(emu, reg, value);
302
+
snd_emu1010_fpga_unlock(emu);
303
+
}
304
+
305
+
void snd_emu1010_fpga_read(struct snd_emu10k1 *emu, u32 reg, u32 *value)
300
306
{
301
307
// The higest input pin is used as the designated interrupt trigger,
302
308
// so it needs to be masked out.
303
309
// But note that any other input pin change will also cause an IRQ,
304
310
// so using this function often causes an IRQ as a side effect.
305
311
u32 mask = emu->card_capabilities->ca0108_chip ? 0x1f : 0x7f;
312
+
313
+
if (snd_BUG_ON(!mutex_is_locked(&emu->emu1010.lock)))
314
+
return;
306
315
if (snd_BUG_ON(reg > 0x3f))
307
316
return;
308
317
reg += 0x40; /* 0x40 upwards are registers. */
···
322
313
*value = ((inw(emu->port + A_GPIO) >> 8) & mask);
323
314
}
324
315
325
-
void snd_emu1010_fpga_read(struct snd_emu10k1 *emu, u32 reg, u32 *value)
326
-
{
327
-
unsigned long flags;
328
-
329
-
spin_lock_irqsave(&emu->emu_lock, flags);
330
-
snd_emu1010_fpga_read_locked(emu, reg, value);
331
-
spin_unlock_irqrestore(&emu->emu_lock, flags);
332
-
}
333
-
334
316
/* Each Destination has one and only one Source,
335
317
* but one Source can feed any number of Destinations simultaneously.
336
318
*/
337
319
void snd_emu1010_fpga_link_dst_src_write(struct snd_emu10k1 *emu, u32 dst, u32 src)
338
320
{
339
-
unsigned long flags;
340
-
341
321
if (snd_BUG_ON(dst & ~0x71f))
342
322
return;
343
323
if (snd_BUG_ON(src & ~0x71f))
344
324
return;
345
-
spin_lock_irqsave(&emu->emu_lock, flags);
346
-
snd_emu1010_fpga_write_locked(emu, EMU_HANA_DESTHI, dst >> 8);
347
-
snd_emu1010_fpga_write_locked(emu, EMU_HANA_DESTLO, dst & 0x1f);
348
-
snd_emu1010_fpga_write_locked(emu, EMU_HANA_SRCHI, src >> 8);
349
-
snd_emu1010_fpga_write_locked(emu, EMU_HANA_SRCLO, src & 0x1f);
350
-
spin_unlock_irqrestore(&emu->emu_lock, flags);
325
+
snd_emu1010_fpga_write(emu, EMU_HANA_DESTHI, dst >> 8);
326
+
snd_emu1010_fpga_write(emu, EMU_HANA_DESTLO, dst & 0x1f);
327
+
snd_emu1010_fpga_write(emu, EMU_HANA_SRCHI, src >> 8);
328
+
snd_emu1010_fpga_write(emu, EMU_HANA_SRCLO, src & 0x1f);
351
329
}
352
330
353
331
u32 snd_emu1010_fpga_link_dst_src_read(struct snd_emu10k1 *emu, u32 dst)
354
332
{
355
-
unsigned long flags;
356
333
u32 hi, lo;
357
334
358
335
if (snd_BUG_ON(dst & ~0x71f))
359
336
return 0;
360
-
spin_lock_irqsave(&emu->emu_lock, flags);
361
-
snd_emu1010_fpga_write_locked(emu, EMU_HANA_DESTHI, dst >> 8);
362
-
snd_emu1010_fpga_write_locked(emu, EMU_HANA_DESTLO, dst & 0x1f);
363
-
snd_emu1010_fpga_read_locked(emu, EMU_HANA_SRCHI, &hi);
364
-
snd_emu1010_fpga_read_locked(emu, EMU_HANA_SRCLO, &lo);
365
-
spin_unlock_irqrestore(&emu->emu_lock, flags);
337
+
snd_emu1010_fpga_write(emu, EMU_HANA_DESTHI, dst >> 8);
338
+
snd_emu1010_fpga_write(emu, EMU_HANA_DESTLO, dst & 0x1f);
339
+
snd_emu1010_fpga_read(emu, EMU_HANA_SRCHI, &hi);
340
+
snd_emu1010_fpga_read(emu, EMU_HANA_SRCLO, &lo);
366
341
return (hi << 8) | lo;
367
342
}
368
343
+4
sound/pci/hda/cs35l56_hda.c
+4
sound/pci/hda/cs35l56_hda.c
···
644
644
ret = cs35l56_wait_for_firmware_boot(&cs35l56->base);
645
645
if (ret)
646
646
goto err_powered_up;
647
+
648
+
regcache_cache_only(cs35l56->base.regmap, false);
647
649
}
648
650
649
651
/* Disable auto-hibernate so that runtime_pm has control */
···
1003
1001
ret = cs35l56_wait_for_firmware_boot(&cs35l56->base);
1004
1002
if (ret)
1005
1003
goto err;
1004
+
1005
+
regcache_cache_only(cs35l56->base.regmap, false);
1006
1006
1007
1007
ret = cs35l56_set_patch(&cs35l56->base);
1008
1008
if (ret)
+76
-2
sound/pci/hda/patch_realtek.c
+76
-2
sound/pci/hda/patch_realtek.c
···
920
920
((codec)->core.dev.power.power_state.event == PM_EVENT_RESUME)
921
921
#define is_s4_resume(codec) \
922
922
((codec)->core.dev.power.power_state.event == PM_EVENT_RESTORE)
923
+
#define is_s4_suspend(codec) \
924
+
((codec)->core.dev.power.power_state.event == PM_EVENT_FREEZE)
923
925
924
926
static int alc_init(struct hda_codec *codec)
925
927
{
···
7185
7183
alc245_fixup_hp_gpio_led(codec, fix, action);
7186
7184
}
7187
7185
7186
+
/*
7187
+
* ALC287 PCM hooks
7188
+
*/
7189
+
static void alc287_alc1318_playback_pcm_hook(struct hda_pcm_stream *hinfo,
7190
+
struct hda_codec *codec,
7191
+
struct snd_pcm_substream *substream,
7192
+
int action)
7193
+
{
7194
+
alc_write_coef_idx(codec, 0x10, 0x8806); /* Change MLK to GPIO3 */
7195
+
switch (action) {
7196
+
case HDA_GEN_PCM_ACT_OPEN:
7197
+
alc_write_coefex_idx(codec, 0x5a, 0x00, 0x954f); /* write gpio3 to high */
7198
+
break;
7199
+
case HDA_GEN_PCM_ACT_CLOSE:
7200
+
alc_write_coefex_idx(codec, 0x5a, 0x00, 0x554f); /* write gpio3 as default value */
7201
+
break;
7202
+
}
7203
+
}
7204
+
7205
+
static void __maybe_unused alc287_s4_power_gpio3_default(struct hda_codec *codec)
7206
+
{
7207
+
if (is_s4_suspend(codec)) {
7208
+
alc_write_coef_idx(codec, 0x10, 0x8806); /* Change MLK to GPIO3 */
7209
+
alc_write_coefex_idx(codec, 0x5a, 0x00, 0x554f); /* write gpio3 as default value */
7210
+
}
7211
+
}
7212
+
7213
+
static void alc287_fixup_lenovo_thinkpad_with_alc1318(struct hda_codec *codec,
7214
+
const struct hda_fixup *fix, int action)
7215
+
{
7216
+
struct alc_spec *spec = codec->spec;
7217
+
7218
+
if (action != HDA_FIXUP_ACT_PRE_PROBE)
7219
+
return;
7220
+
#ifdef CONFIG_PM
7221
+
spec->power_hook = alc287_s4_power_gpio3_default;
7222
+
#endif
7223
+
spec->gen.pcm_playback_hook = alc287_alc1318_playback_pcm_hook;
7224
+
}
7225
+
7188
7226
7189
7227
enum {
7190
7228
ALC269_FIXUP_GPIO2,
···
7468
7426
ALC287_FIXUP_YOGA7_14ITL_SPEAKERS,
7469
7427
ALC298_FIXUP_LENOVO_C940_DUET7,
7470
7428
ALC287_FIXUP_LENOVO_14IRP8_DUETITL,
7429
+
ALC287_FIXUP_LENOVO_LEGION_7,
7471
7430
ALC287_FIXUP_13S_GEN2_SPEAKERS,
7472
7431
ALC256_FIXUP_SET_COEF_DEFAULTS,
7473
7432
ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE,
···
7513
7470
ALC285_FIXUP_ASUS_GA403U_HEADSET_MIC,
7514
7471
ALC285_FIXUP_ASUS_GA403U_I2C_SPEAKER2_TO_DAC1,
7515
7472
ALC285_FIXUP_ASUS_GU605_SPI_2_HEADSET_MIC,
7516
-
ALC285_FIXUP_ASUS_GU605_SPI_SPEAKER2_TO_DAC1
7473
+
ALC285_FIXUP_ASUS_GU605_SPI_SPEAKER2_TO_DAC1,
7474
+
ALC287_FIXUP_LENOVO_THKPAD_WH_ALC1318,
7517
7475
};
7518
7476
7519
7477
/* A special fixup for Lenovo C940 and Yoga Duet 7;
···
7551
7507
id = ALC287_FIXUP_YOGA7_14ITL_SPEAKERS; /* DuetITL */
7552
7508
else
7553
7509
id = ALC287_FIXUP_TAS2781_I2C; /* 14IRP8 */
7510
+
__snd_hda_apply_fixup(codec, id, action, 0);
7511
+
}
7512
+
7513
+
/* Another hilarious PCI SSID conflict with Lenovo Legion Pro 7 16ARX8H (with
7514
+
* TAS2781 codec) and Legion 7i 16IAX7 (with CS35L41 codec);
7515
+
* we apply a corresponding fixup depending on the codec SSID instead
7516
+
*/
7517
+
static void alc287_fixup_lenovo_legion_7(struct hda_codec *codec,
7518
+
const struct hda_fixup *fix,
7519
+
int action)
7520
+
{
7521
+
int id;
7522
+
7523
+
if (codec->core.subsystem_id == 0x17aa38a8)
7524
+
id = ALC287_FIXUP_TAS2781_I2C; /* Legion Pro 7 16ARX8H */
7525
+
else
7526
+
id = ALC287_FIXUP_CS35L41_I2C_2; /* Legion 7i 16IAX7 */
7554
7527
__snd_hda_apply_fixup(codec, id, action, 0);
7555
7528
}
7556
7529
···
9465
9404
.type = HDA_FIXUP_FUNC,
9466
9405
.v.func = alc287_fixup_lenovo_14irp8_duetitl,
9467
9406
},
9407
+
[ALC287_FIXUP_LENOVO_LEGION_7] = {
9408
+
.type = HDA_FIXUP_FUNC,
9409
+
.v.func = alc287_fixup_lenovo_legion_7,
9410
+
},
9468
9411
[ALC287_FIXUP_13S_GEN2_SPEAKERS] = {
9469
9412
.type = HDA_FIXUP_VERBS,
9470
9413
.v.verbs = (const struct hda_verb[]) {
···
9791
9726
.chained = true,
9792
9727
.chain_id = ALC285_FIXUP_ASUS_GA403U,
9793
9728
},
9729
+
[ALC287_FIXUP_LENOVO_THKPAD_WH_ALC1318] = {
9730
+
.type = HDA_FIXUP_FUNC,
9731
+
.v.func = alc287_fixup_lenovo_thinkpad_with_alc1318,
9732
+
.chained = true,
9733
+
.chain_id = ALC269_FIXUP_THINKPAD_ACPI
9734
+
},
9794
9735
};
9795
9736
9796
9737
static const struct snd_pci_quirk alc269_fixup_tbl[] = {
···
10008
9937
SND_PCI_QUIRK(0x103c, 0x860f, "HP ZBook 15 G6", ALC285_FIXUP_HP_GPIO_AMP_INIT),
10009
9938
SND_PCI_QUIRK(0x103c, 0x861f, "HP Elite Dragonfly G1", ALC285_FIXUP_HP_GPIO_AMP_INIT),
10010
9939
SND_PCI_QUIRK(0x103c, 0x869d, "HP", ALC236_FIXUP_HP_MUTE_LED),
9940
+
SND_PCI_QUIRK(0x103c, 0x86c1, "HP Laptop 15-da3001TU", ALC236_FIXUP_HP_MUTE_LED_COEFBIT2),
10011
9941
SND_PCI_QUIRK(0x103c, 0x86c7, "HP Envy AiO 32", ALC274_FIXUP_HP_ENVY_GPIO),
10012
9942
SND_PCI_QUIRK(0x103c, 0x86e7, "HP Spectre x360 15-eb0xxx", ALC285_FIXUP_HP_SPECTRE_X360_EB1),
10013
9943
SND_PCI_QUIRK(0x103c, 0x86e8, "HP Spectre x360 15-eb0xxx", ALC285_FIXUP_HP_SPECTRE_X360_EB1),
···
10465
10393
SND_PCI_QUIRK(0x17aa, 0x2318, "Thinkpad Z13 Gen2", ALC287_FIXUP_MG_RTKC_CSAMP_CS35L41_I2C_THINKPAD),
10466
10394
SND_PCI_QUIRK(0x17aa, 0x2319, "Thinkpad Z16 Gen2", ALC287_FIXUP_MG_RTKC_CSAMP_CS35L41_I2C_THINKPAD),
10467
10395
SND_PCI_QUIRK(0x17aa, 0x231a, "Thinkpad Z16 Gen2", ALC287_FIXUP_MG_RTKC_CSAMP_CS35L41_I2C_THINKPAD),
10396
+
SND_PCI_QUIRK(0x17aa, 0x231e, "Thinkpad", ALC287_FIXUP_LENOVO_THKPAD_WH_ALC1318),
10397
+
SND_PCI_QUIRK(0x17aa, 0x231f, "Thinkpad", ALC287_FIXUP_LENOVO_THKPAD_WH_ALC1318),
10468
10398
SND_PCI_QUIRK(0x17aa, 0x30bb, "ThinkCentre AIO", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY),
10469
10399
SND_PCI_QUIRK(0x17aa, 0x30e2, "ThinkCentre AIO", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY),
10470
10400
SND_PCI_QUIRK(0x17aa, 0x310c, "ThinkCentre Station", ALC294_FIXUP_LENOVO_MIC_LOCATION),
···
10496
10422
SND_PCI_QUIRK(0x17aa, 0x3853, "Lenovo Yoga 7 15ITL5", ALC287_FIXUP_YOGA7_14ITL_SPEAKERS),
10497
10423
SND_PCI_QUIRK(0x17aa, 0x3855, "Legion 7 16ITHG6", ALC287_FIXUP_LEGION_16ITHG6),
10498
10424
SND_PCI_QUIRK(0x17aa, 0x3869, "Lenovo Yoga7 14IAL7", ALC287_FIXUP_YOGA9_14IAP7_BASS_SPK_PIN),
10499
-
SND_PCI_QUIRK(0x17aa, 0x386f, "Legion 7i 16IAX7", ALC287_FIXUP_CS35L41_I2C_2),
10425
+
SND_PCI_QUIRK(0x17aa, 0x386f, "Legion Pro 7/7i", ALC287_FIXUP_LENOVO_LEGION_7),
10500
10426
SND_PCI_QUIRK(0x17aa, 0x3870, "Lenovo Yoga 7 14ARB7", ALC287_FIXUP_YOGA7_14ARB7_I2C),
10501
10427
SND_PCI_QUIRK(0x17aa, 0x3877, "Lenovo Legion 7 Slim 16ARHA7", ALC287_FIXUP_CS35L41_I2C_2),
10502
10428
SND_PCI_QUIRK(0x17aa, 0x3878, "Lenovo Legion 7 Slim 16ARHA7", ALC287_FIXUP_CS35L41_I2C_2),
+7
sound/soc/amd/yc/acp6x-mach.c
+7
sound/soc/amd/yc/acp6x-mach.c
···
433
433
{
434
434
.driver_data = &acp6x_card,
435
435
.matches = {
436
+
DMI_MATCH(DMI_BOARD_VENDOR, "MDC"),
437
+
DMI_MATCH(DMI_BOARD_NAME, "Herbag_MDU"),
438
+
}
439
+
},
440
+
{
441
+
.driver_data = &acp6x_card,
442
+
.matches = {
436
443
DMI_MATCH(DMI_BOARD_VENDOR, "System76"),
437
444
DMI_MATCH(DMI_PRODUCT_VERSION, "pang12"),
438
445
}
+21
-7
sound/soc/codecs/cs35l41.c
+21
-7
sound/soc/codecs/cs35l41.c
···
1094
1094
static int cs35l41_dsp_init(struct cs35l41_private *cs35l41)
1095
1095
{
1096
1096
struct wm_adsp *dsp;
1097
+
uint32_t dsp1rx5_src;
1097
1098
int ret;
1098
1099
1099
1100
dsp = &cs35l41->dsp;
···
1114
1113
return ret;
1115
1114
}
1116
1115
1117
-
ret = regmap_write(cs35l41->regmap, CS35L41_DSP1_RX5_SRC,
1118
-
CS35L41_INPUT_SRC_VPMON);
1119
-
if (ret < 0) {
1120
-
dev_err(cs35l41->dev, "Write INPUT_SRC_VPMON failed: %d\n", ret);
1116
+
switch (cs35l41->hw_cfg.bst_type) {
1117
+
case CS35L41_INT_BOOST:
1118
+
case CS35L41_SHD_BOOST_ACTV:
1119
+
dsp1rx5_src = CS35L41_INPUT_SRC_VPMON;
1120
+
break;
1121
+
case CS35L41_EXT_BOOST:
1122
+
case CS35L41_SHD_BOOST_PASS:
1123
+
dsp1rx5_src = CS35L41_INPUT_SRC_VBSTMON;
1124
+
break;
1125
+
default:
1126
+
dev_err(cs35l41->dev, "wm_halo_init failed - Invalid Boost Type: %d\n",
1127
+
cs35l41->hw_cfg.bst_type);
1121
1128
goto err_dsp;
1122
1129
}
1123
-
ret = regmap_write(cs35l41->regmap, CS35L41_DSP1_RX6_SRC,
1124
-
CS35L41_INPUT_SRC_CLASSH);
1130
+
1131
+
ret = regmap_write(cs35l41->regmap, CS35L41_DSP1_RX5_SRC, dsp1rx5_src);
1125
1132
if (ret < 0) {
1126
-
dev_err(cs35l41->dev, "Write INPUT_SRC_CLASSH failed: %d\n", ret);
1133
+
dev_err(cs35l41->dev, "Write DSP1RX5_SRC: %d failed: %d\n", dsp1rx5_src, ret);
1134
+
goto err_dsp;
1135
+
}
1136
+
ret = regmap_write(cs35l41->regmap, CS35L41_DSP1_RX6_SRC, CS35L41_INPUT_SRC_VBSTMON);
1137
+
if (ret < 0) {
1138
+
dev_err(cs35l41->dev, "Write CS35L41_INPUT_SRC_VBSTMON failed: %d\n", ret);
1127
1139
goto err_dsp;
1128
1140
}
1129
1141
ret = regmap_write(cs35l41->regmap, CS35L41_DSP1_RX7_SRC,
-2
sound/soc/codecs/cs35l56-sdw.c
-2
sound/soc/codecs/cs35l56-sdw.c
+36
-3
sound/soc/codecs/cs35l56.c
+36
-3
sound/soc/codecs/cs35l56.c
···
454
454
{
455
455
struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(codec_dai->component);
456
456
unsigned int val;
457
+
int ret;
457
458
458
459
dev_dbg(cs35l56->base.dev, "%s: %#x\n", __func__, fmt);
460
+
461
+
ret = cs35l56_init_asp1_regs_for_driver_control(&cs35l56->base);
462
+
if (ret)
463
+
return ret;
459
464
460
465
switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
461
466
case SND_SOC_DAIFMT_CBC_CFC:
···
535
530
unsigned int rx_mask, int slots, int slot_width)
536
531
{
537
532
struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
533
+
int ret;
534
+
535
+
ret = cs35l56_init_asp1_regs_for_driver_control(&cs35l56->base);
536
+
if (ret)
537
+
return ret;
538
538
539
539
if ((slots == 0) || (slot_width == 0)) {
540
540
dev_dbg(cs35l56->base.dev, "tdm config cleared\n");
···
588
578
struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
589
579
unsigned int rate = params_rate(params);
590
580
u8 asp_width, asp_wl;
581
+
int ret;
582
+
583
+
ret = cs35l56_init_asp1_regs_for_driver_control(&cs35l56->base);
584
+
if (ret)
585
+
return ret;
591
586
592
587
asp_wl = params_width(params);
593
588
if (cs35l56->asp_slot_width)
···
649
634
int clk_id, unsigned int freq, int dir)
650
635
{
651
636
struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
652
-
int freq_id;
637
+
int freq_id, ret;
638
+
639
+
ret = cs35l56_init_asp1_regs_for_driver_control(&cs35l56->base);
640
+
if (ret)
641
+
return ret;
653
642
654
643
if (freq == 0) {
655
644
cs35l56->sysclk_set = false;
···
1360
1341
"spk-id-gpios", ACPI_TYPE_PACKAGE, &obj);
1361
1342
if (ret) {
1362
1343
dev_dbg(cs35l56->base.dev, "Could not get spk-id-gpios package: %d\n", ret);
1344
+
fwnode_handle_put(af01_fwnode);
1363
1345
return -ENOENT;
1364
1346
}
1365
1347
···
1368
1348
if (obj->package.count != 4) {
1369
1349
dev_warn(cs35l56->base.dev, "Unexpected spk-id element count %d\n",
1370
1350
obj->package.count);
1351
+
fwnode_handle_put(af01_fwnode);
1371
1352
return -ENOENT;
1372
1353
}
1373
1354
···
1383
1362
*/
1384
1363
ret = acpi_dev_add_driver_gpios(adev, cs35l56_af01_spkid_gpios_mapping);
1385
1364
if (ret) {
1365
+
fwnode_handle_put(af01_fwnode);
1386
1366
return dev_err_probe(cs35l56->base.dev, ret,
1387
1367
"Failed to add gpio mapping to AF01\n");
1388
1368
}
···
1391
1369
ret = devm_add_action_or_reset(cs35l56->base.dev,
1392
1370
cs35l56_acpi_dev_release_driver_gpios,
1393
1371
adev);
1394
-
if (ret)
1372
+
if (ret) {
1373
+
fwnode_handle_put(af01_fwnode);
1395
1374
return ret;
1375
+
}
1396
1376
1397
1377
dev_dbg(cs35l56->base.dev, "Added spk-id-gpios mapping to AF01\n");
1398
1378
}
1399
1379
1400
1380
desc = fwnode_gpiod_get_index(af01_fwnode, "spk-id", 0, GPIOD_IN, NULL);
1401
1381
if (IS_ERR(desc)) {
1382
+
fwnode_handle_put(af01_fwnode);
1402
1383
ret = PTR_ERR(desc);
1403
1384
return dev_err_probe(cs35l56->base.dev, ret, "Get GPIO from AF01 failed\n");
1404
1385
}
···
1410
1385
gpiod_put(desc);
1411
1386
1412
1387
if (ret < 0) {
1388
+
fwnode_handle_put(af01_fwnode);
1413
1389
dev_err_probe(cs35l56->base.dev, ret, "Error reading spk-id GPIO\n");
1414
1390
return ret;
1415
-
}
1391
+
}
1392
+
1393
+
fwnode_handle_put(af01_fwnode);
1416
1394
1417
1395
dev_info(cs35l56->base.dev, "Got spk-id from AF01\n");
1418
1396
···
1430
1402
mutex_init(&cs35l56->base.irq_lock);
1431
1403
cs35l56->base.cal_index = -1;
1432
1404
cs35l56->speaker_id = -ENOENT;
1405
+
1406
+
/* Assume that the firmware owns ASP1 until we know different */
1407
+
cs35l56->base.fw_owns_asp1 = true;
1433
1408
1434
1409
dev_set_drvdata(cs35l56->base.dev, cs35l56);
1435
1410
···
1562
1531
return ret;
1563
1532
1564
1533
dev_dbg(cs35l56->base.dev, "Firmware rebooted after soft reset\n");
1534
+
1535
+
regcache_cache_only(cs35l56->base.regmap, false);
1565
1536
}
1566
1537
1567
1538
/* Disable auto-hibernate so that runtime_pm has control */
+5
-1
sound/soc/codecs/da7219-aad.c
+5
-1
sound/soc/codecs/da7219-aad.c
···
671
671
return NULL;
672
672
673
673
aad_pdata = devm_kzalloc(dev, sizeof(*aad_pdata), GFP_KERNEL);
674
-
if (!aad_pdata)
674
+
if (!aad_pdata) {
675
+
fwnode_handle_put(aad_np);
675
676
return NULL;
677
+
}
676
678
677
679
aad_pdata->irq = i2c->irq;
678
680
···
754
752
da7219_aad_fw_adc_1bit_rpt(dev, fw_val32);
755
753
else
756
754
aad_pdata->adc_1bit_rpt = DA7219_AAD_ADC_1BIT_RPT_1;
755
+
756
+
fwnode_handle_put(aad_np);
757
757
758
758
return aad_pdata;
759
759
}
+25
sound/soc/codecs/rt5645.c
+25
sound/soc/codecs/rt5645.c
···
444
444
struct regmap *regmap;
445
445
struct i2c_client *i2c;
446
446
struct gpio_desc *gpiod_hp_det;
447
+
struct gpio_desc *gpiod_cbj_sleeve;
447
448
struct snd_soc_jack *hp_jack;
448
449
struct snd_soc_jack *mic_jack;
449
450
struct snd_soc_jack *btn_jack;
···
3187
3186
regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3188
3187
RT5645_CBJ_MN_JD, 0);
3189
3188
3189
+
if (rt5645->gpiod_cbj_sleeve)
3190
+
gpiod_set_value(rt5645->gpiod_cbj_sleeve, 1);
3191
+
3190
3192
msleep(600);
3191
3193
regmap_read(rt5645->regmap, RT5645_IN1_CTRL3, &val);
3192
3194
val &= 0x7;
···
3206
3202
snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
3207
3203
snd_soc_dapm_sync(dapm);
3208
3204
rt5645->jack_type = SND_JACK_HEADPHONE;
3205
+
if (rt5645->gpiod_cbj_sleeve)
3206
+
gpiod_set_value(rt5645->gpiod_cbj_sleeve, 0);
3209
3207
}
3210
3208
if (rt5645->pdata.level_trigger_irq)
3211
3209
regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
···
3235
3229
if (rt5645->pdata.level_trigger_irq)
3236
3230
regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3237
3231
RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
3232
+
3233
+
if (rt5645->gpiod_cbj_sleeve)
3234
+
gpiod_set_value(rt5645->gpiod_cbj_sleeve, 0);
3238
3235
}
3239
3236
3240
3237
return rt5645->jack_type;
···
4021
4012
return ret;
4022
4013
}
4023
4014
4015
+
rt5645->gpiod_cbj_sleeve = devm_gpiod_get_optional(&i2c->dev, "cbj-sleeve",
4016
+
GPIOD_OUT_LOW);
4017
+
4018
+
if (IS_ERR(rt5645->gpiod_cbj_sleeve)) {
4019
+
ret = PTR_ERR(rt5645->gpiod_cbj_sleeve);
4020
+
dev_info(&i2c->dev, "failed to initialize gpiod, ret=%d\n", ret);
4021
+
if (ret != -ENOENT)
4022
+
return ret;
4023
+
}
4024
+
4024
4025
for (i = 0; i < ARRAY_SIZE(rt5645->supplies); i++)
4025
4026
rt5645->supplies[i].supply = rt5645_supply_names[i];
4026
4027
···
4278
4259
cancel_delayed_work_sync(&rt5645->jack_detect_work);
4279
4260
cancel_delayed_work_sync(&rt5645->rcclock_work);
4280
4261
4262
+
if (rt5645->gpiod_cbj_sleeve)
4263
+
gpiod_set_value(rt5645->gpiod_cbj_sleeve, 0);
4264
+
4281
4265
regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
4282
4266
}
4283
4267
···
4296
4274
0);
4297
4275
msleep(20);
4298
4276
regmap_write(rt5645->regmap, RT5645_RESET, 0);
4277
+
4278
+
if (rt5645->gpiod_cbj_sleeve)
4279
+
gpiod_set_value(rt5645->gpiod_cbj_sleeve, 0);
4299
4280
}
4300
4281
4301
4282
static int __maybe_unused rt5645_sys_suspend(struct device *dev)
+4
-4
sound/soc/codecs/rt715-sdca.c
+4
-4
sound/soc/codecs/rt715-sdca.c
···
316
316
return 0;
317
317
}
318
318
319
-
static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -17625, 375, 0);
319
+
static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
320
320
static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
321
321
322
322
static int rt715_sdca_get_volsw(struct snd_kcontrol *kcontrol,
···
477
477
RT715_SDCA_FU_VOL_CTRL, CH_01),
478
478
SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL,
479
479
RT715_SDCA_FU_VOL_CTRL, CH_02),
480
-
0x2f, 0x7f, 0,
480
+
0x2f, 0x3f, 0,
481
481
rt715_sdca_set_amp_gain_get, rt715_sdca_set_amp_gain_put,
482
482
in_vol_tlv),
483
483
RT715_SDCA_EXT_TLV("FU02 Capture Volume",
···
485
485
RT715_SDCA_FU_VOL_CTRL, CH_01),
486
486
rt715_sdca_set_amp_gain_4ch_get,
487
487
rt715_sdca_set_amp_gain_4ch_put,
488
-
in_vol_tlv, 4, 0x7f),
488
+
in_vol_tlv, 4, 0x3f),
489
489
RT715_SDCA_EXT_TLV("FU06 Capture Volume",
490
490
SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC10_11_VOL,
491
491
RT715_SDCA_FU_VOL_CTRL, CH_01),
492
492
rt715_sdca_set_amp_gain_4ch_get,
493
493
rt715_sdca_set_amp_gain_4ch_put,
494
-
in_vol_tlv, 4, 0x7f),
494
+
in_vol_tlv, 4, 0x3f),
495
495
/* MIC Boost Control */
496
496
RT715_SDCA_BOOST_EXT_TLV("FU0E Boost",
497
497
SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_DMIC_GAIN_EN,
+1
sound/soc/codecs/rt715-sdw.c
+1
sound/soc/codecs/rt715-sdw.c
+20
-7
sound/soc/codecs/rt722-sdca.c
+20
-7
sound/soc/codecs/rt722-sdca.c
···
1330
1330
.capture = {
1331
1331
.stream_name = "DP6 DMic Capture",
1332
1332
.channels_min = 1,
1333
-
.channels_max = 2,
1333
+
.channels_max = 4,
1334
1334
.rates = RT722_STEREO_RATES,
1335
1335
.formats = RT722_FORMATS,
1336
1336
},
···
1439
1439
int loop_check, chk_cnt = 100, ret;
1440
1440
unsigned int calib_status = 0;
1441
1441
1442
-
/* Read eFuse */
1443
-
rt722_sdca_index_write(rt722, RT722_VENDOR_SPK_EFUSE, RT722_DC_CALIB_CTRL,
1444
-
0x4808);
1442
+
/* Config analog bias */
1443
+
rt722_sdca_index_write(rt722, RT722_VENDOR_REG, RT722_ANALOG_BIAS_CTL3,
1444
+
0xa081);
1445
+
/* GE related settings */
1446
+
rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_GE_RELATED_CTL2,
1447
+
0xa009);
1445
1448
/* Button A, B, C, D bypass mode */
1446
1449
rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_UMP_HID_CTL4,
1447
1450
0xcf00);
···
1478
1475
if ((calib_status & 0x0040) == 0x0)
1479
1476
break;
1480
1477
}
1481
-
/* Release HP-JD, EN_CBJ_TIE_GL/R open, en_osw gating auto done bit */
1482
-
rt722_sdca_index_write(rt722, RT722_VENDOR_REG, RT722_DIGITAL_MISC_CTRL4,
1483
-
0x0010);
1484
1478
/* Set ADC09 power entity floating control */
1485
1479
rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_ADC0A_08_PDE_FLOAT_CTL,
1486
1480
0x2a12);
···
1490
1490
/* Set DAC03 and HP power entity floating control */
1491
1491
rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_DAC03_HP_PDE_FLOAT_CTL,
1492
1492
0x4040);
1493
+
rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_ENT_FLOAT_CTRL_1,
1494
+
0x4141);
1495
+
rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_FLOAT_CTRL_1,
1496
+
0x0101);
1493
1497
/* Fine tune PDE40 latency */
1494
1498
regmap_write(rt722->regmap, 0x2f58, 0x07);
1499
+
regmap_write(rt722->regmap, 0x2f03, 0x06);
1500
+
/* MIC VRefo */
1501
+
rt722_sdca_index_update_bits(rt722, RT722_VENDOR_REG,
1502
+
RT722_COMBO_JACK_AUTO_CTL1, 0x0200, 0x0200);
1503
+
rt722_sdca_index_update_bits(rt722, RT722_VENDOR_REG,
1504
+
RT722_VREFO_GAT, 0x4000, 0x4000);
1505
+
/* Release HP-JD, EN_CBJ_TIE_GL/R open, en_osw gating auto done bit */
1506
+
rt722_sdca_index_write(rt722, RT722_VENDOR_REG, RT722_DIGITAL_MISC_CTRL4,
1507
+
0x0010);
1495
1508
}
1496
1509
1497
1510
int rt722_sdca_io_init(struct device *dev, struct sdw_slave *slave)
+3
sound/soc/codecs/rt722-sdca.h
+3
sound/soc/codecs/rt722-sdca.h
···
69
69
#define RT722_COMBO_JACK_AUTO_CTL2 0x46
70
70
#define RT722_COMBO_JACK_AUTO_CTL3 0x47
71
71
#define RT722_DIGITAL_MISC_CTRL4 0x4a
72
+
#define RT722_VREFO_GAT 0x63
72
73
#define RT722_FSM_CTL 0x67
73
74
#define RT722_SDCA_INTR_REC 0x82
74
75
#define RT722_SW_CONFIG1 0x8a
···
128
127
#define RT722_UMP_HID_CTL6 0x66
129
128
#define RT722_UMP_HID_CTL7 0x67
130
129
#define RT722_UMP_HID_CTL8 0x68
130
+
#define RT722_FLOAT_CTRL_1 0x70
131
+
#define RT722_ENT_FLOAT_CTRL_1 0x76
131
132
132
133
/* Parameter & Verb control 01 (0x1a)(NID:20h) */
133
134
#define RT722_HIDDEN_REG_SW_RESET (0x1 << 14)
+1
sound/soc/codecs/wsa881x.c
+1
sound/soc/codecs/wsa881x.c
···
1155
1155
pdev->prop.sink_ports = GENMASK(WSA881X_MAX_SWR_PORTS, 0);
1156
1156
pdev->prop.sink_dpn_prop = wsa_sink_dpn_prop;
1157
1157
pdev->prop.scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
1158
+
pdev->prop.clk_stop_mode1 = true;
1158
1159
gpiod_direction_output(wsa881x->sd_n, !wsa881x->sd_n_val);
1159
1160
1160
1161
wsa881x->regmap = devm_regmap_init_sdw(pdev, &wsa881x_regmap_config);
+1
-1
sound/soc/intel/avs/icl.c
+1
-1
sound/soc/intel/avs/icl.c
+2
sound/soc/intel/avs/topology.c
+2
sound/soc/intel/avs/topology.c
···
1582
1582
if (!le32_to_cpu(dw->priv.size))
1583
1583
return 0;
1584
1584
1585
+
w->no_wname_in_kcontrol_name = true;
1586
+
1585
1587
if (w->ignore_suspend && !AVS_S0IX_SUPPORTED) {
1586
1588
dev_info_once(comp->dev, "Device does not support S0IX, check BIOS settings\n");
1587
1589
w->ignore_suspend = false;
+13
-11
sound/soc/intel/boards/bytcr_rt5640.c
+13
-11
sound/soc/intel/boards/bytcr_rt5640.c
···
636
636
BYT_RT5640_USE_AMCR0F28),
637
637
},
638
638
{
639
-
.matches = {
640
-
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
641
-
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T100TA"),
642
-
},
643
-
.driver_data = (void *)(BYT_RT5640_IN1_MAP |
644
-
BYT_RT5640_JD_SRC_JD2_IN4N |
645
-
BYT_RT5640_OVCD_TH_2000UA |
646
-
BYT_RT5640_OVCD_SF_0P75 |
647
-
BYT_RT5640_MCLK_EN),
648
-
},
649
-
{
639
+
/* Asus T100TAF, unlike other T100TA* models this one has a mono speaker */
650
640
.matches = {
651
641
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
652
642
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T100TAF"),
···
648
658
BYT_RT5640_MONO_SPEAKER |
649
659
BYT_RT5640_DIFF_MIC |
650
660
BYT_RT5640_SSP0_AIF2 |
661
+
BYT_RT5640_MCLK_EN),
662
+
},
663
+
{
664
+
/* Asus T100TA and T100TAM, must come after T100TAF (mono spk) match */
665
+
.matches = {
666
+
DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
667
+
DMI_MATCH(DMI_PRODUCT_NAME, "T100TA"),
668
+
},
669
+
.driver_data = (void *)(BYT_RT5640_IN1_MAP |
670
+
BYT_RT5640_JD_SRC_JD2_IN4N |
671
+
BYT_RT5640_OVCD_TH_2000UA |
672
+
BYT_RT5640_OVCD_SF_0P75 |
651
673
BYT_RT5640_MCLK_EN),
652
674
},
653
675
{
+1
sound/soc/meson/Kconfig
+1
sound/soc/meson/Kconfig
+1
sound/soc/meson/axg-card.c
+1
sound/soc/meson/axg-card.c
+20
-11
sound/soc/meson/axg-fifo.c
+20
-11
sound/soc/meson/axg-fifo.c
···
204
204
unsigned int status;
205
205
206
206
regmap_read(fifo->map, FIFO_STATUS1, &status);
207
-
208
207
status = FIELD_GET(STATUS1_INT_STS, status);
209
-
if (status & FIFO_INT_COUNT_REPEAT)
210
-
snd_pcm_period_elapsed(ss);
211
-
else
212
-
dev_dbg(axg_fifo_dev(ss), "unexpected irq - STS 0x%02x\n",
213
-
status);
214
-
215
-
/* Ack irqs */
216
208
axg_fifo_ack_irq(fifo, status);
217
209
218
-
return IRQ_RETVAL(status);
210
+
/* Use the thread to call period elapsed on nonatomic links */
211
+
if (status & FIFO_INT_COUNT_REPEAT)
212
+
return IRQ_WAKE_THREAD;
213
+
214
+
dev_dbg(axg_fifo_dev(ss), "unexpected irq - STS 0x%02x\n",
215
+
status);
216
+
217
+
return IRQ_NONE;
218
+
}
219
+
220
+
static irqreturn_t axg_fifo_pcm_irq_block_thread(int irq, void *dev_id)
221
+
{
222
+
struct snd_pcm_substream *ss = dev_id;
223
+
224
+
snd_pcm_period_elapsed(ss);
225
+
226
+
return IRQ_HANDLED;
219
227
}
220
228
221
229
int axg_fifo_pcm_open(struct snd_soc_component *component,
···
251
243
if (ret)
252
244
return ret;
253
245
254
-
ret = request_irq(fifo->irq, axg_fifo_pcm_irq_block, 0,
255
-
dev_name(dev), ss);
246
+
ret = request_threaded_irq(fifo->irq, axg_fifo_pcm_irq_block,
247
+
axg_fifo_pcm_irq_block_thread,
248
+
IRQF_ONESHOT, dev_name(dev), ss);
256
249
if (ret)
257
250
return ret;
258
251
+40
sound/soc/meson/axg-tdm-formatter.c
+40
sound/soc/meson/axg-tdm-formatter.c
···
392
392
}
393
393
EXPORT_SYMBOL_GPL(axg_tdm_stream_free);
394
394
395
+
int axg_tdm_stream_set_cont_clocks(struct axg_tdm_stream *ts,
396
+
unsigned int fmt)
397
+
{
398
+
int ret = 0;
399
+
400
+
if (fmt & SND_SOC_DAIFMT_CONT) {
401
+
/* Clock are already enabled - skipping */
402
+
if (ts->clk_enabled)
403
+
return 0;
404
+
405
+
ret = clk_prepare_enable(ts->iface->mclk);
406
+
if (ret)
407
+
return ret;
408
+
409
+
ret = clk_prepare_enable(ts->iface->sclk);
410
+
if (ret)
411
+
goto err_sclk;
412
+
413
+
ret = clk_prepare_enable(ts->iface->lrclk);
414
+
if (ret)
415
+
goto err_lrclk;
416
+
417
+
ts->clk_enabled = true;
418
+
return 0;
419
+
}
420
+
421
+
/* Clocks are already disabled - skipping */
422
+
if (!ts->clk_enabled)
423
+
return 0;
424
+
425
+
clk_disable_unprepare(ts->iface->lrclk);
426
+
err_lrclk:
427
+
clk_disable_unprepare(ts->iface->sclk);
428
+
err_sclk:
429
+
clk_disable_unprepare(ts->iface->mclk);
430
+
ts->clk_enabled = false;
431
+
return ret;
432
+
}
433
+
EXPORT_SYMBOL_GPL(axg_tdm_stream_set_cont_clocks);
434
+
395
435
MODULE_DESCRIPTION("Amlogic AXG TDM formatter driver");
396
436
MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
397
437
MODULE_LICENSE("GPL v2");
+28
-10
sound/soc/meson/axg-tdm-interface.c
+28
-10
sound/soc/meson/axg-tdm-interface.c
···
309
309
struct snd_soc_dai *dai)
310
310
{
311
311
struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
312
+
struct axg_tdm_stream *ts = snd_soc_dai_get_dma_data(dai, substream);
312
313
int ret;
313
314
314
315
switch (iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
···
347
346
return ret;
348
347
}
349
348
350
-
return 0;
349
+
ret = axg_tdm_stream_set_cont_clocks(ts, iface->fmt);
350
+
if (ret)
351
+
dev_err(dai->dev, "failed to apply continuous clock setting\n");
352
+
353
+
return ret;
351
354
}
352
355
353
356
static int axg_tdm_iface_hw_free(struct snd_pcm_substream *substream,
···
359
354
{
360
355
struct axg_tdm_stream *ts = snd_soc_dai_get_dma_data(dai, substream);
361
356
362
-
/* Stop all attached formatters */
363
-
axg_tdm_stream_stop(ts);
364
-
365
-
return 0;
357
+
return axg_tdm_stream_set_cont_clocks(ts, 0);
366
358
}
367
359
368
-
static int axg_tdm_iface_prepare(struct snd_pcm_substream *substream,
360
+
static int axg_tdm_iface_trigger(struct snd_pcm_substream *substream,
361
+
int cmd,
369
362
struct snd_soc_dai *dai)
370
363
{
371
-
struct axg_tdm_stream *ts = snd_soc_dai_get_dma_data(dai, substream);
364
+
struct axg_tdm_stream *ts =
365
+
snd_soc_dai_get_dma_data(dai, substream);
372
366
373
-
/* Force all attached formatters to update */
374
-
return axg_tdm_stream_reset(ts);
367
+
switch (cmd) {
368
+
case SNDRV_PCM_TRIGGER_START:
369
+
case SNDRV_PCM_TRIGGER_RESUME:
370
+
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
371
+
axg_tdm_stream_start(ts);
372
+
break;
373
+
case SNDRV_PCM_TRIGGER_SUSPEND:
374
+
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
375
+
case SNDRV_PCM_TRIGGER_STOP:
376
+
axg_tdm_stream_stop(ts);
377
+
break;
378
+
default:
379
+
return -EINVAL;
380
+
}
381
+
382
+
return 0;
375
383
}
376
384
377
385
static int axg_tdm_iface_remove_dai(struct snd_soc_dai *dai)
···
430
412
.set_fmt = axg_tdm_iface_set_fmt,
431
413
.startup = axg_tdm_iface_startup,
432
414
.hw_params = axg_tdm_iface_hw_params,
433
-
.prepare = axg_tdm_iface_prepare,
434
415
.hw_free = axg_tdm_iface_hw_free,
416
+
.trigger = axg_tdm_iface_trigger,
435
417
};
436
418
437
419
/* TDM Backend DAIs */
+5
sound/soc/meson/axg-tdm.h
+5
sound/soc/meson/axg-tdm.h
···
58
58
unsigned int physical_width;
59
59
u32 *mask;
60
60
bool ready;
61
+
62
+
/* For continuous clock tracking */
63
+
bool clk_enabled;
61
64
};
62
65
63
66
struct axg_tdm_stream *axg_tdm_stream_alloc(struct axg_tdm_iface *iface);
64
67
void axg_tdm_stream_free(struct axg_tdm_stream *ts);
65
68
int axg_tdm_stream_start(struct axg_tdm_stream *ts);
66
69
void axg_tdm_stream_stop(struct axg_tdm_stream *ts);
70
+
int axg_tdm_stream_set_cont_clocks(struct axg_tdm_stream *ts,
71
+
unsigned int fmt);
67
72
68
73
static inline int axg_tdm_stream_reset(struct axg_tdm_stream *ts)
69
74
{
+3
-1
sound/soc/sof/core.c
+3
-1
sound/soc/sof/core.c
···
350
350
}
351
351
352
352
ret = sof_select_ipc_and_paths(sdev);
353
-
if (!ret && plat_data->ipc_type != base_profile->ipc_type) {
353
+
if (ret) {
354
+
goto err_machine_check;
355
+
} else if (plat_data->ipc_type != base_profile->ipc_type) {
354
356
/* IPC type changed, re-initialize the ops */
355
357
sof_ops_free(sdev);
356
358
+18
sound/soc/sof/debug.c
+18
sound/soc/sof/debug.c
···
330
330
331
331
int snd_sof_dbg_init(struct snd_sof_dev *sdev)
332
332
{
333
+
struct snd_sof_pdata *plat_data = sdev->pdata;
333
334
struct snd_sof_dsp_ops *ops = sof_ops(sdev);
334
335
const struct snd_sof_debugfs_map *map;
336
+
struct dentry *fw_profile;
335
337
int i;
336
338
int err;
337
339
338
340
/* use "sof" as top level debugFS dir */
339
341
sdev->debugfs_root = debugfs_create_dir("sof", NULL);
342
+
343
+
/* expose firmware/topology prefix/names for test purposes */
344
+
fw_profile = debugfs_create_dir("fw_profile", sdev->debugfs_root);
345
+
346
+
debugfs_create_str("fw_path", 0444, fw_profile,
347
+
(char **)&plat_data->fw_filename_prefix);
348
+
debugfs_create_str("fw_lib_path", 0444, fw_profile,
349
+
(char **)&plat_data->fw_lib_prefix);
350
+
debugfs_create_str("tplg_path", 0444, fw_profile,
351
+
(char **)&plat_data->tplg_filename_prefix);
352
+
debugfs_create_str("fw_name", 0444, fw_profile,
353
+
(char **)&plat_data->fw_filename);
354
+
debugfs_create_str("tplg_name", 0444, fw_profile,
355
+
(char **)&plat_data->tplg_filename);
356
+
debugfs_create_u32("ipc_type", 0444, fw_profile,
357
+
(u32 *)&plat_data->ipc_type);
340
358
341
359
/* init dfsentry list */
342
360
INIT_LIST_HEAD(&sdev->dfsentry_list);
+3
sound/soc/sof/intel/pci-lnl.c
+3
sound/soc/sof/intel/pci-lnl.c
+1
sound/soc/sof/ipc3-pcm.c
+1
sound/soc/sof/ipc3-pcm.c
+82
-39
sound/soc/sof/ipc4-pcm.c
+82
-39
sound/soc/sof/ipc4-pcm.c
···
37
37
snd_pcm_sframes_t delay;
38
38
};
39
39
40
+
/**
41
+
* struct sof_ipc4_pcm_stream_priv - IPC4 specific private data
42
+
* @time_info: pointer to time info struct if it is supported, otherwise NULL
43
+
* @chain_dma_allocated: indicates the ChainDMA allocation state
44
+
*/
45
+
struct sof_ipc4_pcm_stream_priv {
46
+
struct sof_ipc4_timestamp_info *time_info;
47
+
48
+
bool chain_dma_allocated;
49
+
};
50
+
51
+
static inline struct sof_ipc4_timestamp_info *
52
+
sof_ipc4_sps_to_time_info(struct snd_sof_pcm_stream *sps)
53
+
{
54
+
struct sof_ipc4_pcm_stream_priv *stream_priv = sps->private;
55
+
56
+
return stream_priv->time_info;
57
+
}
58
+
40
59
static int sof_ipc4_set_multi_pipeline_state(struct snd_sof_dev *sdev, u32 state,
41
60
struct ipc4_pipeline_set_state_data *trigger_list)
42
61
{
···
272
253
*/
273
254
274
255
static int sof_ipc4_chain_dma_trigger(struct snd_sof_dev *sdev,
275
-
int direction,
256
+
struct snd_sof_pcm *spcm, int direction,
276
257
struct snd_sof_pcm_stream_pipeline_list *pipeline_list,
277
258
int state, int cmd)
278
259
{
279
260
struct sof_ipc4_fw_data *ipc4_data = sdev->private;
261
+
struct sof_ipc4_pcm_stream_priv *stream_priv;
280
262
bool allocate, enable, set_fifo_size;
281
263
struct sof_ipc4_msg msg = {{ 0 }};
282
-
int i;
264
+
int ret, i;
265
+
266
+
stream_priv = spcm->stream[direction].private;
283
267
284
268
switch (state) {
285
269
case SOF_IPC4_PIPE_RUNNING: /* Allocate and start chained dma */
···
303
281
set_fifo_size = false;
304
282
break;
305
283
case SOF_IPC4_PIPE_RESET: /* Disable and free chained DMA. */
284
+
285
+
/* ChainDMA can only be reset if it has been allocated */
286
+
if (!stream_priv->chain_dma_allocated)
287
+
return 0;
288
+
306
289
allocate = false;
307
290
enable = false;
308
291
set_fifo_size = false;
···
365
338
if (enable)
366
339
msg.primary |= SOF_IPC4_GLB_CHAIN_DMA_ENABLE_MASK;
367
340
368
-
return sof_ipc_tx_message_no_reply(sdev->ipc, &msg, 0);
341
+
ret = sof_ipc_tx_message_no_reply(sdev->ipc, &msg, 0);
342
+
/* Update the ChainDMA allocation state */
343
+
if (!ret)
344
+
stream_priv->chain_dma_allocated = allocate;
345
+
346
+
return ret;
369
347
}
370
348
371
349
static int sof_ipc4_trigger_pipelines(struct snd_soc_component *component,
···
410
378
* trigger function that handles the rest for the substream.
411
379
*/
412
380
if (pipeline->use_chain_dma)
413
-
return sof_ipc4_chain_dma_trigger(sdev, substream->stream,
381
+
return sof_ipc4_chain_dma_trigger(sdev, spcm, substream->stream,
414
382
pipeline_list, state, cmd);
415
383
416
384
/* allocate memory for the pipeline data */
···
484
452
* Invalidate the stream_start_offset to make sure that it is
485
453
* going to be updated if the stream resumes
486
454
*/
487
-
time_info = spcm->stream[substream->stream].private;
455
+
time_info = sof_ipc4_sps_to_time_info(&spcm->stream[substream->stream]);
488
456
if (time_info)
489
457
time_info->stream_start_offset = SOF_IPC4_INVALID_STREAM_POSITION;
490
458
···
738
706
static void sof_ipc4_pcm_free(struct snd_sof_dev *sdev, struct snd_sof_pcm *spcm)
739
707
{
740
708
struct snd_sof_pcm_stream_pipeline_list *pipeline_list;
709
+
struct sof_ipc4_pcm_stream_priv *stream_priv;
741
710
int stream;
742
711
743
712
for_each_pcm_streams(stream) {
744
713
pipeline_list = &spcm->stream[stream].pipeline_list;
745
714
kfree(pipeline_list->pipelines);
746
715
pipeline_list->pipelines = NULL;
716
+
717
+
stream_priv = spcm->stream[stream].private;
718
+
kfree(stream_priv->time_info);
747
719
kfree(spcm->stream[stream].private);
748
720
spcm->stream[stream].private = NULL;
749
721
}
···
757
721
{
758
722
struct snd_sof_pcm_stream_pipeline_list *pipeline_list;
759
723
struct sof_ipc4_fw_data *ipc4_data = sdev->private;
760
-
struct sof_ipc4_timestamp_info *stream_info;
724
+
struct sof_ipc4_pcm_stream_priv *stream_priv;
725
+
struct sof_ipc4_timestamp_info *time_info;
761
726
bool support_info = true;
762
727
u32 abi_version;
763
728
u32 abi_offset;
···
786
749
return -ENOMEM;
787
750
}
788
751
789
-
if (!support_info)
790
-
continue;
791
-
792
-
stream_info = kzalloc(sizeof(*stream_info), GFP_KERNEL);
793
-
if (!stream_info) {
752
+
stream_priv = kzalloc(sizeof(*stream_priv), GFP_KERNEL);
753
+
if (!stream_priv) {
794
754
sof_ipc4_pcm_free(sdev, spcm);
795
755
return -ENOMEM;
796
756
}
797
757
798
-
spcm->stream[stream].private = stream_info;
758
+
spcm->stream[stream].private = stream_priv;
759
+
760
+
if (!support_info)
761
+
continue;
762
+
763
+
time_info = kzalloc(sizeof(*time_info), GFP_KERNEL);
764
+
if (!time_info) {
765
+
sof_ipc4_pcm_free(sdev, spcm);
766
+
return -ENOMEM;
767
+
}
768
+
769
+
stream_priv->time_info = time_info;
799
770
}
800
771
801
772
return 0;
802
773
}
803
774
804
-
static void sof_ipc4_build_time_info(struct snd_sof_dev *sdev, struct snd_sof_pcm_stream *spcm)
775
+
static void sof_ipc4_build_time_info(struct snd_sof_dev *sdev, struct snd_sof_pcm_stream *sps)
805
776
{
806
777
struct sof_ipc4_copier *host_copier = NULL;
807
778
struct sof_ipc4_copier *dai_copier = NULL;
808
779
struct sof_ipc4_llp_reading_slot llp_slot;
809
-
struct sof_ipc4_timestamp_info *info;
780
+
struct sof_ipc4_timestamp_info *time_info;
810
781
struct snd_soc_dapm_widget *widget;
811
782
struct snd_sof_dai *dai;
812
783
int i;
813
784
814
785
/* find host & dai to locate info in memory window */
815
-
for_each_dapm_widgets(spcm->list, i, widget) {
786
+
for_each_dapm_widgets(sps->list, i, widget) {
816
787
struct snd_sof_widget *swidget = widget->dobj.private;
817
788
818
789
if (!swidget)
···
840
795
return;
841
796
}
842
797
843
-
info = spcm->private;
844
-
info->host_copier = host_copier;
845
-
info->dai_copier = dai_copier;
846
-
info->llp_offset = offsetof(struct sof_ipc4_fw_registers, llp_gpdma_reading_slots) +
847
-
sdev->fw_info_box.offset;
798
+
time_info = sof_ipc4_sps_to_time_info(sps);
799
+
time_info->host_copier = host_copier;
800
+
time_info->dai_copier = dai_copier;
801
+
time_info->llp_offset = offsetof(struct sof_ipc4_fw_registers,
802
+
llp_gpdma_reading_slots) + sdev->fw_info_box.offset;
848
803
849
804
/* find llp slot used by current dai */
850
805
for (i = 0; i < SOF_IPC4_MAX_LLP_GPDMA_READING_SLOTS; i++) {
851
-
sof_mailbox_read(sdev, info->llp_offset, &llp_slot, sizeof(llp_slot));
806
+
sof_mailbox_read(sdev, time_info->llp_offset, &llp_slot, sizeof(llp_slot));
852
807
if (llp_slot.node_id == dai_copier->data.gtw_cfg.node_id)
853
808
break;
854
809
855
-
info->llp_offset += sizeof(llp_slot);
810
+
time_info->llp_offset += sizeof(llp_slot);
856
811
}
857
812
858
813
if (i < SOF_IPC4_MAX_LLP_GPDMA_READING_SLOTS)
859
814
return;
860
815
861
816
/* if no llp gpdma slot is used, check aggregated sdw slot */
862
-
info->llp_offset = offsetof(struct sof_ipc4_fw_registers, llp_sndw_reading_slots) +
863
-
sdev->fw_info_box.offset;
817
+
time_info->llp_offset = offsetof(struct sof_ipc4_fw_registers,
818
+
llp_sndw_reading_slots) + sdev->fw_info_box.offset;
864
819
for (i = 0; i < SOF_IPC4_MAX_LLP_SNDW_READING_SLOTS; i++) {
865
-
sof_mailbox_read(sdev, info->llp_offset, &llp_slot, sizeof(llp_slot));
820
+
sof_mailbox_read(sdev, time_info->llp_offset, &llp_slot, sizeof(llp_slot));
866
821
if (llp_slot.node_id == dai_copier->data.gtw_cfg.node_id)
867
822
break;
868
823
869
-
info->llp_offset += sizeof(llp_slot);
824
+
time_info->llp_offset += sizeof(llp_slot);
870
825
}
871
826
872
827
if (i < SOF_IPC4_MAX_LLP_SNDW_READING_SLOTS)
873
828
return;
874
829
875
830
/* check EVAD slot */
876
-
info->llp_offset = offsetof(struct sof_ipc4_fw_registers, llp_evad_reading_slot) +
877
-
sdev->fw_info_box.offset;
878
-
sof_mailbox_read(sdev, info->llp_offset, &llp_slot, sizeof(llp_slot));
831
+
time_info->llp_offset = offsetof(struct sof_ipc4_fw_registers,
832
+
llp_evad_reading_slot) + sdev->fw_info_box.offset;
833
+
sof_mailbox_read(sdev, time_info->llp_offset, &llp_slot, sizeof(llp_slot));
879
834
if (llp_slot.node_id != dai_copier->data.gtw_cfg.node_id)
880
-
info->llp_offset = 0;
835
+
time_info->llp_offset = 0;
881
836
}
882
837
883
838
static int sof_ipc4_pcm_hw_params(struct snd_soc_component *component,
···
894
849
if (!spcm)
895
850
return -EINVAL;
896
851
897
-
time_info = spcm->stream[substream->stream].private;
852
+
time_info = sof_ipc4_sps_to_time_info(&spcm->stream[substream->stream]);
898
853
/* delay calculation is not supported by current fw_reg ABI */
899
854
if (!time_info)
900
855
return 0;
···
909
864
910
865
static int sof_ipc4_get_stream_start_offset(struct snd_sof_dev *sdev,
911
866
struct snd_pcm_substream *substream,
912
-
struct snd_sof_pcm_stream *stream,
867
+
struct snd_sof_pcm_stream *sps,
913
868
struct sof_ipc4_timestamp_info *time_info)
914
869
{
915
870
struct sof_ipc4_copier *host_copier = time_info->host_copier;
···
963
918
struct sof_ipc4_timestamp_info *time_info;
964
919
struct sof_ipc4_llp_reading_slot llp;
965
920
snd_pcm_uframes_t head_cnt, tail_cnt;
966
-
struct snd_sof_pcm_stream *stream;
921
+
struct snd_sof_pcm_stream *sps;
967
922
u64 dai_cnt, host_cnt, host_ptr;
968
923
struct snd_sof_pcm *spcm;
969
924
int ret;
···
972
927
if (!spcm)
973
928
return -EOPNOTSUPP;
974
929
975
-
stream = &spcm->stream[substream->stream];
976
-
time_info = stream->private;
930
+
sps = &spcm->stream[substream->stream];
931
+
time_info = sof_ipc4_sps_to_time_info(sps);
977
932
if (!time_info)
978
933
return -EOPNOTSUPP;
979
934
···
983
938
* the statistics is complete. And it will not change after the first initiailization.
984
939
*/
985
940
if (time_info->stream_start_offset == SOF_IPC4_INVALID_STREAM_POSITION) {
986
-
ret = sof_ipc4_get_stream_start_offset(sdev, substream, stream, time_info);
941
+
ret = sof_ipc4_get_stream_start_offset(sdev, substream, sps, time_info);
987
942
if (ret < 0)
988
943
return -EOPNOTSUPP;
989
944
}
···
1075
1030
{
1076
1031
struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
1077
1032
struct sof_ipc4_timestamp_info *time_info;
1078
-
struct snd_sof_pcm_stream *stream;
1079
1033
struct snd_sof_pcm *spcm;
1080
1034
1081
1035
spcm = snd_sof_find_spcm_dai(component, rtd);
1082
1036
if (!spcm)
1083
1037
return 0;
1084
1038
1085
-
stream = &spcm->stream[substream->stream];
1086
-
time_info = stream->private;
1039
+
time_info = sof_ipc4_sps_to_time_info(&spcm->stream[substream->stream]);
1087
1040
/*
1088
1041
* Report the stored delay value calculated in the pointer callback.
1089
1042
* In the unlikely event that the calculation was skipped/aborted, the
+6
-7
sound/soc/sof/pcm.c
+6
-7
sound/soc/sof/pcm.c
···
325
325
ipc_first = true;
326
326
break;
327
327
case SNDRV_PCM_TRIGGER_SUSPEND:
328
-
if (sdev->system_suspend_target == SOF_SUSPEND_S0IX &&
328
+
/*
329
+
* If DSP D0I3 is allowed during S0iX, set the suspend_ignored flag for
330
+
* D0I3-compatible streams to keep the firmware pipeline running
331
+
*/
332
+
if (pcm_ops && pcm_ops->d0i3_supported_in_s0ix &&
333
+
sdev->system_suspend_target == SOF_SUSPEND_S0IX &&
329
334
spcm->stream[substream->stream].d0i3_compatible) {
330
-
/*
331
-
* trap the event, not sending trigger stop to
332
-
* prevent the FW pipelines from being stopped,
333
-
* and mark the flag to ignore the upcoming DAPM
334
-
* PM events.
335
-
*/
336
335
spcm->stream[substream->stream].suspend_ignored = true;
337
336
return 0;
338
337
}
+2
sound/soc/sof/sof-audio.h
+2
sound/soc/sof/sof-audio.h
···
116
116
* triggers. The FW keeps the host DMA running in this case and
117
117
* therefore the host must do the same and should stop the DMA during
118
118
* hw_free.
119
+
* @d0i3_supported_in_s0ix: Allow DSP D0I3 during S0iX
119
120
*/
120
121
struct sof_ipc_pcm_ops {
121
122
int (*hw_params)(struct snd_soc_component *component, struct snd_pcm_substream *substream,
···
136
135
bool reset_hw_params_during_stop;
137
136
bool ipc_first_on_start;
138
137
bool platform_stop_during_hw_free;
138
+
bool d0i3_supported_in_s0ix;
139
139
};
140
140
141
141
/**
+3
-4
sound/soc/tegra/tegra186_dspk.c
+3
-4
sound/soc/tegra/tegra186_dspk.c
···
1
1
// SPDX-License-Identifier: GPL-2.0-only
2
+
// SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
2
3
//
3
4
// tegra186_dspk.c - Tegra186 DSPK driver
4
-
//
5
-
// Copyright (c) 2020 NVIDIA CORPORATION. All rights reserved.
6
5
7
6
#include <linux/clk.h>
8
7
#include <linux/device.h>
···
240
241
return -EINVAL;
241
242
}
242
243
243
-
cif_conf.client_bits = TEGRA_ACIF_BITS_24;
244
-
245
244
switch (params_format(params)) {
246
245
case SNDRV_PCM_FORMAT_S16_LE:
247
246
cif_conf.audio_bits = TEGRA_ACIF_BITS_16;
247
+
cif_conf.client_bits = TEGRA_ACIF_BITS_16;
248
248
break;
249
249
case SNDRV_PCM_FORMAT_S32_LE:
250
250
cif_conf.audio_bits = TEGRA_ACIF_BITS_32;
251
+
cif_conf.client_bits = TEGRA_ACIF_BITS_24;
251
252
break;
252
253
default:
253
254
dev_err(dev, "unsupported format!\n");
+6
-6
sound/soc/ti/davinci-mcasp.c
+6
-6
sound/soc/ti/davinci-mcasp.c
···
2417
2417
2418
2418
mcasp_reparent_fck(pdev);
2419
2419
2420
-
ret = devm_snd_soc_register_component(&pdev->dev, &davinci_mcasp_component,
2421
-
&davinci_mcasp_dai[mcasp->op_mode], 1);
2422
-
2423
-
if (ret != 0)
2424
-
goto err;
2425
-
2426
2420
ret = davinci_mcasp_get_dma_type(mcasp);
2427
2421
switch (ret) {
2428
2422
case PCM_EDMA:
···
2442
2448
dev_err(&pdev->dev, "register PCM failed: %d\n", ret);
2443
2449
goto err;
2444
2450
}
2451
+
2452
+
ret = devm_snd_soc_register_component(&pdev->dev, &davinci_mcasp_component,
2453
+
&davinci_mcasp_dai[mcasp->op_mode], 1);
2454
+
2455
+
if (ret != 0)
2456
+
goto err;
2445
2457
2446
2458
no_audio:
2447
2459
ret = davinci_mcasp_init_gpiochip(mcasp);