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clk: qcom: dispcc-sm8650: Update the GDSC flags

Add missing POLL_CFG_GDSCR to the MDSS GDSC flags.

Fixes: 90114ca11476 ("clk: qcom: add SM8550 DISPCC driver")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240717-dispcc-sm8550-fixes-v2-4-5c4a3128c40b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

authored by

Dmitry Baryshkov and committed by
Bjorn Andersson 7de10ddb eb64ccac

+2 -2
+2 -2
drivers/clk/qcom/dispcc-sm8550.c
··· 1611 1611 .name = "mdss_gdsc", 1612 1612 }, 1613 1613 .pwrsts = PWRSTS_OFF_ON, 1614 - .flags = HW_CTRL | RETAIN_FF_ENABLE, 1614 + .flags = POLL_CFG_GDSCR | HW_CTRL | RETAIN_FF_ENABLE, 1615 1615 }; 1616 1616 1617 1617 static struct gdsc mdss_int2_gdsc = { ··· 1620 1620 .name = "mdss_int2_gdsc", 1621 1621 }, 1622 1622 .pwrsts = PWRSTS_OFF_ON, 1623 - .flags = HW_CTRL | RETAIN_FF_ENABLE, 1623 + .flags = POLL_CFG_GDSCR | HW_CTRL | RETAIN_FF_ENABLE, 1624 1624 }; 1625 1625 1626 1626 static struct clk_regmap *disp_cc_sm8550_clocks[] = {