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crypto: qat - relocate PFVF VF related logic

Move device specific PFVF logic related to the VF to the newly created
adf_gen2_pfvf.c.
This refactory is done to isolate the GEN2 PFVF code into its own file
in preparation for the introduction of support for PFVF for GEN4
devices.

Signed-off-by: Marco Chiappero <marco.chiappero@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

authored by

Marco Chiappero and committed by
Herbert Xu
7e00fb3f b85bd945

+22 -29
+1 -1
drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c
··· 136 136 hw_data->enable_ints = adf_enable_ints; 137 137 hw_data->reset_device = adf_reset_flr; 138 138 hw_data->set_ssm_wdtimer = adf_gen2_set_ssm_wdtimer; 139 - hw_data->get_pf2vf_offset = adf_gen2_get_pf2vf_offset; 139 + hw_data->get_pf2vf_offset = adf_gen2_pf_get_pf2vf_offset; 140 140 hw_data->get_vf2pf_sources = adf_gen2_get_vf2pf_sources; 141 141 hw_data->enable_vf2pf_interrupts = adf_gen2_enable_vf2pf_interrupts; 142 142 hw_data->disable_vf2pf_interrupts = adf_gen2_disable_vf2pf_interrupts;
+2 -6
drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c
··· 4 4 #include <adf_pf2vf_msg.h> 5 5 #include <adf_common_drv.h> 6 6 #include <adf_gen2_hw_data.h> 7 + #include <adf_gen2_pfvf.h> 7 8 #include "adf_c3xxxvf_hw_data.h" 8 9 9 10 static struct adf_hw_device_class c3xxxiov_class = { ··· 48 47 return DEV_SKU_VF; 49 48 } 50 49 51 - static u32 get_pf2vf_offset(u32 i) 52 - { 53 - return ADF_C3XXXIOV_PF2VF_OFFSET; 54 - } 55 - 56 50 static int adf_vf_int_noop(struct adf_accel_dev *accel_dev) 57 51 { 58 52 return 0; ··· 82 86 hw_data->get_num_aes = get_num_aes; 83 87 hw_data->get_etr_bar_id = get_etr_bar_id; 84 88 hw_data->get_misc_bar_id = get_misc_bar_id; 85 - hw_data->get_pf2vf_offset = get_pf2vf_offset; 89 + hw_data->get_pf2vf_offset = adf_gen2_vf_get_pf2vf_offset; 86 90 hw_data->get_sku = get_sku; 87 91 hw_data->enable_ints = adf_vf_void_noop; 88 92 hw_data->enable_pfvf_comms = adf_enable_vf2pf_comms;
-1
drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.h
··· 12 12 #define ADF_C3XXXIOV_TX_RINGS_MASK 0xFF 13 13 #define ADF_C3XXXIOV_ETR_BAR 0 14 14 #define ADF_C3XXXIOV_ETR_MAX_BANKS 1 15 - #define ADF_C3XXXIOV_PF2VF_OFFSET 0x200 16 15 17 16 void adf_init_hw_data_c3xxxiov(struct adf_hw_device_data *hw_data); 18 17 void adf_clean_hw_data_c3xxxiov(struct adf_hw_device_data *hw_data);
+1 -1
drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c
··· 138 138 hw_data->enable_ints = adf_enable_ints; 139 139 hw_data->reset_device = adf_reset_flr; 140 140 hw_data->set_ssm_wdtimer = adf_gen2_set_ssm_wdtimer; 141 - hw_data->get_pf2vf_offset = adf_gen2_get_pf2vf_offset; 141 + hw_data->get_pf2vf_offset = adf_gen2_pf_get_pf2vf_offset; 142 142 hw_data->get_vf2pf_sources = adf_gen2_get_vf2pf_sources; 143 143 hw_data->enable_vf2pf_interrupts = adf_gen2_enable_vf2pf_interrupts; 144 144 hw_data->disable_vf2pf_interrupts = adf_gen2_disable_vf2pf_interrupts;
+2 -6
drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.c
··· 4 4 #include <adf_pf2vf_msg.h> 5 5 #include <adf_common_drv.h> 6 6 #include <adf_gen2_hw_data.h> 7 + #include <adf_gen2_pfvf.h> 7 8 #include "adf_c62xvf_hw_data.h" 8 9 9 10 static struct adf_hw_device_class c62xiov_class = { ··· 48 47 return DEV_SKU_VF; 49 48 } 50 49 51 - static u32 get_pf2vf_offset(u32 i) 52 - { 53 - return ADF_C62XIOV_PF2VF_OFFSET; 54 - } 55 - 56 50 static int adf_vf_int_noop(struct adf_accel_dev *accel_dev) 57 51 { 58 52 return 0; ··· 82 86 hw_data->get_num_aes = get_num_aes; 83 87 hw_data->get_etr_bar_id = get_etr_bar_id; 84 88 hw_data->get_misc_bar_id = get_misc_bar_id; 85 - hw_data->get_pf2vf_offset = get_pf2vf_offset; 89 + hw_data->get_pf2vf_offset = adf_gen2_vf_get_pf2vf_offset; 86 90 hw_data->get_sku = get_sku; 87 91 hw_data->enable_ints = adf_vf_void_noop; 88 92 hw_data->enable_pfvf_comms = adf_enable_vf2pf_comms;
-1
drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.h
··· 12 12 #define ADF_C62XIOV_TX_RINGS_MASK 0xFF 13 13 #define ADF_C62XIOV_ETR_BAR 0 14 14 #define ADF_C62XIOV_ETR_MAX_BANKS 1 15 - #define ADF_C62XIOV_PF2VF_OFFSET 0x200 16 15 17 16 void adf_init_hw_data_c62xiov(struct adf_hw_device_data *hw_data); 18 17 void adf_clean_hw_data_c62xiov(struct adf_hw_device_data *hw_data);
+11 -4
drivers/crypto/qat/qat_common/adf_gen2_pfvf.c
··· 8 8 #define ADF_GEN2_ERR_REG_VF2PF(vf_src) (((vf_src) & 0x01FFFE00) >> 9) 9 9 #define ADF_GEN2_ERR_MSK_VF2PF(vf_mask) (((vf_mask) & 0xFFFF) << 9) 10 10 11 - #define ADF_GEN2_PF2VF_OFFSET(i) (0x3A000 + 0x280 + ((i) * 0x04)) 11 + #define ADF_GEN2_PF_PF2VF_OFFSET(i) (0x3A000 + 0x280 + ((i) * 0x04)) 12 + #define ADF_GEN2_VF_PF2VF_OFFSET 0x200 12 13 13 - u32 adf_gen2_get_pf2vf_offset(u32 i) 14 + u32 adf_gen2_pf_get_pf2vf_offset(u32 i) 14 15 { 15 - return ADF_GEN2_PF2VF_OFFSET(i); 16 + return ADF_GEN2_PF_PF2VF_OFFSET(i); 16 17 } 17 - EXPORT_SYMBOL_GPL(adf_gen2_get_pf2vf_offset); 18 + EXPORT_SYMBOL_GPL(adf_gen2_pf_get_pf2vf_offset); 19 + 20 + u32 adf_gen2_vf_get_pf2vf_offset(u32 i) 21 + { 22 + return ADF_GEN2_VF_PF2VF_OFFSET; 23 + } 24 + EXPORT_SYMBOL_GPL(adf_gen2_vf_get_pf2vf_offset); 18 25 19 26 u32 adf_gen2_get_vf2pf_sources(void __iomem *pmisc_addr) 20 27 {
+2 -1
drivers/crypto/qat/qat_common/adf_gen2_pfvf.h
··· 11 11 #define ADF_GEN2_ERRMSK3 (0x3A000 + 0x1C) 12 12 #define ADF_GEN2_ERRMSK5 (0x3A000 + 0xDC) 13 13 14 - u32 adf_gen2_get_pf2vf_offset(u32 i); 14 + u32 adf_gen2_pf_get_pf2vf_offset(u32 i); 15 + u32 adf_gen2_vf_get_pf2vf_offset(u32 i); 15 16 u32 adf_gen2_get_vf2pf_sources(void __iomem *pmisc_bar); 16 17 void adf_gen2_enable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask); 17 18 void adf_gen2_disable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask);
+1 -1
drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
··· 215 215 hw_data->get_arb_mapping = adf_get_arbiter_mapping; 216 216 hw_data->enable_ints = adf_enable_ints; 217 217 hw_data->reset_device = adf_reset_sbr; 218 - hw_data->get_pf2vf_offset = adf_gen2_get_pf2vf_offset; 218 + hw_data->get_pf2vf_offset = adf_gen2_pf_get_pf2vf_offset; 219 219 hw_data->get_vf2pf_sources = get_vf2pf_sources; 220 220 hw_data->enable_vf2pf_interrupts = enable_vf2pf_interrupts; 221 221 hw_data->disable_vf2pf_interrupts = disable_vf2pf_interrupts;
+2 -6
drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c
··· 4 4 #include <adf_pf2vf_msg.h> 5 5 #include <adf_common_drv.h> 6 6 #include <adf_gen2_hw_data.h> 7 + #include <adf_gen2_pfvf.h> 7 8 #include "adf_dh895xccvf_hw_data.h" 8 9 9 10 static struct adf_hw_device_class dh895xcciov_class = { ··· 48 47 return DEV_SKU_VF; 49 48 } 50 49 51 - static u32 get_pf2vf_offset(u32 i) 52 - { 53 - return ADF_DH895XCCIOV_PF2VF_OFFSET; 54 - } 55 - 56 50 static int adf_vf_int_noop(struct adf_accel_dev *accel_dev) 57 51 { 58 52 return 0; ··· 82 86 hw_data->get_num_aes = get_num_aes; 83 87 hw_data->get_etr_bar_id = get_etr_bar_id; 84 88 hw_data->get_misc_bar_id = get_misc_bar_id; 85 - hw_data->get_pf2vf_offset = get_pf2vf_offset; 89 + hw_data->get_pf2vf_offset = adf_gen2_vf_get_pf2vf_offset; 86 90 hw_data->get_sku = get_sku; 87 91 hw_data->enable_ints = adf_vf_void_noop; 88 92 hw_data->enable_pfvf_comms = adf_enable_vf2pf_comms;
-1
drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.h
··· 12 12 #define ADF_DH895XCCIOV_TX_RINGS_MASK 0xFF 13 13 #define ADF_DH895XCCIOV_ETR_BAR 0 14 14 #define ADF_DH895XCCIOV_ETR_MAX_BANKS 1 15 - #define ADF_DH895XCCIOV_PF2VF_OFFSET 0x200 16 15 17 16 void adf_init_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data); 18 17 void adf_clean_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data);