Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'for-6.19/cxl-elc-test' into cxl-for-next
Extended linear cache unit testing support
- Standardize CXL auto region size
- Add cxl_test CFMWS support for extended linear cache
- Add support for acpi extended linear cache
+74
-4
+1
tools/testing/cxl/Kbuild
+1
tools/testing/cxl/Kbuild
···
10
10
ldflags-y += --wrap=cxl_endpoint_parse_cdat
11
11
ldflags-y += --wrap=cxl_dport_init_ras_reporting
12
12
ldflags-y += --wrap=devm_cxl_endpoint_decoders_setup
13
+
ldflags-y += --wrap=hmat_get_extended_linear_cache_size
13
14
14
15
DRIVERS := ../../../drivers
15
16
CXL_SRC := $(DRIVERS)/cxl
+50
-4
tools/testing/cxl/test/cxl.c
+50
-4
tools/testing/cxl/test/cxl.c
···
15
15
#include "mock.h"
16
16
17
17
static int interleave_arithmetic;
18
+
static bool extended_linear_cache;
18
19
19
20
#define FAKE_QTG_ID 42
20
21
···
26
25
#define NR_CXL_SWITCH_PORTS 2
27
26
#define NR_CXL_PORT_DECODERS 8
28
27
#define NR_BRIDGES (NR_CXL_HOST_BRIDGES + NR_CXL_SINGLE_HOST + NR_CXL_RCH)
28
+
29
+
#define MOCK_AUTO_REGION_SIZE_DEFAULT SZ_512M
30
+
static int mock_auto_region_size = MOCK_AUTO_REGION_SIZE_DEFAULT;
29
31
30
32
static struct platform_device *cxl_acpi;
31
33
static struct platform_device *cxl_host_bridge[NR_CXL_HOST_BRIDGES];
···
430
426
return res;
431
427
}
432
428
429
+
/* Only update CFMWS0 as this is used by the auto region. */
430
+
static void cfmws_elc_update(struct acpi_cedt_cfmws *window, int index)
431
+
{
432
+
if (!extended_linear_cache)
433
+
return;
434
+
435
+
if (index != 0)
436
+
return;
437
+
438
+
/*
439
+
* The window size should be 2x of the CXL region size where half is
440
+
* DRAM and half is CXL
441
+
*/
442
+
window->window_size = mock_auto_region_size * 2;
443
+
}
444
+
433
445
static int populate_cedt(void)
434
446
{
435
447
struct cxl_mock_res *res;
···
470
450
for (i = cfmws_start; i <= cfmws_end; i++) {
471
451
struct acpi_cedt_cfmws *window = mock_cfmws[i];
472
452
453
+
cfmws_elc_update(window, i);
473
454
res = alloc_mock_res(window->window_size, SZ_256M);
474
455
if (!res)
475
456
return -ENOMEM;
···
610
589
611
590
*data = host_bridge_index(adev);
612
591
return AE_OK;
592
+
}
593
+
594
+
static int
595
+
mock_hmat_get_extended_linear_cache_size(struct resource *backing_res,
596
+
int nid, resource_size_t *cache_size)
597
+
{
598
+
struct acpi_cedt_cfmws *window = mock_cfmws[0];
599
+
struct resource cfmws0_res =
600
+
DEFINE_RES_MEM(window->base_hpa, window->window_size);
601
+
602
+
if (!extended_linear_cache ||
603
+
!resource_contains(&cfmws0_res, backing_res)) {
604
+
return hmat_get_extended_linear_cache_size(backing_res,
605
+
nid, cache_size);
606
+
}
607
+
608
+
*cache_size = mock_auto_region_size;
609
+
610
+
return 0;
613
611
}
614
612
615
613
static struct pci_bus mock_pci_bus[NR_BRIDGES];
···
778
738
struct cxl_endpoint_decoder *cxled;
779
739
struct cxl_switch_decoder *cxlsd;
780
740
struct cxl_port *port, *iter;
781
-
const int size = SZ_512M;
782
741
struct cxl_memdev *cxlmd;
783
742
struct cxl_dport *dport;
784
743
struct device *dev;
···
820
781
}
821
782
822
783
base = window->base_hpa;
784
+
if (extended_linear_cache)
785
+
base += mock_auto_region_size;
823
786
cxld->hpa_range = (struct range) {
824
787
.start = base,
825
-
.end = base + size - 1,
788
+
.end = base + mock_auto_region_size - 1,
826
789
};
827
790
828
791
cxld->interleave_ways = 2;
···
833
792
cxld->flags = CXL_DECODER_F_ENABLE;
834
793
cxled->state = CXL_DECODER_STATE_AUTO;
835
794
port->commit_end = cxld->id;
836
-
devm_cxl_dpa_reserve(cxled, 0, size / cxld->interleave_ways, 0);
795
+
devm_cxl_dpa_reserve(cxled, 0,
796
+
mock_auto_region_size / cxld->interleave_ways, 0);
837
797
cxld->commit = mock_decoder_commit;
838
798
cxld->reset = mock_decoder_reset;
839
799
···
883
841
cxld->interleave_granularity = 4096;
884
842
cxld->hpa_range = (struct range) {
885
843
.start = base,
886
-
.end = base + size - 1,
844
+
.end = base + mock_auto_region_size - 1,
887
845
};
888
846
put_device(dev);
889
847
}
···
1127
1085
.devm_cxl_endpoint_decoders_setup = mock_cxl_endpoint_decoders_setup,
1128
1086
.cxl_endpoint_parse_cdat = mock_cxl_endpoint_parse_cdat,
1129
1087
.devm_cxl_add_dport_by_dev = mock_cxl_add_dport_by_dev,
1088
+
.hmat_get_extended_linear_cache_size =
1089
+
mock_hmat_get_extended_linear_cache_size,
1130
1090
.list = LIST_HEAD_INIT(cxl_mock_ops.list),
1131
1091
};
1132
1092
···
1618
1574
1619
1575
module_param(interleave_arithmetic, int, 0444);
1620
1576
MODULE_PARM_DESC(interleave_arithmetic, "Modulo:0, XOR:1");
1577
+
module_param(extended_linear_cache, bool, 0444);
1578
+
MODULE_PARM_DESC(extended_linear_cache, "Enable extended linear cache support");
1621
1579
module_init(cxl_test_init);
1622
1580
module_exit(cxl_test_exit);
1623
1581
MODULE_LICENSE("GPL v2");
+20
tools/testing/cxl/test/mock.c
+20
tools/testing/cxl/test/mock.c
···
111
111
}
112
112
EXPORT_SYMBOL(__wrap_acpi_evaluate_integer);
113
113
114
+
int __wrap_hmat_get_extended_linear_cache_size(struct resource *backing_res,
115
+
int nid,
116
+
resource_size_t *cache_size)
117
+
{
118
+
int index, rc;
119
+
struct cxl_mock_ops *ops = get_cxl_mock_ops(&index);
120
+
121
+
if (ops)
122
+
rc = ops->hmat_get_extended_linear_cache_size(backing_res, nid,
123
+
cache_size);
124
+
else
125
+
rc = hmat_get_extended_linear_cache_size(backing_res, nid,
126
+
cache_size);
127
+
128
+
put_cxl_mock_ops(index);
129
+
130
+
return rc;
131
+
}
132
+
EXPORT_SYMBOL_GPL(__wrap_hmat_get_extended_linear_cache_size);
133
+
114
134
struct acpi_pci_root *__wrap_acpi_pci_find_root(acpi_handle handle)
115
135
{
116
136
int index;
+3
tools/testing/cxl/test/mock.h
+3
tools/testing/cxl/test/mock.h
···
24
24
void (*cxl_endpoint_parse_cdat)(struct cxl_port *port);
25
25
struct cxl_dport *(*devm_cxl_add_dport_by_dev)(struct cxl_port *port,
26
26
struct device *dport_dev);
27
+
int (*hmat_get_extended_linear_cache_size)(struct resource *backing_res,
28
+
int nid,
29
+
resource_size_t *cache_size);
27
30
};
28
31
29
32
void register_cxl_mock_ops(struct cxl_mock_ops *ops);