tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'libnvdimm-for-4.19_misc' of gitolite.kernel.org:pub/scm/linux/kernel/git/nvdimm/nvdimm

Pull libnvdimm updates from Dave Jiang:
"Collection of misc libnvdimm patches for 4.19 submission:

- Adding support to read locked nvdimm capacity.

- Change test code to make DSM failure code injection an override.

- Add support for calculate maximum contiguous area for namespace.

- Add support for queueing a short ARS when there is on going ARS for
nvdimm.

- Allow NULL to be passed in to ->direct_access() for kaddr and pfn
params.

- Improve smart injection support for nvdimm emulation testing.

- Fix test code that supports for emulating controller temperature.

- Fix hang on error before devm_memremap_pages()

- Fix a bug that causes user memory corruption when data returned to
user for ars_status.

- Maintainer updates for Ross Zwisler emails and adding Jan Kara to
fsdax"

* tag 'libnvdimm-for-4.19_misc' of gitolite.kernel.org:pub/scm/linux/kernel/git/nvdimm/nvdimm:
libnvdimm: fix ars_status output length calculation
device-dax: avoid hang on error before devm_memremap_pages()
tools/testing/nvdimm: improve emulation of smart injection
filesystem-dax: Do not request kaddr and pfn when not required
md/dm-writecache: Don't request pointer dummy_addr when not required
dax/super: Do not request a pointer kaddr when not required
tools/testing/nvdimm: kaddr and pfn can be NULL to ->direct_access()
s390, dcssblk: kaddr and pfn can be NULL to ->direct_access()
libnvdimm, pmem: kaddr and pfn can be NULL to ->direct_access()
acpi/nfit: queue issuing of ars when an uc error notification comes in
libnvdimm: Export max available extent
libnvdimm: Use max contiguous area for namespace size
MAINTAINERS: Add Jan Kara for filesystem DAX
MAINTAINERS: update Ross Zwisler's email address
tools/testing/nvdimm: Fix support for emulating controller temperature
tools/testing/nvdimm: Make DSM failure code injection an override
acpi, nfit: Prefer _DSM over _LSR for namespace label reads
libnvdimm: Introduce locked DIMM capacity support

Linus Torvalds 828bf6e9 b3262720

+270 -90
+1
.mailmap
··· 159 159 Randy Dunlap <rdunlap@infradead.org> <rdunlap@xenotime.net> 160 160 Rémi Denis-Courmont <rdenis@simphalempin.com> 161 161 Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> 162 + Ross Zwisler <zwisler@kernel.org> <ross.zwisler@linux.intel.com> 162 163 Rudolf Marek <R.Marek@sh.cvut.cz> 163 164 Rui Saraiva <rmps@joel.ist.utl.pt> 164 165 Sachin P Sant <ssant@in.ibm.com>
+7 -6
MAINTAINERS
··· 4364 4364 4365 4365 FILESYSTEM DIRECT ACCESS (DAX) 4366 4366 M: Matthew Wilcox <mawilcox@microsoft.com> 4367 - M: Ross Zwisler <ross.zwisler@linux.intel.com> 4367 + M: Ross Zwisler <zwisler@kernel.org> 4368 + M: Jan Kara <jack@suse.cz> 4368 4369 L: linux-fsdevel@vger.kernel.org 4369 4370 S: Supported 4370 4371 F: fs/dax.c ··· 4375 4374 DEVICE DIRECT ACCESS (DAX) 4376 4375 M: Dan Williams <dan.j.williams@intel.com> 4377 4376 M: Dave Jiang <dave.jiang@intel.com> 4378 - M: Ross Zwisler <ross.zwisler@linux.intel.com> 4377 + M: Ross Zwisler <zwisler@kernel.org> 4379 4378 M: Vishal Verma <vishal.l.verma@intel.com> 4380 4379 L: linux-nvdimm@lists.01.org 4381 4380 S: Supported ··· 8304 8303 F: tools/lib/lockdep/ 8305 8304 8306 8305 LIBNVDIMM BLK: MMIO-APERTURE DRIVER 8307 - M: Ross Zwisler <ross.zwisler@linux.intel.com> 8306 + M: Ross Zwisler <zwisler@kernel.org> 8308 8307 M: Dan Williams <dan.j.williams@intel.com> 8309 8308 M: Vishal Verma <vishal.l.verma@intel.com> 8310 8309 M: Dave Jiang <dave.jiang@intel.com> ··· 8317 8316 LIBNVDIMM BTT: BLOCK TRANSLATION TABLE 8318 8317 M: Vishal Verma <vishal.l.verma@intel.com> 8319 8318 M: Dan Williams <dan.j.williams@intel.com> 8320 - M: Ross Zwisler <ross.zwisler@linux.intel.com> 8319 + M: Ross Zwisler <zwisler@kernel.org> 8321 8320 M: Dave Jiang <dave.jiang@intel.com> 8322 8321 L: linux-nvdimm@lists.01.org 8323 8322 Q: https://patchwork.kernel.org/project/linux-nvdimm/list/ ··· 8325 8324 F: drivers/nvdimm/btt* 8326 8325 8327 8326 LIBNVDIMM PMEM: PERSISTENT MEMORY DRIVER 8328 - M: Ross Zwisler <ross.zwisler@linux.intel.com> 8327 + M: Ross Zwisler <zwisler@kernel.org> 8329 8328 M: Dan Williams <dan.j.williams@intel.com> 8330 8329 M: Vishal Verma <vishal.l.verma@intel.com> 8331 8330 M: Dave Jiang <dave.jiang@intel.com> ··· 8344 8343 8345 8344 LIBNVDIMM: NON-VOLATILE MEMORY DEVICE SUBSYSTEM 8346 8345 M: Dan Williams <dan.j.williams@intel.com> 8347 - M: Ross Zwisler <ross.zwisler@linux.intel.com> 8346 + M: Ross Zwisler <zwisler@kernel.org> 8348 8347 M: Vishal Verma <vishal.l.verma@intel.com> 8349 8348 M: Dave Jiang <dave.jiang@intel.com> 8350 8349 L: linux-nvdimm@lists.01.org
+20 -4
drivers/acpi/nfit/core.c
··· 1699 1699 { 1700 1700 struct acpi_device *adev, *adev_dimm; 1701 1701 struct device *dev = acpi_desc->dev; 1702 - unsigned long dsm_mask; 1702 + unsigned long dsm_mask, label_mask; 1703 1703 const guid_t *guid; 1704 1704 int i; 1705 1705 int family = -1; ··· 1770 1770 nfit_dsm_revid(nfit_mem->family, i), 1771 1771 1ULL << i)) 1772 1772 set_bit(i, &nfit_mem->dsm_mask); 1773 + 1774 + /* 1775 + * Prefer the NVDIMM_FAMILY_INTEL label read commands if present 1776 + * due to their better semantics handling locked capacity. 1777 + */ 1778 + label_mask = 1 << ND_CMD_GET_CONFIG_SIZE | 1 << ND_CMD_GET_CONFIG_DATA 1779 + | 1 << ND_CMD_SET_CONFIG_DATA; 1780 + if (family == NVDIMM_FAMILY_INTEL 1781 + && (dsm_mask & label_mask) == label_mask) 1782 + return 0; 1773 1783 1774 1784 if (acpi_nvdimm_has_method(adev_dimm, "_LSI") 1775 1785 && acpi_nvdimm_has_method(adev_dimm, "_LSR")) { ··· 2569 2559 test_bit(ARS_SHORT, &nfit_spa->ars_state) 2570 2560 ? "short" : "long"); 2571 2561 clear_bit(ARS_SHORT, &nfit_spa->ars_state); 2572 - set_bit(ARS_DONE, &nfit_spa->ars_state); 2562 + if (test_and_clear_bit(ARS_REQ_REDO, &nfit_spa->ars_state)) { 2563 + set_bit(ARS_SHORT, &nfit_spa->ars_state); 2564 + set_bit(ARS_REQ, &nfit_spa->ars_state); 2565 + dev_dbg(dev, "ARS: processing scrub request received while in progress\n"); 2566 + } else 2567 + set_bit(ARS_DONE, &nfit_spa->ars_state); 2573 2568 } 2574 2569 2575 2570 static int ars_status_process_records(struct acpi_nfit_desc *acpi_desc) ··· 3271 3256 if (test_bit(ARS_FAILED, &nfit_spa->ars_state)) 3272 3257 continue; 3273 3258 3274 - if (test_and_set_bit(ARS_REQ, &nfit_spa->ars_state)) 3259 + if (test_and_set_bit(ARS_REQ, &nfit_spa->ars_state)) { 3275 3260 busy++; 3276 - else { 3261 + set_bit(ARS_REQ_REDO, &nfit_spa->ars_state); 3262 + } else { 3277 3263 if (test_bit(ARS_SHORT, &flags)) 3278 3264 set_bit(ARS_SHORT, &nfit_spa->ars_state); 3279 3265 scheduled++;
+1
drivers/acpi/nfit/nfit.h
··· 119 119 120 120 enum nfit_ars_state { 121 121 ARS_REQ, 122 + ARS_REQ_REDO, 122 123 ARS_DONE, 123 124 ARS_SHORT, 124 125 ARS_FAILED,
+8 -4
drivers/dax/pmem.c
··· 105 105 if (rc) 106 106 return rc; 107 107 108 - rc = devm_add_action_or_reset(dev, dax_pmem_percpu_exit, 109 - &dax_pmem->ref); 110 - if (rc) 108 + rc = devm_add_action(dev, dax_pmem_percpu_exit, &dax_pmem->ref); 109 + if (rc) { 110 + percpu_ref_exit(&dax_pmem->ref); 111 111 return rc; 112 + } 112 113 113 114 dax_pmem->pgmap.ref = &dax_pmem->ref; 114 115 addr = devm_memremap_pages(dev, &dax_pmem->pgmap); 115 - if (IS_ERR(addr)) 116 + if (IS_ERR(addr)) { 117 + devm_remove_action(dev, dax_pmem_percpu_exit, &dax_pmem->ref); 118 + percpu_ref_exit(&dax_pmem->ref); 116 119 return PTR_ERR(addr); 120 + } 117 121 118 122 rc = devm_add_action_or_reset(dev, dax_pmem_percpu_kill, 119 123 &dax_pmem->ref);
+1 -2
drivers/dax/super.c
··· 89 89 struct request_queue *q; 90 90 pgoff_t pgoff; 91 91 int err, id; 92 - void *kaddr; 93 92 pfn_t pfn; 94 93 long len; 95 94 char buf[BDEVNAME_SIZE]; ··· 121 122 } 122 123 123 124 id = dax_read_lock(); 124 - len = dax_direct_access(dax_dev, pgoff, 1, &kaddr, &pfn); 125 + len = dax_direct_access(dax_dev, pgoff, 1, NULL, &pfn); 125 126 dax_read_unlock(id); 126 127 127 128 put_dax(dax_dev);
+1 -2
drivers/md/dm-writecache.c
··· 268 268 i = 0; 269 269 do { 270 270 long daa; 271 - void *dummy_addr; 272 271 daa = dax_direct_access(wc->ssd_dev->dax_dev, i, p - i, 273 - &dummy_addr, &pfn); 272 + NULL, &pfn); 274 273 if (daa <= 0) { 275 274 r = daa ? daa : -EINVAL; 276 275 goto err3;
+2 -2
drivers/nvdimm/bus.c
··· 812 812 * overshoots the remainder by 4 bytes, assume it was 813 813 * including 'status'. 814 814 */ 815 - if (out_field[1] - 8 == remainder) 815 + if (out_field[1] - 4 == remainder) 816 816 return remainder; 817 - return out_field[1] - 4; 817 + return out_field[1] - 8; 818 818 } else if (cmd == ND_CMD_CALL) { 819 819 struct nd_cmd_pkg *pkg = (struct nd_cmd_pkg *) in_field; 820 820
+22 -2
drivers/nvdimm/dimm.c
··· 34 34 return rc; 35 35 } 36 36 37 + /* reset locked, to be validated below... */ 38 + nvdimm_clear_locked(dev); 39 + 37 40 ndd = kzalloc(sizeof(*ndd), GFP_KERNEL); 38 41 if (!ndd) 39 42 return -ENOMEM; ··· 51 48 get_device(dev); 52 49 kref_init(&ndd->kref); 53 50 51 + /* 52 + * EACCES failures reading the namespace label-area-properties 53 + * are interpreted as the DIMM capacity being locked but the 54 + * namespace labels themselves being accessible. 55 + */ 54 56 rc = nvdimm_init_nsarea(ndd); 55 - if (rc == -EACCES) 57 + if (rc == -EACCES) { 58 + /* 59 + * See nvdimm_namespace_common_probe() where we fail to 60 + * allow namespaces to probe while the DIMM is locked, 61 + * but we do allow for namespace enumeration. 62 + */ 56 63 nvdimm_set_locked(dev); 64 + rc = 0; 65 + } 57 66 if (rc) 58 67 goto err; 59 68 69 + /* 70 + * EACCES failures reading the namespace label-data are 71 + * interpreted as the label area being locked in addition to the 72 + * DIMM capacity. We fail the dimm probe to prevent regions from 73 + * attempting to parse the label area. 74 + */ 60 75 rc = nvdimm_init_config_data(ndd); 61 76 if (rc == -EACCES) 62 77 nvdimm_set_locked(dev); ··· 93 72 if (rc == 0) 94 73 nvdimm_set_aliasing(dev); 95 74 } 96 - nvdimm_clear_locked(dev); 97 75 nvdimm_bus_unlock(dev); 98 76 99 77 if (rc)
+31
drivers/nvdimm/dimm_devs.c
··· 537 537 } 538 538 539 539 /** 540 + * nd_pmem_max_contiguous_dpa - For the given dimm+region, return the max 541 + * contiguous unallocated dpa range. 542 + * @nd_region: constrain available space check to this reference region 543 + * @nd_mapping: container of dpa-resource-root + labels 544 + */ 545 + resource_size_t nd_pmem_max_contiguous_dpa(struct nd_region *nd_region, 546 + struct nd_mapping *nd_mapping) 547 + { 548 + struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); 549 + struct nvdimm_bus *nvdimm_bus; 550 + resource_size_t max = 0; 551 + struct resource *res; 552 + 553 + /* if a dimm is disabled the available capacity is zero */ 554 + if (!ndd) 555 + return 0; 556 + 557 + nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); 558 + if (__reserve_free_pmem(&nd_region->dev, nd_mapping->nvdimm)) 559 + return 0; 560 + for_each_dpa_resource(ndd, res) { 561 + if (strcmp(res->name, "pmem-reserve") != 0) 562 + continue; 563 + if (resource_size(res) > max) 564 + max = resource_size(res); 565 + } 566 + release_free_pmem(nvdimm_bus, nd_mapping); 567 + return max; 568 + } 569 + 570 + /** 540 571 * nd_pmem_available_dpa - for the given dimm+region account unallocated dpa 541 572 * @nd_mapping: container of dpa-resource-root + labels 542 573 * @nd_region: constrain available space check to this reference region
+26 -3
drivers/nvdimm/namespace_devs.c
··· 799 799 return 0; 800 800 } 801 801 802 - static int __reserve_free_pmem(struct device *dev, void *data) 802 + int __reserve_free_pmem(struct device *dev, void *data) 803 803 { 804 804 struct nvdimm *nvdimm = data; 805 805 struct nd_region *nd_region; ··· 836 836 return 0; 837 837 } 838 838 839 - static void release_free_pmem(struct nvdimm_bus *nvdimm_bus, 839 + void release_free_pmem(struct nvdimm_bus *nvdimm_bus, 840 840 struct nd_mapping *nd_mapping) 841 841 { 842 842 struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); ··· 1032 1032 1033 1033 allocated += nvdimm_allocated_dpa(ndd, &label_id); 1034 1034 } 1035 - available = nd_region_available_dpa(nd_region); 1035 + available = nd_region_allocatable_dpa(nd_region); 1036 1036 1037 1037 if (val > available + allocated) 1038 1038 return -ENOSPC; ··· 1143 1143 return size; 1144 1144 } 1145 1145 EXPORT_SYMBOL(nvdimm_namespace_capacity); 1146 + 1147 + bool nvdimm_namespace_locked(struct nd_namespace_common *ndns) 1148 + { 1149 + int i; 1150 + bool locked = false; 1151 + struct device *dev = &ndns->dev; 1152 + struct nd_region *nd_region = to_nd_region(dev->parent); 1153 + 1154 + for (i = 0; i < nd_region->ndr_mappings; i++) { 1155 + struct nd_mapping *nd_mapping = &nd_region->mapping[i]; 1156 + struct nvdimm *nvdimm = nd_mapping->nvdimm; 1157 + 1158 + if (test_bit(NDD_LOCKED, &nvdimm->flags)) { 1159 + dev_dbg(dev, "%s locked\n", nvdimm_name(nvdimm)); 1160 + locked = true; 1161 + } 1162 + } 1163 + return locked; 1164 + } 1165 + EXPORT_SYMBOL(nvdimm_namespace_locked); 1146 1166 1147 1167 static ssize_t size_show(struct device *dev, 1148 1168 struct device_attribute *attr, char *buf) ··· 1714 1694 return ERR_PTR(-ENXIO); 1715 1695 } 1716 1696 } 1697 + 1698 + if (nvdimm_namespace_locked(ndns)) 1699 + return ERR_PTR(-EACCES); 1717 1700 1718 1701 size = nvdimm_namespace_capacity(ndns); 1719 1702 if (size < ND_MIN_NAMESPACE_SIZE) {
+8
drivers/nvdimm/nd-core.h
··· 100 100 struct nvdimm_drvdata; 101 101 struct nd_mapping; 102 102 void nd_mapping_free_labels(struct nd_mapping *nd_mapping); 103 + 104 + int __reserve_free_pmem(struct device *dev, void *data); 105 + void release_free_pmem(struct nvdimm_bus *nvdimm_bus, 106 + struct nd_mapping *nd_mapping); 107 + 108 + resource_size_t nd_pmem_max_contiguous_dpa(struct nd_region *nd_region, 109 + struct nd_mapping *nd_mapping); 110 + resource_size_t nd_region_allocatable_dpa(struct nd_region *nd_region); 103 111 resource_size_t nd_pmem_available_dpa(struct nd_region *nd_region, 104 112 struct nd_mapping *nd_mapping, resource_size_t *overlap); 105 113 resource_size_t nd_blk_available_dpa(struct nd_region *nd_region);
+1
drivers/nvdimm/nd.h
··· 357 357 struct nd_label_id *label_id, resource_size_t start, 358 358 resource_size_t n); 359 359 resource_size_t nvdimm_namespace_capacity(struct nd_namespace_common *ndns); 360 + bool nvdimm_namespace_locked(struct nd_namespace_common *ndns); 360 361 struct nd_namespace_common *nvdimm_namespace_common_probe(struct device *dev); 361 362 int nvdimm_namespace_attach_btt(struct nd_namespace_common *ndns); 362 363 int nvdimm_namespace_detach_btt(struct nd_btt *nd_btt);
+5 -2
drivers/nvdimm/pmem.c
··· 226 226 if (unlikely(is_bad_pmem(&pmem->bb, PFN_PHYS(pgoff) / 512, 227 227 PFN_PHYS(nr_pages)))) 228 228 return -EIO; 229 - *kaddr = pmem->virt_addr + offset; 230 - *pfn = phys_to_pfn_t(pmem->phys_addr + offset, pmem->pfn_flags); 229 + 230 + if (kaddr) 231 + *kaddr = pmem->virt_addr + offset; 232 + if (pfn) 233 + *pfn = phys_to_pfn_t(pmem->phys_addr + offset, pmem->pfn_flags); 231 234 232 235 /* 233 236 * If badblocks are present, limit known good range to the
+40
drivers/nvdimm/region_devs.c
··· 389 389 return available; 390 390 } 391 391 392 + resource_size_t nd_region_allocatable_dpa(struct nd_region *nd_region) 393 + { 394 + resource_size_t available = 0; 395 + int i; 396 + 397 + if (is_memory(&nd_region->dev)) 398 + available = PHYS_ADDR_MAX; 399 + 400 + WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev)); 401 + for (i = 0; i < nd_region->ndr_mappings; i++) { 402 + struct nd_mapping *nd_mapping = &nd_region->mapping[i]; 403 + 404 + if (is_memory(&nd_region->dev)) 405 + available = min(available, 406 + nd_pmem_max_contiguous_dpa(nd_region, 407 + nd_mapping)); 408 + else if (is_nd_blk(&nd_region->dev)) 409 + available += nd_blk_available_dpa(nd_region); 410 + } 411 + if (is_memory(&nd_region->dev)) 412 + return available * nd_region->ndr_mappings; 413 + return available; 414 + } 415 + 392 416 static ssize_t available_size_show(struct device *dev, 393 417 struct device_attribute *attr, char *buf) 394 418 { ··· 433 409 return sprintf(buf, "%llu\n", available); 434 410 } 435 411 static DEVICE_ATTR_RO(available_size); 412 + 413 + static ssize_t max_available_extent_show(struct device *dev, 414 + struct device_attribute *attr, char *buf) 415 + { 416 + struct nd_region *nd_region = to_nd_region(dev); 417 + unsigned long long available = 0; 418 + 419 + nvdimm_bus_lock(dev); 420 + wait_nvdimm_bus_probe_idle(dev); 421 + available = nd_region_allocatable_dpa(nd_region); 422 + nvdimm_bus_unlock(dev); 423 + 424 + return sprintf(buf, "%llu\n", available); 425 + } 426 + static DEVICE_ATTR_RO(max_available_extent); 436 427 437 428 static ssize_t init_namespaces_show(struct device *dev, 438 429 struct device_attribute *attr, char *buf) ··· 600 561 &dev_attr_read_only.attr, 601 562 &dev_attr_set_cookie.attr, 602 563 &dev_attr_available_size.attr, 564 + &dev_attr_max_available_extent.attr, 603 565 &dev_attr_namespace_seed.attr, 604 566 &dev_attr_init_namespaces.attr, 605 567 &dev_attr_badblocks.attr,
+5 -3
drivers/s390/block/dcssblk.c
··· 922 922 unsigned long dev_sz; 923 923 924 924 dev_sz = dev_info->end - dev_info->start + 1; 925 - *kaddr = (void *) dev_info->start + offset; 926 - *pfn = __pfn_to_pfn_t(PFN_DOWN(dev_info->start + offset), 927 - PFN_DEV|PFN_SPECIAL); 925 + if (kaddr) 926 + *kaddr = (void *) dev_info->start + offset; 927 + if (pfn) 928 + *pfn = __pfn_to_pfn_t(PFN_DOWN(dev_info->start + offset), 929 + PFN_DEV|PFN_SPECIAL); 928 930 929 931 return (dev_sz - offset) / PAGE_SIZE; 930 932 }
+4 -9
fs/dax.c
··· 655 655 { 656 656 void *vto, *kaddr; 657 657 pgoff_t pgoff; 658 - pfn_t pfn; 659 658 long rc; 660 659 int id; 661 660 ··· 663 664 return rc; 664 665 665 666 id = dax_read_lock(); 666 - rc = dax_direct_access(dax_dev, pgoff, PHYS_PFN(size), &kaddr, &pfn); 667 + rc = dax_direct_access(dax_dev, pgoff, PHYS_PFN(size), &kaddr, NULL); 667 668 if (rc < 0) { 668 669 dax_read_unlock(id); 669 670 return rc; ··· 974 975 { 975 976 const sector_t sector = dax_iomap_sector(iomap, pos); 976 977 pgoff_t pgoff; 977 - void *kaddr; 978 978 int id, rc; 979 979 long length; 980 980 ··· 982 984 return rc; 983 985 id = dax_read_lock(); 984 986 length = dax_direct_access(iomap->dax_dev, pgoff, PHYS_PFN(size), 985 - &kaddr, pfnp); 987 + NULL, pfnp); 986 988 if (length < 0) { 987 989 rc = length; 988 990 goto out; ··· 1058 1060 pgoff_t pgoff; 1059 1061 long rc, id; 1060 1062 void *kaddr; 1061 - pfn_t pfn; 1062 1063 1063 1064 rc = bdev_dax_pgoff(bdev, sector, PAGE_SIZE, &pgoff); 1064 1065 if (rc) 1065 1066 return rc; 1066 1067 1067 1068 id = dax_read_lock(); 1068 - rc = dax_direct_access(dax_dev, pgoff, 1, &kaddr, 1069 - &pfn); 1069 + rc = dax_direct_access(dax_dev, pgoff, 1, &kaddr, NULL); 1070 1070 if (rc < 0) { 1071 1071 dax_read_unlock(id); 1072 1072 return rc; ··· 1120 1124 ssize_t map_len; 1121 1125 pgoff_t pgoff; 1122 1126 void *kaddr; 1123 - pfn_t pfn; 1124 1127 1125 1128 if (fatal_signal_pending(current)) { 1126 1129 ret = -EINTR; ··· 1131 1136 break; 1132 1137 1133 1138 map_len = dax_direct_access(dax_dev, pgoff, PHYS_PFN(size), 1134 - &kaddr, &pfn); 1139 + &kaddr, NULL); 1135 1140 if (map_len < 0) { 1136 1141 ret = map_len; 1137 1142 break;
+8 -4
tools/testing/nvdimm/pmem-dax.c
··· 31 31 if (get_nfit_res(pmem->phys_addr + offset)) { 32 32 struct page *page; 33 33 34 - *kaddr = pmem->virt_addr + offset; 34 + if (kaddr) 35 + *kaddr = pmem->virt_addr + offset; 35 36 page = vmalloc_to_page(pmem->virt_addr + offset); 36 - *pfn = page_to_pfn_t(page); 37 + if (pfn) 38 + *pfn = page_to_pfn_t(page); 37 39 pr_debug_ratelimited("%s: pmem: %p pgoff: %#lx pfn: %#lx\n", 38 40 __func__, pmem, pgoff, page_to_pfn(page)); 39 41 40 42 return 1; 41 43 } 42 44 43 - *kaddr = pmem->virt_addr + offset; 44 - *pfn = phys_to_pfn_t(pmem->phys_addr + offset, pmem->pfn_flags); 45 + if (kaddr) 46 + *kaddr = pmem->virt_addr + offset; 47 + if (pfn) 48 + *pfn = phys_to_pfn_t(pmem->phys_addr + offset, pmem->pfn_flags); 45 49 46 50 /* 47 51 * If badblocks are present, limit known good range to the
+79 -47
tools/testing/nvdimm/test/nfit.c
··· 142 142 static unsigned long dimm_fail_cmd_flags[NUM_DCR]; 143 143 static int dimm_fail_cmd_code[NUM_DCR]; 144 144 145 + static const struct nd_intel_smart smart_def = { 146 + .flags = ND_INTEL_SMART_HEALTH_VALID 147 + | ND_INTEL_SMART_SPARES_VALID 148 + | ND_INTEL_SMART_ALARM_VALID 149 + | ND_INTEL_SMART_USED_VALID 150 + | ND_INTEL_SMART_SHUTDOWN_VALID 151 + | ND_INTEL_SMART_MTEMP_VALID 152 + | ND_INTEL_SMART_CTEMP_VALID, 153 + .health = ND_INTEL_SMART_NON_CRITICAL_HEALTH, 154 + .media_temperature = 23 * 16, 155 + .ctrl_temperature = 25 * 16, 156 + .pmic_temperature = 40 * 16, 157 + .spares = 75, 158 + .alarm_flags = ND_INTEL_SMART_SPARE_TRIP 159 + | ND_INTEL_SMART_TEMP_TRIP, 160 + .ait_status = 1, 161 + .life_used = 5, 162 + .shutdown_state = 0, 163 + .vendor_size = 0, 164 + .shutdown_count = 100, 165 + }; 166 + 145 167 struct nfit_test_fw { 146 168 enum intel_fw_update_state state; 147 169 u32 context; ··· 774 752 if (buf_len != sizeof(*inj)) 775 753 return -EINVAL; 776 754 777 - if (inj->mtemp_enable) 778 - smart->media_temperature = inj->media_temperature; 779 - if (inj->spare_enable) 780 - smart->spares = inj->spares; 781 - if (inj->fatal_enable) 782 - smart->health = ND_INTEL_SMART_FATAL_HEALTH; 783 - if (inj->unsafe_shutdown_enable) { 784 - smart->shutdown_state = 1; 785 - smart->shutdown_count++; 755 + if (inj->flags & ND_INTEL_SMART_INJECT_MTEMP) { 756 + if (inj->mtemp_enable) 757 + smart->media_temperature = inj->media_temperature; 758 + else 759 + smart->media_temperature = smart_def.media_temperature; 760 + } 761 + if (inj->flags & ND_INTEL_SMART_INJECT_SPARE) { 762 + if (inj->spare_enable) 763 + smart->spares = inj->spares; 764 + else 765 + smart->spares = smart_def.spares; 766 + } 767 + if (inj->flags & ND_INTEL_SMART_INJECT_FATAL) { 768 + if (inj->fatal_enable) 769 + smart->health = ND_INTEL_SMART_FATAL_HEALTH; 770 + else 771 + smart->health = ND_INTEL_SMART_NON_CRITICAL_HEALTH; 772 + } 773 + if (inj->flags & ND_INTEL_SMART_INJECT_SHUTDOWN) { 774 + if (inj->unsafe_shutdown_enable) { 775 + smart->shutdown_state = 1; 776 + smart->shutdown_count++; 777 + } else 778 + smart->shutdown_state = 0; 786 779 } 787 780 inj->status = 0; 788 781 smart_notify(bus_dev, dimm_dev, smart, thresh); ··· 921 884 return 0; 922 885 } 923 886 887 + static int override_return_code(int dimm, unsigned int func, int rc) 888 + { 889 + if ((1 << func) & dimm_fail_cmd_flags[dimm]) { 890 + if (dimm_fail_cmd_code[dimm]) 891 + return dimm_fail_cmd_code[dimm]; 892 + return -EIO; 893 + } 894 + return rc; 895 + } 896 + 924 897 static int get_dimm(struct nfit_mem *nfit_mem, unsigned int func) 925 898 { 926 899 int i; ··· 941 894 break; 942 895 if (i >= ARRAY_SIZE(handle)) 943 896 return -ENXIO; 944 - 945 - if ((1 << func) & dimm_fail_cmd_flags[i]) { 946 - if (dimm_fail_cmd_code[i]) 947 - return dimm_fail_cmd_code[i]; 948 - return -EIO; 949 - } 950 - 951 897 return i; 952 898 } 953 899 ··· 979 939 980 940 switch (func) { 981 941 case ND_INTEL_ENABLE_LSS_STATUS: 982 - return nd_intel_test_cmd_set_lss_status(t, 942 + rc = nd_intel_test_cmd_set_lss_status(t, 983 943 buf, buf_len); 944 + break; 984 945 case ND_INTEL_FW_GET_INFO: 985 - return nd_intel_test_get_fw_info(t, buf, 946 + rc = nd_intel_test_get_fw_info(t, buf, 986 947 buf_len, i - t->dcr_idx); 948 + break; 987 949 case ND_INTEL_FW_START_UPDATE: 988 - return nd_intel_test_start_update(t, buf, 950 + rc = nd_intel_test_start_update(t, buf, 989 951 buf_len, i - t->dcr_idx); 952 + break; 990 953 case ND_INTEL_FW_SEND_DATA: 991 - return nd_intel_test_send_data(t, buf, 954 + rc = nd_intel_test_send_data(t, buf, 992 955 buf_len, i - t->dcr_idx); 956 + break; 993 957 case ND_INTEL_FW_FINISH_UPDATE: 994 - return nd_intel_test_finish_fw(t, buf, 958 + rc = nd_intel_test_finish_fw(t, buf, 995 959 buf_len, i - t->dcr_idx); 960 + break; 996 961 case ND_INTEL_FW_FINISH_QUERY: 997 - return nd_intel_test_finish_query(t, buf, 962 + rc = nd_intel_test_finish_query(t, buf, 998 963 buf_len, i - t->dcr_idx); 964 + break; 999 965 case ND_INTEL_SMART: 1000 - return nfit_test_cmd_smart(buf, buf_len, 966 + rc = nfit_test_cmd_smart(buf, buf_len, 1001 967 &t->smart[i - t->dcr_idx]); 968 + break; 1002 969 case ND_INTEL_SMART_THRESHOLD: 1003 - return nfit_test_cmd_smart_threshold(buf, 970 + rc = nfit_test_cmd_smart_threshold(buf, 1004 971 buf_len, 1005 972 &t->smart_threshold[i - 1006 973 t->dcr_idx]); 974 + break; 1007 975 case ND_INTEL_SMART_SET_THRESHOLD: 1008 - return nfit_test_cmd_smart_set_threshold(buf, 976 + rc = nfit_test_cmd_smart_set_threshold(buf, 1009 977 buf_len, 1010 978 &t->smart_threshold[i - 1011 979 t->dcr_idx], 1012 980 &t->smart[i - t->dcr_idx], 1013 981 &t->pdev.dev, t->dimm_dev[i]); 982 + break; 1014 983 case ND_INTEL_SMART_INJECT: 1015 - return nfit_test_cmd_smart_inject(buf, 984 + rc = nfit_test_cmd_smart_inject(buf, 1016 985 buf_len, 1017 986 &t->smart_threshold[i - 1018 987 t->dcr_idx], 1019 988 &t->smart[i - t->dcr_idx], 1020 989 &t->pdev.dev, t->dimm_dev[i]); 990 + break; 1021 991 default: 1022 992 return -ENOTTY; 1023 993 } 994 + return override_return_code(i, func, rc); 1024 995 } 1025 996 1026 997 if (!test_bit(cmd, &cmd_mask) ··· 1057 1006 default: 1058 1007 return -ENOTTY; 1059 1008 } 1009 + return override_return_code(i, func, rc); 1060 1010 } else { 1061 1011 struct ars_state *ars_state = &t->ars_state; 1062 1012 struct nd_cmd_pkg *call_pkg = buf; ··· 1354 1302 .ctrl_temperature = 30 * 16, 1355 1303 .spares = 5, 1356 1304 }; 1357 - const struct nd_intel_smart smart_data = { 1358 - .flags = ND_INTEL_SMART_HEALTH_VALID 1359 - | ND_INTEL_SMART_SPARES_VALID 1360 - | ND_INTEL_SMART_ALARM_VALID 1361 - | ND_INTEL_SMART_USED_VALID 1362 - | ND_INTEL_SMART_SHUTDOWN_VALID 1363 - | ND_INTEL_SMART_MTEMP_VALID, 1364 - .health = ND_INTEL_SMART_NON_CRITICAL_HEALTH, 1365 - .media_temperature = 23 * 16, 1366 - .ctrl_temperature = 25 * 16, 1367 - .pmic_temperature = 40 * 16, 1368 - .spares = 75, 1369 - .alarm_flags = ND_INTEL_SMART_SPARE_TRIP 1370 - | ND_INTEL_SMART_TEMP_TRIP, 1371 - .ait_status = 1, 1372 - .life_used = 5, 1373 - .shutdown_state = 0, 1374 - .vendor_size = 0, 1375 - .shutdown_count = 100, 1376 - }; 1377 1305 1378 1306 for (i = 0; i < t->num_dcr; i++) { 1379 - memcpy(&t->smart[i], &smart_data, sizeof(smart_data)); 1307 + memcpy(&t->smart[i], &smart_def, sizeof(smart_def)); 1380 1308 memcpy(&t->smart_threshold[i], &smart_t_data, 1381 1309 sizeof(smart_t_data)); 1382 1310 }