Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/ast: Partially implement POST without ast device instance
We'll have to do some of the GPU POSTing for detecting the ast device
type. Make this work without an instance of the ast device.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231116100240.22975-8-tzimmermann@suse.de
+48
-31
+1
-1
drivers/gpu/drm/ast/ast_drv.h
+1
-1
drivers/gpu/drm/ast/ast_drv.h
···
482
482
void ast_post_gpu(struct drm_device *dev);
483
483
u32 ast_mindwm(struct ast_device *ast, u32 r);
484
484
void ast_moutdwm(struct ast_device *ast, u32 r, u32 v);
485
-
void ast_patch_ahb_2500(struct ast_device *ast);
485
+
void ast_patch_ahb_2500(void __iomem *regs);
486
486
/* ast dp501 */
487
487
void ast_set_dp501_video_output(struct drm_device *dev, u8 mode);
488
488
bool ast_backup_fw(struct drm_device *dev, u8 *addr, u32 size);
+1
-1
drivers/gpu/drm/ast/ast_main.c
+1
-1
drivers/gpu/drm/ast/ast_main.c
+46
-29
drivers/gpu/drm/ast/ast_post.c
+46
-29
drivers/gpu/drm/ast/ast_post.c
···
77
77
ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xff, reg);
78
78
}
79
79
80
-
u32 ast_mindwm(struct ast_device *ast, u32 r)
80
+
static u32 __ast_mindwm(void __iomem *regs, u32 r)
81
81
{
82
-
uint32_t data;
82
+
u32 data;
83
83
84
-
ast_write32(ast, 0xf004, r & 0xffff0000);
85
-
ast_write32(ast, 0xf000, 0x1);
84
+
__ast_write32(regs, 0xf004, r & 0xffff0000);
85
+
__ast_write32(regs, 0xf000, 0x1);
86
86
87
87
do {
88
-
data = ast_read32(ast, 0xf004) & 0xffff0000;
88
+
data = __ast_read32(regs, 0xf004) & 0xffff0000;
89
89
} while (data != (r & 0xffff0000));
90
-
return ast_read32(ast, 0x10000 + (r & 0x0000ffff));
90
+
91
+
return __ast_read32(regs, 0x10000 + (r & 0x0000ffff));
92
+
}
93
+
94
+
static void __ast_moutdwm(void __iomem *regs, u32 r, u32 v)
95
+
{
96
+
u32 data;
97
+
98
+
__ast_write32(regs, 0xf004, r & 0xffff0000);
99
+
__ast_write32(regs, 0xf000, 0x1);
100
+
101
+
do {
102
+
data = __ast_read32(regs, 0xf004) & 0xffff0000;
103
+
} while (data != (r & 0xffff0000));
104
+
105
+
__ast_write32(regs, 0x10000 + (r & 0x0000ffff), v);
106
+
}
107
+
108
+
u32 ast_mindwm(struct ast_device *ast, u32 r)
109
+
{
110
+
return __ast_mindwm(ast->regs, r);
91
111
}
92
112
93
113
void ast_moutdwm(struct ast_device *ast, u32 r, u32 v)
94
114
{
95
-
uint32_t data;
96
-
ast_write32(ast, 0xf004, r & 0xffff0000);
97
-
ast_write32(ast, 0xf000, 0x1);
98
-
do {
99
-
data = ast_read32(ast, 0xf004) & 0xffff0000;
100
-
} while (data != (r & 0xffff0000));
101
-
ast_write32(ast, 0x10000 + (r & 0x0000ffff), v);
115
+
__ast_moutdwm(ast->regs, r, v);
102
116
}
103
117
104
118
/*
···
2001
1987
return true;
2002
1988
}
2003
1989
2004
-
void ast_patch_ahb_2500(struct ast_device *ast)
1990
+
void ast_patch_ahb_2500(void __iomem *regs)
2005
1991
{
2006
-
u32 data;
1992
+
u32 data;
2007
1993
2008
1994
/* Clear bus lock condition */
2009
-
ast_moutdwm(ast, 0x1e600000, 0xAEED1A03);
2010
-
ast_moutdwm(ast, 0x1e600084, 0x00010000);
2011
-
ast_moutdwm(ast, 0x1e600088, 0x00000000);
2012
-
ast_moutdwm(ast, 0x1e6e2000, 0x1688A8A8);
2013
-
data = ast_mindwm(ast, 0x1e6e2070);
2014
-
if (data & 0x08000000) { /* check fast reset */
1995
+
__ast_moutdwm(regs, 0x1e600000, 0xAEED1A03);
1996
+
__ast_moutdwm(regs, 0x1e600084, 0x00010000);
1997
+
__ast_moutdwm(regs, 0x1e600088, 0x00000000);
1998
+
__ast_moutdwm(regs, 0x1e6e2000, 0x1688A8A8);
1999
+
2000
+
data = __ast_mindwm(regs, 0x1e6e2070);
2001
+
if (data & 0x08000000) { /* check fast reset */
2015
2002
/*
2016
2003
* If "Fast restet" is enabled for ARM-ICE debugger,
2017
2004
* then WDT needs to enable, that
···
2024
2009
* [1]:= 1:WDT will be cleeared and disabled after timeout occurs
2025
2010
* [0]:= 1:WDT enable
2026
2011
*/
2027
-
ast_moutdwm(ast, 0x1E785004, 0x00000010);
2028
-
ast_moutdwm(ast, 0x1E785008, 0x00004755);
2029
-
ast_moutdwm(ast, 0x1E78500c, 0x00000033);
2012
+
__ast_moutdwm(regs, 0x1E785004, 0x00000010);
2013
+
__ast_moutdwm(regs, 0x1E785008, 0x00004755);
2014
+
__ast_moutdwm(regs, 0x1E78500c, 0x00000033);
2030
2015
udelay(1000);
2031
2016
}
2017
+
2032
2018
do {
2033
-
ast_moutdwm(ast, 0x1e6e2000, 0x1688A8A8);
2034
-
data = ast_mindwm(ast, 0x1e6e2000);
2035
-
} while (data != 1);
2036
-
ast_moutdwm(ast, 0x1e6e207c, 0x08000000); /* clear fast reset */
2019
+
__ast_moutdwm(regs, 0x1e6e2000, 0x1688A8A8);
2020
+
data = __ast_mindwm(regs, 0x1e6e2000);
2021
+
} while (data != 1);
2022
+
2023
+
__ast_moutdwm(regs, 0x1e6e207c, 0x08000000); /* clear fast reset */
2037
2024
}
2038
2025
2039
2026
void ast_post_chip_2500(struct drm_device *dev)
···
2047
2030
reg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff);
2048
2031
if ((reg & AST_VRAM_INIT_STATUS_MASK) == 0) {/* vga only */
2049
2032
/* Clear bus lock condition */
2050
-
ast_patch_ahb_2500(ast);
2033
+
ast_patch_ahb_2500(ast->regs);
2051
2034
2052
2035
/* Disable watchdog */
2053
2036
ast_moutdwm(ast, 0x1E78502C, 0x00000000);