tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'sunxi-dt-for-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt

- whitespace fixes
- replaced RTC indexes with constants
- gpio-key nodes aligned with dtschema
- fixed LED node for Orange Pi Win
- added OPP table for R40 CPU and thermal points
- updated I2C controller compatibles
- added compatibles for MBUS, D1 DE2 clocks, D1 USB
- enable internal HMIC bias on Pinephone

* tag 'sunxi-dt-for-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: pinephone: Enable internal HMIC bias
dt-bindings: arm: sunxi: Add several MBUS compatibles
dt-bindings: arm: sunxi: Default to the full MBUS binding
dt-bindings: usb: generic-ohci: Add Allwinner D1 compatible
dt-bindings: usb: generic-ehci: Add Allwinner D1 compatible
dt-bindings: usb: sunxi-musb: Add Allwinner D1 compatible
arm64: dts: allwinner: a100: Update I2C controller fallback
dt-bindings: i2c: mv64xxx: Add variants with offload support
ARM: dts: sun8i-r40: Add thermal trip points/cooling maps
ARM: dts: sun8i-r40: add opp table for cpu
ARM: dts: sun8i-r40: Add "cpu-supply" node for sun8i-r40 based board
arm64: dts: allwinner: a64: orangepi-win: Fix LED node name
dt-bindings: clock: Add compatible for D1 DE2 clocks
ARM: dts: allwinner: align gpio-key node names with dtschema
arm64: dts: allwinner: align gpio-key node names with dtschema
arm64: dts: allwinner: Use constants for RTC clock indexes
ARM: dts: sunxi: Use constants for RTC clock indexes
ARM: dts: sun5i: adjust whitespace around '='

Link: https://lore.kernel.org/r/Ysh8qRH0Q5Xv9Qhf@kista.localdomain
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Arnd Bergmann 859dd6d3 5a75c295

+283 -122
+17 -7
Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml
··· 29 29 compatible: 30 30 enum: 31 31 - allwinner,sun5i-a13-mbus 32 + - allwinner,sun8i-a33-mbus 33 + - allwinner,sun8i-a50-mbus 34 + - allwinner,sun8i-a83t-mbus 32 35 - allwinner,sun8i-h3-mbus 33 36 - allwinner,sun8i-r40-mbus 37 + - allwinner,sun8i-v3s-mbus 38 + - allwinner,sun8i-v536-mbus 39 + - allwinner,sun20i-d1-mbus 34 40 - allwinner,sun50i-a64-mbus 41 + - allwinner,sun50i-a100-mbus 35 42 - allwinner,sun50i-h5-mbus 43 + - allwinner,sun50i-h6-mbus 44 + - allwinner,sun50i-h616-mbus 45 + - allwinner,sun50i-r329-mbus 36 46 37 47 reg: 38 48 minItems: 1 ··· 91 81 - dma-ranges 92 82 93 83 if: 94 - properties: 95 - compatible: 96 - contains: 97 - enum: 98 - - allwinner,sun8i-h3-mbus 99 - - allwinner,sun50i-a64-mbus 100 - - allwinner,sun50i-h5-mbus 84 + not: 85 + properties: 86 + compatible: 87 + contains: 88 + enum: 89 + - allwinner,sun5i-a13-mbus 90 + - allwinner,sun8i-r40-mbus 101 91 102 92 then: 103 93 properties:
+3
Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml
··· 28 28 - items: 29 29 - const: allwinner,sun8i-r40-de2-clk 30 30 - const: allwinner,sun8i-h3-de2-clk 31 + - items: 32 + - const: allwinner,sun20i-d1-de2-clk 33 + - const: allwinner,sun50i-h5-de2-clk 31 34 32 35 reg: 33 36 maxItems: 1
+9 -1
Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml
··· 21 21 - enum: 22 22 - allwinner,sun8i-a23-i2c 23 23 - allwinner,sun8i-a83t-i2c 24 + - allwinner,sun8i-v536-i2c 24 25 - allwinner,sun50i-a64-i2c 25 - - allwinner,sun50i-a100-i2c 26 26 - allwinner,sun50i-h6-i2c 27 + - const: allwinner,sun6i-a31-i2c 28 + - description: Allwinner SoCs with offload support 29 + items: 30 + - enum: 31 + - allwinner,sun20i-d1-i2c 32 + - allwinner,sun50i-a100-i2c 27 33 - allwinner,sun50i-h616-i2c 34 + - allwinner,sun50i-r329-i2c 35 + - const: allwinner,sun8i-v536-i2c 28 36 - const: allwinner,sun6i-a31-i2c 29 37 - const: marvell,mv64xxx-i2c 30 38 - const: marvell,mv78230-i2c
+1
Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml
··· 20 20 - items: 21 21 - enum: 22 22 - allwinner,sun8i-a83t-musb 23 + - allwinner,sun20i-d1-musb 23 24 - allwinner,sun50i-h6-musb 24 25 - const: allwinner,sun8i-a33-musb 25 26 - items:
+1
Documentation/devicetree/bindings/usb/generic-ehci.yaml
··· 38 38 - allwinner,sun8i-h3-ehci 39 39 - allwinner,sun8i-r40-ehci 40 40 - allwinner,sun9i-a80-ehci 41 + - allwinner,sun20i-d1-ehci 41 42 - aspeed,ast2400-ehci 42 43 - aspeed,ast2500-ehci 43 44 - aspeed,ast2600-ehci
+1
Documentation/devicetree/bindings/usb/generic-ohci.yaml
··· 28 28 - allwinner,sun8i-h3-ohci 29 29 - allwinner,sun8i-r40-ohci 30 30 - allwinner,sun9i-a80-ohci 31 + - allwinner,sun20i-d1-ohci 31 32 - brcm,bcm3384-ohci 32 33 - brcm,bcm63268-ohci 33 34 - brcm,bcm6328-ohci
+20 -20
arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts
··· 63 63 compatible = "gpio-keys-polled"; 64 64 poll-interval = <20>; 65 65 66 - left-joystick-left { 66 + event-left-joystick-left { 67 67 label = "Left Joystick Left"; 68 68 linux,code = <ABS_X>; 69 69 linux,input-type = <EV_ABS>; ··· 71 71 gpios = <&pio 0 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA6 */ 72 72 }; 73 73 74 - left-joystick-right { 74 + event-left-joystick-right { 75 75 label = "Left Joystick Right"; 76 76 linux,code = <ABS_X>; 77 77 linux,input-type = <EV_ABS>; ··· 79 79 gpios = <&pio 0 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA5 */ 80 80 }; 81 81 82 - left-joystick-up { 82 + event-left-joystick-up { 83 83 label = "Left Joystick Up"; 84 84 linux,code = <ABS_Y>; 85 85 linux,input-type = <EV_ABS>; ··· 87 87 gpios = <&pio 0 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA8 */ 88 88 }; 89 89 90 - left-joystick-down { 90 + event-left-joystick-down { 91 91 label = "Left Joystick Down"; 92 92 linux,code = <ABS_Y>; 93 93 linux,input-type = <EV_ABS>; ··· 95 95 gpios = <&pio 0 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA9 */ 96 96 }; 97 97 98 - right-joystick-left { 98 + event-right-joystick-left { 99 99 label = "Right Joystick Left"; 100 100 linux,code = <ABS_Z>; 101 101 linux,input-type = <EV_ABS>; ··· 103 103 gpios = <&pio 0 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA1 */ 104 104 }; 105 105 106 - right-joystick-right { 106 + event-right-joystick-right { 107 107 label = "Right Joystick Right"; 108 108 linux,code = <ABS_Z>; 109 109 linux,input-type = <EV_ABS>; ··· 111 111 gpios = <&pio 0 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA0 */ 112 112 }; 113 113 114 - right-joystick-up { 114 + event-right-joystick-up { 115 115 label = "Right Joystick Up"; 116 116 linux,code = <ABS_RZ>; 117 117 linux,input-type = <EV_ABS>; ··· 119 119 gpios = <&pio 0 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA3 */ 120 120 }; 121 121 122 - right-joystick-down { 122 + event-right-joystick-down { 123 123 label = "Right Joystick Down"; 124 124 linux,code = <ABS_RZ>; 125 125 linux,input-type = <EV_ABS>; ··· 127 127 gpios = <&pio 0 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA4 */ 128 128 }; 129 129 130 - dpad-left { 130 + event-dpad-left { 131 131 label = "DPad Left"; 132 132 linux,code = <ABS_HAT0X>; 133 133 linux,input-type = <EV_ABS>; ··· 135 135 gpios = <&pio 7 23 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH23 */ 136 136 }; 137 137 138 - dpad-right { 138 + event-dpad-right { 139 139 label = "DPad Right"; 140 140 linux,code = <ABS_HAT0X>; 141 141 linux,input-type = <EV_ABS>; ··· 143 143 gpios = <&pio 7 24 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH24 */ 144 144 }; 145 145 146 - dpad-up { 146 + event-dpad-up { 147 147 label = "DPad Up"; 148 148 linux,code = <ABS_HAT0Y>; 149 149 linux,input-type = <EV_ABS>; ··· 151 151 gpios = <&pio 7 25 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH25 */ 152 152 }; 153 153 154 - dpad-down { 154 + event-dpad-down { 155 155 label = "DPad Down"; 156 156 linux,code = <ABS_HAT0Y>; 157 157 linux,input-type = <EV_ABS>; ··· 159 159 gpios = <&pio 7 26 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH26 */ 160 160 }; 161 161 162 - x { 162 + event-x { 163 163 label = "Button X"; 164 164 linux,code = <BTN_X>; 165 165 gpios = <&pio 0 16 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA16 */ 166 166 }; 167 167 168 - y { 168 + event-y { 169 169 label = "Button Y"; 170 170 linux,code = <BTN_Y>; 171 171 gpios = <&pio 0 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA14 */ 172 172 }; 173 173 174 - a { 174 + event-a { 175 175 label = "Button A"; 176 176 linux,code = <BTN_A>; 177 177 gpios = <&pio 0 17 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA17 */ 178 178 }; 179 179 180 - b { 180 + event-b { 181 181 label = "Button B"; 182 182 linux,code = <BTN_B>; 183 183 gpios = <&pio 0 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA15 */ 184 184 }; 185 185 186 - select { 186 + event-select { 187 187 label = "Select Button"; 188 188 linux,code = <BTN_SELECT>; 189 189 gpios = <&pio 0 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA11 */ 190 190 }; 191 191 192 - start { 192 + event-start { 193 193 label = "Start Button"; 194 194 linux,code = <BTN_START>; 195 195 gpios = <&pio 0 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA12 */ 196 196 }; 197 197 198 - top-left { 198 + event-top-left { 199 199 label = "Top Left Button"; 200 200 linux,code = <BTN_TL>; 201 201 gpios = <&pio 7 22 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH22 */ 202 202 }; 203 203 204 - top-right { 204 + event-top-right { 205 205 label = "Top Right Button"; 206 206 linux,code = <BTN_TR>; 207 207 gpios = <&pio 0 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA13 */
+3 -3
arch/arm/boot/dts/sun4i-a10-pcduino.dts
··· 77 77 gpio-keys { 78 78 compatible = "gpio-keys"; 79 79 80 - back { 80 + key-back { 81 81 label = "Key Back"; 82 82 linux,code = <KEY_BACK>; 83 83 gpios = <&pio 7 17 GPIO_ACTIVE_LOW>; 84 84 }; 85 85 86 - home { 86 + key-home { 87 87 label = "Key Home"; 88 88 linux,code = <KEY_HOME>; 89 89 gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; 90 90 }; 91 91 92 - menu { 92 + key-menu { 93 93 label = "Key Menu"; 94 94 linux,code = <KEY_MENU>; 95 95 gpios = <&pio 7 19 GPIO_ACTIVE_LOW>;
+3 -3
arch/arm/boot/dts/sun5i-a13-licheepi-one.dts
··· 67 67 compatible = "gpio-leds"; 68 68 69 69 led-0 { 70 - label ="licheepi:red:usr"; 70 + label = "licheepi:red:usr"; 71 71 gpios = <&pio 2 5 GPIO_ACTIVE_LOW>; 72 72 }; 73 73 74 74 led-1 { 75 - label ="licheepi:green:usr"; 75 + label = "licheepi:green:usr"; 76 76 gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; 77 77 default-state = "on"; 78 78 }; 79 79 80 80 led-2 { 81 - label ="licheepi:blue:usr"; 81 + label = "licheepi:blue:usr"; 82 82 gpios = <&pio 2 4 GPIO_ACTIVE_LOW>; 83 83 }; 84 84
+7 -5
arch/arm/boot/dts/sun6i-a31.dtsi
··· 46 46 #include <dt-bindings/thermal/thermal.h> 47 47 48 48 #include <dt-bindings/clock/sun6i-a31-ccu.h> 49 + #include <dt-bindings/clock/sun6i-rtc.h> 49 50 #include <dt-bindings/reset/sun6i-a31-ccu.h> 50 51 51 52 / { ··· 599 598 ccu: clock@1c20000 { 600 599 compatible = "allwinner,sun6i-a31-ccu"; 601 600 reg = <0x01c20000 0x400>; 602 - clocks = <&osc24M>, <&rtc 0>; 601 + clocks = <&osc24M>, <&rtc CLK_OSC32K>; 603 602 clock-names = "hosc", "losc"; 604 603 #clock-cells = <1>; 605 604 #reset-cells = <1>; ··· 613 612 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 614 613 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 615 614 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 616 - clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&rtc 0>; 615 + clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, 616 + <&rtc CLK_OSC32K>; 617 617 clock-names = "apb", "hosc", "losc"; 618 618 gpio-controller; 619 619 interrupt-controller; ··· 1321 1319 ar100: ar100_clk { 1322 1320 compatible = "allwinner,sun6i-a31-ar100-clk"; 1323 1321 #clock-cells = <0>; 1324 - clocks = <&rtc 0>, <&osc24M>, 1322 + clocks = <&rtc CLK_OSC32K>, <&osc24M>, 1325 1323 <&ccu CLK_PLL_PERIPH>, 1326 1324 <&ccu CLK_PLL_PERIPH>; 1327 1325 clock-output-names = "ar100"; ··· 1356 1354 ir_clk: ir_clk { 1357 1355 #clock-cells = <0>; 1358 1356 compatible = "allwinner,sun4i-a10-mod0-clk"; 1359 - clocks = <&rtc 0>, <&osc24M>; 1357 + clocks = <&rtc CLK_OSC32K>, <&osc24M>; 1360 1358 clock-output-names = "ir"; 1361 1359 }; 1362 1360 ··· 1387 1385 interrupt-parent = <&r_intc>; 1388 1386 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1389 1387 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 1390 - clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>; 1388 + clocks = <&apb0_gates 0>, <&osc24M>, <&rtc CLK_OSC32K>; 1391 1389 clock-names = "apb", "hosc", "losc"; 1392 1390 resets = <&apb0_rst 0>; 1393 1391 gpio-controller;
+3 -3
arch/arm/boot/dts/sun7i-a20-pcduino3.dts
··· 78 78 gpio-keys { 79 79 compatible = "gpio-keys"; 80 80 81 - back { 81 + key-back { 82 82 label = "Key Back"; 83 83 linux,code = <KEY_BACK>; 84 84 gpios = <&pio 7 17 GPIO_ACTIVE_LOW>; 85 85 }; 86 86 87 - home { 87 + key-home { 88 88 label = "Key Home"; 89 89 linux,code = <KEY_HOME>; 90 90 gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; 91 91 }; 92 92 93 - menu { 93 + key-menu { 94 94 label = "Key Menu"; 95 95 linux,code = <KEY_MENU>; 96 96 gpios = <&pio 7 19 GPIO_ACTIVE_LOW>;
+5 -3
arch/arm/boot/dts/sun8i-a23-a33.dtsi
··· 44 44 45 45 #include <dt-bindings/interrupt-controller/arm-gic.h> 46 46 47 + #include <dt-bindings/clock/sun6i-rtc.h> 47 48 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h> 48 49 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h> 49 50 ··· 330 329 331 330 ccu: clock@1c20000 { 332 331 reg = <0x01c20000 0x400>; 333 - clocks = <&osc24M>, <&rtc 0>; 332 + clocks = <&osc24M>, <&rtc CLK_OSC32K>; 334 333 clock-names = "hosc", "losc"; 335 334 #clock-cells = <1>; 336 335 #reset-cells = <1>; ··· 341 340 reg = <0x01c20800 0x400>; 342 341 interrupt-parent = <&r_intc>; 343 342 /* interrupts get set in SoC specific dtsi file */ 344 - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; 343 + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, 344 + <&rtc CLK_OSC32K>; 345 345 clock-names = "apb", "hosc", "losc"; 346 346 gpio-controller; 347 347 interrupt-controller; ··· 812 810 reg = <0x01f02c00 0x400>; 813 811 interrupt-parent = <&r_intc>; 814 812 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 815 - clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>; 813 + clocks = <&apb0_gates 0>, <&osc24M>, <&rtc CLK_OSC32K>; 816 814 clock-names = "apb", "hosc", "losc"; 817 815 resets = <&apb0_rst 0>; 818 816 gpio-controller;
+4 -4
arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
··· 47 47 }; 48 48 }; 49 49 50 - gpio_keys { 50 + gpio-keys { 51 51 compatible = "gpio-keys"; 52 52 53 - sw4 { 53 + switch-4 { 54 54 label = "power"; 55 55 linux,code = <KEY_POWER>; 56 56 gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; ··· 106 106 wifi_pwrseq: wifi_pwrseq { 107 107 compatible = "mmc-pwrseq-simple"; 108 108 reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ 109 - clocks = <&rtc 1>; 109 + clocks = <&rtc CLK_OSC32K_FANOUT>; 110 110 clock-names = "ext_clock"; 111 111 }; 112 112 }; ··· 181 181 bluetooth { 182 182 compatible = "brcm,bcm43438-bt"; 183 183 max-speed = <1500000>; 184 - clocks = <&rtc 1>; 184 + clocks = <&rtc CLK_OSC32K_FANOUT>; 185 185 clock-names = "lpo"; 186 186 vbat-supply = <&reg_vcc3v3>; 187 187 vddio-supply = <&reg_vcc3v3>;
+3 -3
arch/arm/boot/dts/sun8i-h3-mapleboard-mp130.dts
··· 39 39 }; 40 40 }; 41 41 42 - r_gpio_keys { 42 + gpio-keys { 43 43 compatible = "gpio-keys"; 44 44 45 - power { 45 + key-power { 46 46 label = "power"; 47 47 linux,code = <KEY_POWER>; 48 48 gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */ 49 49 }; 50 50 51 - user { 51 + key-user { 52 52 label = "user"; 53 53 linux,code = <BTN_0>; 54 54 gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>;
+4 -4
arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts
··· 37 37 }; 38 38 }; 39 39 40 - r_gpio_keys { 40 + gpio-keys { 41 41 compatible = "gpio-keys"; 42 42 43 - k1 { 43 + key-0 { 44 44 label = "k1"; 45 45 linux,code = <BTN_0>; 46 46 gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */ ··· 90 90 wifi_pwrseq: wifi_pwrseq { 91 91 compatible = "mmc-pwrseq-simple"; 92 92 reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ 93 - clocks = <&rtc 1>; 93 + clocks = <&rtc CLK_OSC32K_FANOUT>; 94 94 clock-names = "ext_clock"; 95 95 }; 96 96 ··· 151 151 152 152 bluetooth { 153 153 compatible = "brcm,bcm43438-bt"; 154 - clocks = <&rtc 1>; 154 + clocks = <&rtc CLK_OSC32K_FANOUT>; 155 155 clock-names = "lpo"; 156 156 vbat-supply = <&reg_vcc3v3>; 157 157 vddio-supply = <&reg_vcc3v3>;
+1 -1
arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
··· 127 127 128 128 bluetooth { 129 129 compatible = "brcm,bcm43438-bt"; 130 - clocks = <&rtc 1>; 130 + clocks = <&rtc CLK_OSC32K_FANOUT>; 131 131 clock-names = "lpo"; 132 132 vbat-supply = <&reg_vcc3v3>; 133 133 vddio-supply = <&reg_vcc3v3>;
+2 -2
arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
··· 46 46 wifi_pwrseq: wifi_pwrseq { 47 47 compatible = "mmc-pwrseq-simple"; 48 48 reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ 49 - clocks = <&rtc 1>; 49 + clocks = <&rtc CLK_OSC32K_FANOUT>; 50 50 clock-names = "ext_clock"; 51 51 }; 52 52 ··· 147 147 148 148 bluetooth { 149 149 compatible = "brcm,bcm43438-bt"; 150 - clocks = <&rtc 1>; 150 + clocks = <&rtc CLK_OSC32K_FANOUT>; 151 151 clock-names = "lpo"; 152 152 vbat-supply = <&reg_vcc3v3>; 153 153 vddio-supply = <&reg_vcc3v3>;
+2 -2
arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
··· 73 73 }; 74 74 }; 75 75 76 - r_gpio_keys { 76 + gpio-keys { 77 77 compatible = "gpio-keys"; 78 78 79 - k1 { 79 + key-0 { 80 80 label = "k1"; 81 81 linux,code = <KEY_POWER>; 82 82 gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
+3 -3
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
··· 88 88 }; 89 89 }; 90 90 91 - r_gpio_keys { 91 + gpio-keys { 92 92 compatible = "gpio-keys"; 93 93 94 - sw2 { 94 + switch-2 { 95 95 label = "sw2"; 96 96 linux,code = <BTN_1>; 97 97 gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; 98 98 }; 99 99 100 - sw4 { 100 + switch-4 { 101 101 label = "sw4"; 102 102 linux,code = <KEY_POWER>; 103 103 gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
+2 -2
arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
··· 87 87 }; 88 88 }; 89 89 90 - r_gpio_keys { 90 + gpio-keys { 91 91 compatible = "gpio-keys"; 92 92 93 - sw4 { 93 + switch-4 { 94 94 label = "sw4"; 95 95 linux,code = <BTN_0>; 96 96 gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
+2 -2
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
··· 86 86 }; 87 87 }; 88 88 89 - r_gpio_keys { 89 + gpio-keys { 90 90 compatible = "gpio-keys"; 91 91 92 - sw4 { 92 + switch-4 { 93 93 label = "sw4"; 94 94 linux,code = <BTN_0>; 95 95 gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
+2 -2
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
··· 86 86 }; 87 87 }; 88 88 89 - r_gpio_keys { 89 + gpio-keys { 90 90 compatible = "gpio-keys"; 91 91 92 - sw4 { 92 + switch-4 { 93 93 label = "sw4"; 94 94 linux,code = <KEY_POWER>; 95 95 gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
+2 -2
arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts
··· 91 91 wifi_pwrseq: wifi_pwrseq { 92 92 compatible = "mmc-pwrseq-simple"; 93 93 reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL06 */ 94 - clocks = <&rtc 1>; 94 + clocks = <&rtc CLK_OSC32K_FANOUT>; 95 95 clock-names = "ext_clock"; 96 96 }; 97 97 }; ··· 283 283 284 284 bluetooth { 285 285 compatible = "brcm,bcm43438-bt"; 286 - clocks = <&rtc 1>; 286 + clocks = <&rtc CLK_OSC32K_FANOUT>; 287 287 clock-names = "lpo"; 288 288 vbat-supply = <&reg_dldo1>; 289 289 vddio-supply = <&reg_aldo3>;
+5
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
··· 43 43 44 44 /dts-v1/; 45 45 #include "sun8i-r40.dtsi" 46 + #include "sun8i-r40-cpu-opp.dtsi" 46 47 47 48 #include <dt-bindings/gpio/gpio.h> 48 49 ··· 112 111 ahci-supply = <&reg_dldo4>; 113 112 phy-supply = <&reg_eldo3>; 114 113 status = "okay"; 114 + }; 115 + 116 + &cpu0 { 117 + cpu-supply = <&reg_dcdc2>; 115 118 }; 116 119 117 120 &de {
+52
arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi
··· 1 + /{ 2 + cpu0_opp_table: opp-table-cpu { 3 + compatible = "operating-points-v2"; 4 + opp-shared; 5 + 6 + opp-720000000 { 7 + opp-hz = /bits/ 64 <720000000>; 8 + opp-microvolt = <1000000 1000000 1300000>; 9 + clock-latency-ns = <2000000>; 10 + }; 11 + 12 + opp-912000000 { 13 + opp-hz = /bits/ 64 <912000000>; 14 + opp-microvolt = <1100000 1100000 1300000>; 15 + clock-latency-ns = <2000000>; 16 + }; 17 + 18 + opp-1008000000 { 19 + opp-hz = /bits/ 64 <1008000000>; 20 + opp-microvolt = <1160000 1160000 1300000>; 21 + clock-latency-ns = <2000000>; 22 + }; 23 + 24 + opp-1104000000 { 25 + opp-hz = /bits/ 64 <1104000000>; 26 + opp-microvolt = <1240000 1240000 1300000>; 27 + clock-latency-ns = <2000000>; 28 + }; 29 + 30 + opp-1200000000 { 31 + opp-hz = /bits/ 64 <1200000000>; 32 + opp-microvolt = <1300000 1300000 1300000>; 33 + clock-latency-ns = <2000000>; 34 + }; 35 + }; 36 + }; 37 + 38 + &cpu0 { 39 + operating-points-v2 = <&cpu0_opp_table>; 40 + }; 41 + 42 + &cpu1 { 43 + operating-points-v2 = <&cpu0_opp_table>; 44 + }; 45 + 46 + &cpu2 { 47 + operating-points-v2 = <&cpu0_opp_table>; 48 + }; 49 + 50 + &cpu3 { 51 + operating-points-v2 = <&cpu0_opp_table>; 52 + };
+5
arch/arm/boot/dts/sun8i-r40-feta40i.dtsi
··· 5 5 // Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io> 6 6 7 7 #include "sun8i-r40.dtsi" 8 + #include "sun8i-r40-cpu-opp.dtsi" 9 + 10 + &cpu0 { 11 + cpu-supply = <&reg_dcdc2>; 12 + }; 8 13 9 14 &i2c0 { 10 15 status = "okay";
+41 -3
arch/arm/boot/dts/sun8i-r40.dtsi
··· 42 42 */ 43 43 44 44 #include <dt-bindings/interrupt-controller/arm-gic.h> 45 + #include <dt-bindings/clock/sun6i-rtc.h> 45 46 #include <dt-bindings/clock/sun8i-de2.h> 46 47 #include <dt-bindings/clock/sun8i-r40-ccu.h> 47 48 #include <dt-bindings/clock/sun8i-tcon-top.h> ··· 85 84 compatible = "arm,cortex-a7"; 86 85 device_type = "cpu"; 87 86 reg = <0>; 87 + clocks = <&ccu CLK_CPU>; 88 + clock-names = "cpu"; 89 + #cooling-cells = <2>; 88 90 }; 89 91 90 92 cpu1: cpu@1 { 91 93 compatible = "arm,cortex-a7"; 92 94 device_type = "cpu"; 93 95 reg = <1>; 96 + clocks = <&ccu CLK_CPU>; 97 + clock-names = "cpu"; 98 + #cooling-cells = <2>; 94 99 }; 95 100 96 101 cpu2: cpu@2 { 97 102 compatible = "arm,cortex-a7"; 98 103 device_type = "cpu"; 99 104 reg = <2>; 105 + clocks = <&ccu CLK_CPU>; 106 + clock-names = "cpu"; 107 + #cooling-cells = <2>; 100 108 }; 101 109 102 110 cpu3: cpu@3 { 103 111 compatible = "arm,cortex-a7"; 104 112 device_type = "cpu"; 105 113 reg = <3>; 114 + clocks = <&ccu CLK_CPU>; 115 + clock-names = "cpu"; 116 + #cooling-cells = <2>; 106 117 }; 107 118 }; 108 119 ··· 130 117 polling-delay-passive = <0>; 131 118 polling-delay = <0>; 132 119 thermal-sensors = <&ths 0>; 120 + 121 + trips { 122 + cpu_hot_trip: cpu-hot { 123 + temperature = <80000>; 124 + hysteresis = <2000>; 125 + type = "passive"; 126 + }; 127 + 128 + cpu_very_hot_trip: cpu-very-hot { 129 + temperature = <115000>; 130 + hysteresis = <0>; 131 + type = "critical"; 132 + }; 133 + }; 134 + 135 + cooling-maps { 136 + cpu-hot-limit { 137 + trip = <&cpu_hot_trip>; 138 + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 139 + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 140 + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 141 + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 142 + }; 143 + }; 133 144 }; 134 145 135 146 gpu_thermal: gpu-thermal { ··· 522 485 ccu: clock@1c20000 { 523 486 compatible = "allwinner,sun8i-r40-ccu"; 524 487 reg = <0x01c20000 0x400>; 525 - clocks = <&osc24M>, <&rtc 0>; 488 + clocks = <&osc24M>, <&rtc CLK_OSC32K>; 526 489 clock-names = "hosc", "losc"; 527 490 #clock-cells = <1>; 528 491 #reset-cells = <1>; ··· 541 504 compatible = "allwinner,sun8i-r40-pinctrl"; 542 505 reg = <0x01c20800 0x400>; 543 506 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 544 - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; 507 + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, 508 + <&rtc CLK_OSC32K>; 545 509 clock-names = "apb", "hosc", "losc"; 546 510 gpio-controller; 547 511 interrupt-controller; ··· 1269 1231 reg-io-width = <1>; 1270 1232 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 1271 1233 clocks = <&ccu CLK_BUS_HDMI0>, <&ccu CLK_HDMI_SLOW>, 1272 - <&ccu CLK_HDMI>, <&rtc 0>; 1234 + <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>; 1273 1235 clock-names = "iahb", "isfr", "tmds", "cec"; 1274 1236 resets = <&ccu RST_BUS_HDMI1>; 1275 1237 reset-names = "ctrl";
+5
arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts
··· 45 45 46 46 /dts-v1/; 47 47 #include "sun8i-r40.dtsi" 48 + #include "sun8i-r40-cpu-opp.dtsi" 48 49 49 50 #include <dt-bindings/gpio/gpio.h> 50 51 ··· 87 86 ahci-supply = <&reg_dldo4>; 88 87 phy-supply = <&reg_eldo3>; 89 88 status = "okay"; 89 + }; 90 + 91 + &cpu0 { 92 + cpu-supply = <&reg_dcdc2>; 90 93 }; 91 94 92 95 &de {
+4 -2
arch/arm/boot/dts/sun8i-v3s.dtsi
··· 42 42 */ 43 43 44 44 #include <dt-bindings/interrupt-controller/arm-gic.h> 45 + #include <dt-bindings/clock/sun6i-rtc.h> 45 46 #include <dt-bindings/clock/sun8i-v3s-ccu.h> 46 47 #include <dt-bindings/reset/sun8i-v3s-ccu.h> 47 48 #include <dt-bindings/clock/sun8i-de2.h> ··· 322 321 ccu: clock@1c20000 { 323 322 compatible = "allwinner,sun8i-v3s-ccu"; 324 323 reg = <0x01c20000 0x400>; 325 - clocks = <&osc24M>, <&rtc 0>; 324 + clocks = <&osc24M>, <&rtc CLK_OSC32K>; 326 325 clock-names = "hosc", "losc"; 327 326 #clock-cells = <1>; 328 327 #reset-cells = <1>; ··· 343 342 reg = <0x01c20800 0x400>; 344 343 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 345 344 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 346 - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; 345 + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, 346 + <&rtc CLK_OSC32K>; 347 347 clock-names = "apb", "hosc", "losc"; 348 348 gpio-controller; 349 349 #gpio-cells = <3>;
+5
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
··· 42 42 43 43 /dts-v1/; 44 44 #include "sun8i-r40.dtsi" 45 + #include "sun8i-r40-cpu-opp.dtsi" 45 46 46 47 #include <dt-bindings/gpio/gpio.h> 47 48 ··· 106 105 ahci-supply = <&reg_dldo4>; 107 106 phy-supply = <&reg_eldo3>; 108 107 status = "okay"; 108 + }; 109 + 110 + &cpu0 { 111 + cpu-supply = <&reg_dcdc2>; 109 112 }; 110 113 111 114 &de {
+4 -4
arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
··· 77 77 }; 78 78 }; 79 79 80 - gpio_keys { 80 + gpio-keys { 81 81 compatible = "gpio-keys"; 82 82 83 - sw4 { 83 + switch-4 { 84 84 label = "power"; 85 85 linux,code = <KEY_POWER>; 86 86 gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; ··· 101 101 wifi_pwrseq: wifi_pwrseq { 102 102 compatible = "mmc-pwrseq-simple"; 103 103 reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ 104 - clocks = <&rtc 1>; 104 + clocks = <&rtc CLK_OSC32K_FANOUT>; 105 105 clock-names = "ext_clock"; 106 106 }; 107 107 }; ··· 221 221 bluetooth { 222 222 compatible = "brcm,bcm43438-bt"; 223 223 max-speed = <1500000>; 224 - clocks = <&rtc 1>; 224 + clocks = <&rtc CLK_OSC32K_FANOUT>; 225 225 clock-names = "lpo"; 226 226 vbat-supply = <&reg_vcc3v3>; 227 227 vddio-supply = <&reg_vcc3v3>;
+2 -2
arch/arm/boot/dts/sunxi-h3-h5-emlid-neutis.dtsi
··· 22 22 compatible = "mmc-pwrseq-simple"; 23 23 reset-gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */ 24 24 post-power-on-delay-ms = <200>; 25 - clocks = <&rtc 1>; 25 + clocks = <&rtc CLK_OSC32K_FANOUT>; 26 26 clock-names = "ext_clock"; 27 27 }; 28 28 }; ··· 124 124 125 125 bluetooth { 126 126 compatible = "brcm,bcm43438-bt"; 127 - clocks = <&rtc 1>; 127 + clocks = <&rtc CLK_OSC32K_FANOUT>; 128 128 clock-names = "lpo"; 129 129 vbat-supply = <&reg_vcc3v3>; 130 130 vddio-supply = <&reg_vcc3v3>;
+8 -5
arch/arm/boot/dts/sunxi-h3-h5.dtsi
··· 40 40 * OTHER DEALINGS IN THE SOFTWARE. 41 41 */ 42 42 43 + #include <dt-bindings/clock/sun6i-rtc.h> 43 44 #include <dt-bindings/clock/sun8i-de2.h> 44 45 #include <dt-bindings/clock/sun8i-h3-ccu.h> 45 46 #include <dt-bindings/clock/sun8i-r-ccu.h> ··· 387 386 ccu: clock@1c20000 { 388 387 /* compatible is in per SoC .dtsi file */ 389 388 reg = <0x01c20000 0x400>; 390 - clocks = <&osc24M>, <&rtc 0>; 389 + clocks = <&osc24M>, <&rtc CLK_OSC32K>; 391 390 clock-names = "hosc", "losc"; 392 391 #clock-cells = <1>; 393 392 #reset-cells = <1>; ··· 399 398 interrupt-parent = <&r_intc>; 400 399 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, 401 400 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 402 - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; 401 + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, 402 + <&rtc CLK_OSC32K>; 403 403 clock-names = "apb", "hosc", "losc"; 404 404 gpio-controller; 405 405 #gpio-cells = <3>; ··· 820 818 reg-io-width = <1>; 821 819 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; 822 820 clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>, 823 - <&ccu CLK_HDMI>, <&rtc 0>; 821 + <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>; 824 822 clock-names = "iahb", "isfr", "tmds", "cec"; 825 823 resets = <&ccu RST_BUS_HDMI1>; 826 824 reset-names = "ctrl"; ··· 880 878 r_ccu: clock@1f01400 { 881 879 compatible = "allwinner,sun8i-h3-r-ccu"; 882 880 reg = <0x01f01400 0x100>; 883 - clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, 881 + clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>, 884 882 <&ccu CLK_PLL_PERIPH0>; 885 883 clock-names = "hosc", "losc", "iosc", "pll-periph"; 886 884 #clock-cells = <1>; ··· 933 931 reg = <0x01f02c00 0x400>; 934 932 interrupt-parent = <&r_intc>; 935 933 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 936 - clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>; 934 + clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, 935 + <&rtc CLK_OSC32K>; 937 936 clock-names = "apb", "hosc", "losc"; 938 937 gpio-controller; 939 938 #gpio-cells = <3>;
+2 -2
arch/arm/boot/dts/sunxi-libretech-all-h3-cc.dtsi
··· 42 42 }; 43 43 }; 44 44 45 - gpio_keys { 45 + gpio-keys { 46 46 compatible = "gpio-keys"; 47 47 48 - power { 48 + key-power { 49 49 label = "power"; 50 50 linux,code = <KEY_POWER>; 51 51 gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+6
arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
··· 203 203 204 204 i2c0: i2c@5002000 { 205 205 compatible = "allwinner,sun50i-a100-i2c", 206 + "allwinner,sun8i-v536-i2c", 206 207 "allwinner,sun6i-a31-i2c"; 207 208 reg = <0x05002000 0x400>; 208 209 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; ··· 216 215 217 216 i2c1: i2c@5002400 { 218 217 compatible = "allwinner,sun50i-a100-i2c", 218 + "allwinner,sun8i-v536-i2c", 219 219 "allwinner,sun6i-a31-i2c"; 220 220 reg = <0x05002400 0x400>; 221 221 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; ··· 229 227 230 228 i2c2: i2c@5002800 { 231 229 compatible = "allwinner,sun50i-a100-i2c", 230 + "allwinner,sun8i-v536-i2c", 232 231 "allwinner,sun6i-a31-i2c"; 233 232 reg = <0x05002800 0x400>; 234 233 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; ··· 242 239 243 240 i2c3: i2c@5002c00 { 244 241 compatible = "allwinner,sun50i-a100-i2c", 242 + "allwinner,sun8i-v536-i2c", 245 243 "allwinner,sun6i-a31-i2c"; 246 244 reg = <0x05002c00 0x400>; 247 245 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; ··· 319 315 320 316 r_i2c0: i2c@7081400 { 321 317 compatible = "allwinner,sun50i-a100-i2c", 318 + "allwinner,sun8i-v536-i2c", 322 319 "allwinner,sun6i-a31-i2c"; 323 320 reg = <0x07081400 0x400>; 324 321 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; ··· 334 329 335 330 r_i2c1: i2c@7081800 { 336 331 compatible = "allwinner,sun50i-a100-i2c", 332 + "allwinner,sun8i-v536-i2c", 337 333 "allwinner,sun6i-a31-i2c"; 338 334 reg = <0x07081800 0x400>; 339 335 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts
··· 58 58 59 59 wifi_pwrseq: wifi-pwrseq { 60 60 compatible = "mmc-pwrseq-simple"; 61 - clocks = <&rtc 1>; 61 + clocks = <&rtc CLK_OSC32K_FANOUT>; 62 62 clock-names = "ext_clock"; 63 63 reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* WL-PMU-EN: PL2 */ 64 64 };
+2 -2
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
··· 56 56 wifi_pwrseq: wifi_pwrseq { 57 57 compatible = "mmc-pwrseq-simple"; 58 58 reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ 59 - clocks = <&rtc 1>; 59 + clocks = <&rtc CLK_OSC32K_FANOUT>; 60 60 clock-names = "ext_clock"; 61 61 }; 62 62 }; ··· 355 355 356 356 bluetooth { 357 357 compatible = "brcm,bcm43438-bt"; 358 - clocks = <&rtc 1>; 358 + clocks = <&rtc CLK_OSC32K_FANOUT>; 359 359 clock-names = "lpo"; 360 360 vbat-supply = <&reg_dldo2>; 361 361 vddio-supply = <&reg_dldo4>;
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
··· 43 43 44 44 wifi_pwrseq: wifi_pwrseq { 45 45 compatible = "mmc-pwrseq-simple"; 46 - clocks = <&rtc 1>; 46 + clocks = <&rtc CLK_OSC32K_FANOUT>; 47 47 clock-names = "ext_clock"; 48 48 reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ 49 49 };
+3 -3
arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
··· 40 40 leds { 41 41 compatible = "gpio-leds"; 42 42 43 - status { 43 + led-0 { 44 44 label = "orangepi:green:status"; 45 45 gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ 46 46 }; ··· 71 71 wifi_pwrseq: wifi_pwrseq { 72 72 compatible = "mmc-pwrseq-simple"; 73 73 reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 */ 74 - clocks = <&rtc 1>; 74 + clocks = <&rtc CLK_OSC32K_FANOUT>; 75 75 clock-names = "ext_clock"; 76 76 }; 77 77 }; ··· 369 369 bluetooth { 370 370 compatible = "brcm,bcm43438-bt"; 371 371 max-speed = <1500000>; 372 - clocks = <&rtc 1>; 372 + clocks = <&rtc CLK_OSC32K_FANOUT>; 373 373 clock-names = "lpo"; 374 374 vbat-supply = <&reg_dldo2>; 375 375 vddio-supply = <&reg_dldo4>;
+2 -2
arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
··· 35 35 stdout-path = "serial0:115200n8"; 36 36 }; 37 37 38 - gpio_keys { 38 + gpio-keys { 39 39 compatible = "gpio-keys"; 40 40 41 - lid_switch { 41 + lid-switch { 42 42 label = "Lid Switch"; 43 43 gpios = <&r_pio 0 12 GPIO_ACTIVE_LOW>; /* PL12 */ 44 44 linux,input-type = <EV_SW>;
+4
arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts
··· 10 10 compatible = "pine64,pinephone-1.0", "pine64,pinephone", "allwinner,sun50i-a64"; 11 11 }; 12 12 13 + &codec_analog { 14 + allwinner,internal-bias-resistor; 15 + }; 16 + 13 17 &sgm3140 { 14 18 enable-gpios = <&pio 2 3 GPIO_ACTIVE_HIGH>; /* PC3 */ 15 19 flash-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
+4
arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
··· 29 29 default-brightness-level = <400>; 30 30 }; 31 31 32 + &codec_analog { 33 + allwinner,internal-bias-resistor; 34 + }; 35 + 32 36 &sgm3140 { 33 37 enable-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ 34 38 flash-gpios = <&pio 2 3 GPIO_ACTIVE_HIGH>; /* PC3 */
+6 -4
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
··· 4 4 // Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com> 5 5 6 6 #include <dt-bindings/clock/sun50i-a64-ccu.h> 7 + #include <dt-bindings/clock/sun6i-rtc.h> 7 8 #include <dt-bindings/clock/sun8i-de2.h> 8 9 #include <dt-bindings/clock/sun8i-r-ccu.h> 9 10 #include <dt-bindings/interrupt-controller/arm-gic.h> ··· 661 660 ccu: clock@1c20000 { 662 661 compatible = "allwinner,sun50i-a64-ccu"; 663 662 reg = <0x01c20000 0x400>; 664 - clocks = <&osc24M>, <&rtc 0>; 663 + clocks = <&osc24M>, <&rtc CLK_OSC32K>; 665 664 clock-names = "hosc", "losc"; 666 665 #clock-cells = <1>; 667 666 #reset-cells = <1>; ··· 674 673 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, 675 674 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 676 675 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 677 - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; 676 + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, 677 + <&rtc CLK_OSC32K>; 678 678 clock-names = "apb", "hosc", "losc"; 679 679 gpio-controller; 680 680 #gpio-cells = <3>; ··· 1228 1226 reg-io-width = <1>; 1229 1227 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; 1230 1228 clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>, 1231 - <&ccu CLK_HDMI>, <&rtc 0>; 1229 + <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>; 1232 1230 clock-names = "iahb", "isfr", "tmds", "cec"; 1233 1231 resets = <&ccu RST_BUS_HDMI1>; 1234 1232 reset-names = "ctrl"; ··· 1289 1287 r_ccu: clock@1f01400 { 1290 1288 compatible = "allwinner,sun50i-a64-r-ccu"; 1291 1289 reg = <0x01f01400 0x100>; 1292 - clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, 1290 + clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>, 1293 1291 <&ccu CLK_PLL_PERIPH0>; 1294 1292 clock-names = "hosc", "losc", "iosc", "pll-periph"; 1295 1293 #clock-cells = <1>;
+2 -2
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts
··· 52 52 }; 53 53 }; 54 54 55 - r-gpio-keys { 55 + gpio-keys { 56 56 compatible = "gpio-keys"; 57 57 58 - reset { 58 + key-reset { 59 59 label = "reset"; 60 60 linux,code = <KEY_RESTART>; 61 61 gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
+2 -2
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
··· 54 54 }; 55 55 }; 56 56 57 - r-gpio-keys { 57 + gpio-keys { 58 58 compatible = "gpio-keys"; 59 59 60 - sw4 { 60 + key-sw4 { 61 61 label = "sw4"; 62 62 linux,code = <BTN_0>; 63 63 gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
+2 -2
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
··· 48 48 }; 49 49 }; 50 50 51 - r-gpio-keys { 51 + gpio-keys { 52 52 compatible = "gpio-keys"; 53 53 54 - sw4 { 54 + key-sw4 { 55 55 label = "sw4"; 56 56 linux,code = <BTN_0>; 57 57 gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
+2 -2
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
··· 86 86 87 87 wifi_pwrseq: wifi-pwrseq { 88 88 compatible = "mmc-pwrseq-simple"; 89 - clocks = <&rtc 1>; 89 + clocks = <&rtc CLK_OSC32K_FANOUT>; 90 90 clock-names = "ext_clock"; 91 91 reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */ 92 92 post-power-on-delay-ms = <200>; ··· 314 314 315 315 bluetooth { 316 316 compatible = "brcm,bcm4345c5"; 317 - clocks = <&rtc 1>; 317 + clocks = <&rtc CLK_OSC32K_FANOUT>; 318 318 clock-names = "lpo"; 319 319 device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */ 320 320 host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */
+2 -2
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts
··· 13 13 14 14 wifi_pwrseq: wifi_pwrseq { 15 15 compatible = "mmc-pwrseq-simple"; 16 - clocks = <&rtc 1>; 16 + clocks = <&rtc CLK_OSC32K_FANOUT>; 17 17 clock-names = "ext_clock"; 18 18 reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */ 19 19 post-power-on-delay-ms = <200>; ··· 64 64 65 65 bluetooth { 66 66 compatible = "brcm,bcm4345c5"; 67 - clocks = <&rtc 1>; 67 + clocks = <&rtc CLK_OSC32K_FANOUT>; 68 68 clock-names = "lpo"; 69 69 device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */ 70 70 host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi
··· 78 78 79 79 wifi_pwrseq: wifi-pwrseq { 80 80 compatible = "mmc-pwrseq-simple"; 81 - clocks = <&rtc 1>; 81 + clocks = <&rtc CLK_OSC32K_FANOUT>; 82 82 clock-names = "ext_clock"; 83 83 reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */ 84 84 };
+7 -5
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
··· 4 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 5 #include <dt-bindings/clock/sun50i-h6-ccu.h> 6 6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h> 7 + #include <dt-bindings/clock/sun6i-rtc.h> 7 8 #include <dt-bindings/clock/sun8i-de2.h> 8 9 #include <dt-bindings/clock/sun8i-tcon-top.h> 9 10 #include <dt-bindings/reset/sun50i-h6-ccu.h> ··· 238 237 ccu: clock@3001000 { 239 238 compatible = "allwinner,sun50i-h6-ccu"; 240 239 reg = <0x03001000 0x1000>; 241 - clocks = <&osc24M>, <&rtc 0>, <&rtc 2>; 240 + clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>; 242 241 clock-names = "hosc", "losc", "iosc"; 243 242 #clock-cells = <1>; 244 243 #reset-cells = <1>; ··· 318 317 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 319 318 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 320 319 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 321 - clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc 0>; 320 + clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc CLK_OSC32K>; 322 321 clock-names = "apb", "hosc", "losc"; 323 322 gpio-controller; 324 323 #gpio-cells = <3>; ··· 726 725 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 727 726 clocks = <&ccu CLK_BUS_XHCI>, 728 727 <&ccu CLK_BUS_XHCI>, 729 - <&rtc 0>; 728 + <&rtc CLK_OSC32K>; 730 729 clock-names = "ref", "bus_early", "suspend"; 731 730 resets = <&ccu RST_BUS_XHCI>; 732 731 /* ··· 932 931 r_ccu: clock@7010000 { 933 932 compatible = "allwinner,sun50i-h6-r-ccu"; 934 933 reg = <0x07010000 0x400>; 935 - clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, 934 + clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>, 936 935 <&ccu CLK_PLL_PERIPH0>; 937 936 clock-names = "hosc", "losc", "iosc", "pll-periph"; 938 937 #clock-cells = <1>; ··· 961 960 interrupt-parent = <&r_intc>; 962 961 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 963 962 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 964 - clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&rtc 0>; 963 + clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, 964 + <&rtc CLK_OSC32K>; 965 965 clock-names = "apb", "hosc", "losc"; 966 966 gpio-controller; 967 967 #gpio-cells = <3>;