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drm/i915: Remove i915_reg.h from intel_overlay.c

Move GEN2_ISR and some interrupt definitions to common header.
This removes dependency of i915_reg.h from intel_overlay.c.

v3: Rename interrupt header with regs suffix (Jani)

v2: Create a separate file for common interrupts (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patch.msgid.link/20260205094341.1882816-11-uma.shankar@intel.com

+50 -38
+1
drivers/gpu/drm/i915/display/intel_display_irq.c
··· 5 5 6 6 #include <drm/drm_print.h> 7 7 #include <drm/drm_vblank.h> 8 + #include <drm/intel/intel_gmd_interrupt_regs.h> 8 9 9 10 #include "i915_reg.h" 10 11 #include "icl_dsi_regs.h"
+2
drivers/gpu/drm/i915/display/intel_display_regs.h
··· 94 94 #define VLV_ERROR_PAGE_TABLE (1 << 4) 95 95 #define VLV_ERROR_CLAIM (1 << 0) 96 96 97 + #define GEN2_ISR _MMIO(0x20ac) 98 + 97 99 #define VLV_ERROR_REGS I915_ERROR_REGS(VLV_EMR, VLV_EIR) 98 100 99 101 #define _MBUS_ABOX0_CTL 0x45038
+1 -1
drivers/gpu/drm/i915/display/intel_overlay.c
··· 28 28 29 29 #include <drm/drm_fourcc.h> 30 30 #include <drm/drm_print.h> 31 + #include <drm/intel/intel_gmd_interrupt_regs.h> 31 32 32 33 #include "gem/i915_gem_internal.h" 33 34 #include "gem/i915_gem_object_frontbuffer.h" ··· 38 37 #include "gt/intel_ring.h" 39 38 40 39 #include "i915_drv.h" 41 - #include "i915_reg.h" 42 40 #include "intel_color_regs.h" 43 41 #include "intel_de.h" 44 42 #include "intel_display_regs.h"
+1
drivers/gpu/drm/i915/gt/intel_gt.c
··· 5 5 6 6 #include <drm/drm_managed.h> 7 7 #include <drm/intel/intel-gtt.h> 8 + #include <drm/intel/intel_gmd_interrupt_regs.h> 8 9 9 10 #include "gem/i915_gem_internal.h" 10 11 #include "gem/i915_gem_lmem.h"
+1
drivers/gpu/drm/i915/gt/intel_ring_submission.c
··· 4 4 */ 5 5 6 6 #include <drm/drm_cache.h> 7 + #include <drm/intel/intel_gmd_interrupt_regs.h> 7 8 8 9 #include "gem/i915_gem_internal.h" 9 10
+1
drivers/gpu/drm/i915/i915_irq.c
··· 34 34 #include <drm/drm_drv.h> 35 35 #include <drm/drm_print.h> 36 36 #include <drm/intel/display_parent_interface.h> 37 + #include <drm/intel/intel_gmd_interrupt_regs.h> 37 38 38 39 #include "display/intel_display_irq.h" 39 40 #include "display/intel_hotplug.h"
-37
drivers/gpu/drm/i915/i915_reg.h
··· 364 364 #define GEN2_IER _MMIO(0x20a0) 365 365 #define GEN2_IIR _MMIO(0x20a4) 366 366 #define GEN2_IMR _MMIO(0x20a8) 367 - #define GEN2_ISR _MMIO(0x20ac) 368 367 369 368 #define GEN2_IRQ_REGS I915_IRQ_REGS(GEN2_IMR, \ 370 369 GEN2_IER, \ ··· 519 520 520 521 /* These are all the "old" interrupts */ 521 522 #define ILK_BSD_USER_INTERRUPT (1 << 5) 522 - 523 - #define I915_PM_INTERRUPT (1 << 31) 524 - #define I915_ISP_INTERRUPT (1 << 22) 525 - #define I915_LPE_PIPE_B_INTERRUPT (1 << 21) 526 - #define I915_LPE_PIPE_A_INTERRUPT (1 << 20) 527 - #define I915_MIPIC_INTERRUPT (1 << 19) 528 - #define I915_MIPIA_INTERRUPT (1 << 18) 529 - #define I915_PIPE_CONTROL_NOTIFY_INTERRUPT (1 << 18) 530 - #define I915_DISPLAY_PORT_INTERRUPT (1 << 17) 531 - #define I915_DISPLAY_PIPE_C_HBLANK_INTERRUPT (1 << 16) 532 - #define I915_MASTER_ERROR_INTERRUPT (1 << 15) 533 - #define I915_DISPLAY_PIPE_B_HBLANK_INTERRUPT (1 << 14) 534 - #define I915_GMCH_THERMAL_SENSOR_EVENT_INTERRUPT (1 << 14) /* p-state */ 535 - #define I915_DISPLAY_PIPE_A_HBLANK_INTERRUPT (1 << 13) 536 - #define I915_HWB_OOM_INTERRUPT (1 << 13) 537 - #define I915_LPE_PIPE_C_INTERRUPT (1 << 12) 538 - #define I915_SYNC_STATUS_INTERRUPT (1 << 12) 539 - #define I915_MISC_INTERRUPT (1 << 11) 540 - #define I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT (1 << 11) 541 - #define I915_DISPLAY_PIPE_C_VBLANK_INTERRUPT (1 << 10) 542 - #define I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT (1 << 10) 543 - #define I915_DISPLAY_PIPE_C_EVENT_INTERRUPT (1 << 9) 544 - #define I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT (1 << 9) 545 - #define I915_DISPLAY_PIPE_C_DPBM_INTERRUPT (1 << 8) 546 - #define I915_DISPLAY_PLANE_C_FLIP_PENDING_INTERRUPT (1 << 8) 547 - #define I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT (1 << 7) 548 - #define I915_DISPLAY_PIPE_A_EVENT_INTERRUPT (1 << 6) 549 - #define I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT (1 << 5) 550 - #define I915_DISPLAY_PIPE_B_EVENT_INTERRUPT (1 << 4) 551 - #define I915_DISPLAY_PIPE_A_DPBM_INTERRUPT (1 << 3) 552 - #define I915_DISPLAY_PIPE_B_DPBM_INTERRUPT (1 << 2) 553 - #define I915_DEBUG_INTERRUPT (1 << 2) 554 - #define I915_WINVALID_INTERRUPT (1 << 1) 555 - #define I915_USER_INTERRUPT (1 << 1) 556 - #define I915_ASLE_INTERRUPT (1 << 0) 557 - #define I915_BSD_USER_INTERRUPT (1 << 25) 558 523 559 524 #define GEN6_BSD_RNCID _MMIO(0x12198) 560 525
+43
include/drm/intel/intel_gmd_interrupt_regs.h
··· 1 + /* SPDX-License-Identifier: MIT */ 2 + /* Copyright © 2026 Intel Corporation */ 3 + 4 + #ifndef _INTEL_GMD_INTERRUPT_REGS_H_ 5 + #define _INTEL_GMD_INTERRUPT_REGS_H_ 6 + 7 + #define I915_PM_INTERRUPT (1 << 31) 8 + #define I915_ISP_INTERRUPT (1 << 22) 9 + #define I915_LPE_PIPE_B_INTERRUPT (1 << 21) 10 + #define I915_LPE_PIPE_A_INTERRUPT (1 << 20) 11 + #define I915_MIPIC_INTERRUPT (1 << 19) 12 + #define I915_MIPIA_INTERRUPT (1 << 18) 13 + #define I915_PIPE_CONTROL_NOTIFY_INTERRUPT (1 << 18) 14 + #define I915_DISPLAY_PORT_INTERRUPT (1 << 17) 15 + #define I915_DISPLAY_PIPE_C_HBLANK_INTERRUPT (1 << 16) 16 + #define I915_MASTER_ERROR_INTERRUPT (1 << 15) 17 + #define I915_DISPLAY_PIPE_B_HBLANK_INTERRUPT (1 << 14) 18 + #define I915_GMCH_THERMAL_SENSOR_EVENT_INTERRUPT (1 << 14) /* p-state */ 19 + #define I915_DISPLAY_PIPE_A_HBLANK_INTERRUPT (1 << 13) 20 + #define I915_HWB_OOM_INTERRUPT (1 << 13) 21 + #define I915_LPE_PIPE_C_INTERRUPT (1 << 12) 22 + #define I915_SYNC_STATUS_INTERRUPT (1 << 12) 23 + #define I915_MISC_INTERRUPT (1 << 11) 24 + #define I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT (1 << 11) 25 + #define I915_DISPLAY_PIPE_C_VBLANK_INTERRUPT (1 << 10) 26 + #define I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT (1 << 10) 27 + #define I915_DISPLAY_PIPE_C_EVENT_INTERRUPT (1 << 9) 28 + #define I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT (1 << 9) 29 + #define I915_DISPLAY_PIPE_C_DPBM_INTERRUPT (1 << 8) 30 + #define I915_DISPLAY_PLANE_C_FLIP_PENDING_INTERRUPT (1 << 8) 31 + #define I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT (1 << 7) 32 + #define I915_DISPLAY_PIPE_A_EVENT_INTERRUPT (1 << 6) 33 + #define I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT (1 << 5) 34 + #define I915_DISPLAY_PIPE_B_EVENT_INTERRUPT (1 << 4) 35 + #define I915_DISPLAY_PIPE_A_DPBM_INTERRUPT (1 << 3) 36 + #define I915_DISPLAY_PIPE_B_DPBM_INTERRUPT (1 << 2) 37 + #define I915_DEBUG_INTERRUPT (1 << 2) 38 + #define I915_WINVALID_INTERRUPT (1 << 1) 39 + #define I915_USER_INTERRUPT (1 << 1) 40 + #define I915_ASLE_INTERRUPT (1 << 0) 41 + #define I915_BSD_USER_INTERRUPT (1 << 25) 42 + 43 + #endif