net: airoha: select QDMA block according LAN/WAN configuration

Before this patch even GDM ports were assigned to QDMA0 while odd GDM
ports were using QDMA1, so, based on the DTS configuration, both QDMA0
and QDMA1 can theoretically receive traffic destinated to the host cpu
from LAN or WAN GDM ports.
Airoha folks reported the hw design assumes the LAN traffic destinated
to the host cpu is be forwarded to QDMA0 while traffic received on WAN
GDM port is managed by QDMA1. For this reason, select QDMA block according
to the GDM port LAN or WAN configuration:
- QDMA0 is used for GDM LAN devices
- QDMA1 is used for GDM WAN device

Assuming a device with three GDM ports, a typical configuration could be:
- MT7530 DSA switch -> GDM1 (eth0) -> QDMA0 (LAN traffic)
- External PHY -> GDM2 (eth1) -> QDMA1 (WAN traffic)
- External PHY -> GDM3 (eth2) -> QDMA0 (LAN traffic)

We can then bridge eth0 DSA port (lanX) with eth2 since they all tx/rx
LAN traffic.

Please note this patch introduces a change not visible to the user since
airoha_eth driver currently supports just the internal phy available via
the MT7530 DSA switch and there are no WAN interfaces officially supported
since PCS/external phy is not merged mainline yet (it will be posted with
following patches).

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://patch.msgid.link/20260313-airoha-qdma-lan-wan-mode-v2-1-7d577db6e40c@kernel.org
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

authored by

Lorenzo Bianconi and committed by

Paolo Abeni 3 months ago 8737d719 68e8619d

+9 -10

2 changed files

expand all

drivers

net

ethernet

airoha

airoha_eth.c

airoha_eth.h

+8 -10

drivers/net/ethernet/airoha/airoha_eth.c

··· 1754 1754 static int airoha_dev_init(struct net_device *dev) 1755 1755 { 1756 1756 struct airoha_gdm_port *port = netdev_priv(dev); 1757 - struct airoha_qdma *qdma = port->qdma; 1758 - struct airoha_eth *eth = qdma->eth; 1757 + struct airoha_eth *eth = port->eth; 1759 1758 u32 fe_cpu_port; 1760 1759 u8 ppe_id; 1761 1760 1761 + /* QDMA0 is used for lan ports while QDMA1 is used for WAN ports */ 1762 + port->qdma = &eth->qdma[!airoha_is_lan_gdm_port(port)]; 1763 + port->dev->irq = port->qdma->irq_banks[0].irq; 1762 1764 airoha_set_macaddr(port, dev->dev_addr); 1763 1765 1764 1766 switch (port->id) { ··· 1784 1782 } 1785 1783 fallthrough; 1786 1784 default: { 1787 - u8 qdma_id = qdma - &eth->qdma[0]; 1785 + u8 qdma_id = port->qdma - &eth->qdma[0]; 1788 1786 1789 1787 /* For PPE1 select cpu port according to the running QDMA. */ 1790 1788 fe_cpu_port = qdma_id ? FE_PSE_PORT_CDM2 : FE_PSE_PORT_CDM1; ··· 2868 2866 } 2869 2867 2870 2868 static int airoha_alloc_gdm_port(struct airoha_eth *eth, 2871 - struct device_node *np, int index) 2869 + struct device_node *np) 2872 2870 { 2873 2871 const __be32 *id_ptr = of_get_property(np, "reg", NULL); 2874 2872 struct airoha_gdm_port *port; 2875 - struct airoha_qdma *qdma; 2876 2873 struct net_device *dev; 2877 2874 int err, p; 2878 2875 u32 id; ··· 2902 2901 return -ENOMEM; 2903 2902 } 2904 2903 2905 - qdma = &eth->qdma[index % AIROHA_MAX_NUM_QDMA]; 2906 2904 dev->netdev_ops = &airoha_netdev_ops; 2907 2905 dev->ethtool_ops = &airoha_ethtool_ops; 2908 2906 dev->max_mtu = AIROHA_MAX_MTU; ··· 2913 2913 dev->features |= dev->hw_features; 2914 2914 dev->vlan_features = dev->hw_features; 2915 2915 dev->dev.of_node = np; 2916 - dev->irq = qdma->irq_banks[0].irq; 2917 2916 SET_NETDEV_DEV(dev, eth->dev); 2918 2917 2919 2918 /* reserve hw queues for HTB offloading */ ··· 2933 2934 port = netdev_priv(dev); 2934 2935 u64_stats_init(&port->stats.syncp); 2935 2936 spin_lock_init(&port->stats.lock); 2936 - port->qdma = qdma; 2937 + port->eth = eth; 2937 2938 port->dev = dev; 2938 2939 port->id = id; 2939 2940 eth->ports[p] = port; ··· 3033 3034 for (i = 0; i < ARRAY_SIZE(eth->qdma); i++) 3034 3035 airoha_qdma_start_napi(&eth->qdma[i]); 3035 3036 3036 - i = 0; 3037 3037 for_each_child_of_node(pdev->dev.of_node, np) { 3038 3038 if (!of_device_is_compatible(np, "airoha,eth-mac")) 3039 3039 continue; ··· 3040 3042 if (!of_device_is_available(np)) 3041 3043 continue; 3042 3044 3043 - err = airoha_alloc_gdm_port(eth, np, i++); 3045 + err = airoha_alloc_gdm_port(eth, np); 3044 3046 if (err) { 3045 3047 of_node_put(np); 3046 3048 goto error_napi_stop;

drivers/net/ethernet/airoha/airoha_eth.h

··· 533 533 534 534 struct airoha_gdm_port { 535 535 struct airoha_qdma *qdma; 536 + struct airoha_eth *eth; 536 537 struct net_device *dev; 537 538 int id; 538 539

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