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clk: renesas: rzv2h: Deassert reset on assert timeout

If the assert() fails due to timeout error, set the reset register bit
back to deasserted state. This change is needed especially for handling
assert error in suspend() callback that expect the device to be in
operational state in case of failure.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260108123433.104464-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

authored by

Biju Das and committed by
Geert Uytterhoeven 879e9fc8 0b0201f2

+5 -4
+5 -4
drivers/clk/renesas/rzv2h-cpg.c
··· 1352 1352 u32 mask = BIT(priv->resets[id].reset_bit); 1353 1353 u8 monbit = priv->resets[id].mon_bit; 1354 1354 u32 value = mask << 16; 1355 + u32 mon; 1355 1356 int ret; 1356 1357 1357 1358 dev_dbg(rcdev->dev, "%s id:%ld offset:0x%x\n", ··· 1365 1364 reg = GET_RST_MON_OFFSET(priv->resets[id].mon_index); 1366 1365 mask = BIT(monbit); 1367 1366 1368 - ret = readl_poll_timeout_atomic(priv->base + reg, value, 1369 - assert == !!(value & mask), 10, 200); 1370 - if (ret && !assert) { 1371 - value = mask << 16; 1367 + ret = readl_poll_timeout_atomic(priv->base + reg, mon, 1368 + assert == !!(mon & mask), 10, 200); 1369 + if (ret) { 1370 + value ^= mask; 1372 1371 writel(value, priv->base + GET_RST_OFFSET(priv->resets[id].reset_index)); 1373 1372 } 1374 1373