Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/i915/display: Set C10_VDR_CTRL_MSGBUS_ACCESS before phy reg read
According to C10 VDR Register programming sequence we need set
C10_VDR_CTRL_MSGBUS_ACCESS before accessing PHY internal registers from
MsgBus.
v2: set C10_VDR_CTRL_MSGBUS_ACCESS once for all owned lanes
Bspec: 68962
Fixes: 9dc619680de4 ("drm/i915/display: Add function to configure LFPS sending")
Suggested-by: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://lore.kernel.org/r/20250722125618.1842615-5-jouni.hogander@intel.com
+4
+4
drivers/gpu/drm/i915/display/intel_cx0_phy.c
+4
drivers/gpu/drm/i915/display/intel_cx0_phy.c
···
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wakeref = intel_cx0_phy_transaction_begin(encoder);
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+
if (intel_encoder_is_c10phy(encoder))
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+
intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_CONTROL(1), 0,
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+
C10_VDR_CTRL_MSGBUS_ACCESS, MB_WRITE_COMMITTED);
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+
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for (i = 0; i < 4; i++) {
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int tx = i % 2 + 1;
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u8 lane_mask = i < 2 ? INTEL_CX0_LANE0 : INTEL_CX0_LANE1;