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clk: rockchip: add GATE_GRFs for SAI MCLKOUT to rk3576

The Rockchip RK3576 gates the SAI MCLKOUT clocks behind some IOC GRF
writes.

Add these clock branches, and add the IOC GRF to the auxiliary GRF
hashtable.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250502-rk3576-sai-v3-4-376cef19dd7c@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

authored by

Nicolas Frattaroli and committed by
Heiko Stuebner 9199ec29 e277168c

+27
+27
drivers/clk/rockchip/clk-rk3576.c
··· 15 15 16 16 #define RK3576_GRF_SOC_STATUS0 0x600 17 17 #define RK3576_PMU0_GRF_OSC_CON6 0x18 18 + #define RK3576_VCCIO_IOC_MISC_CON0 0x6400 18 19 19 20 enum rk3576_plls { 20 21 bpll, lpll, vpll, aupll, cpll, gpll, ppll, ··· 1480 1479 RK3576_CLKGATE_CON(10), 0, GFLAGS), 1481 1480 GATE(CLK_SAI0_MCLKOUT, "clk_sai0_mclkout", "mclk_sai0_8ch", 0, 1482 1481 RK3576_CLKGATE_CON(10), 1, GFLAGS), 1482 + GATE_GRF(CLK_SAI0_MCLKOUT_TO_IO, "mclk_sai0_to_io", "clk_sai0_mclkout", 1483 + 0, RK3576_VCCIO_IOC_MISC_CON0, 0, GFLAGS, grf_type_ioc), 1484 + GATE_GRF(CLK_SAI1_MCLKOUT_TO_IO, "mclk_sai1_to_io", "clk_sai1_mclkout", 1485 + 0, RK3576_VCCIO_IOC_MISC_CON0, 1, GFLAGS, grf_type_ioc), 1486 + GATE_GRF(CLK_SAI2_MCLKOUT_TO_IO, "mclk_sai2_to_io", "clk_sai2_mclkout", 1487 + 0, RK3576_VCCIO_IOC_MISC_CON0, 2, GFLAGS, grf_type_ioc), 1488 + GATE_GRF(CLK_SAI3_MCLKOUT_TO_IO, "mclk_sai3_to_io", "clk_sai3_mclkout", 1489 + 0, RK3576_VCCIO_IOC_MISC_CON0, 3, GFLAGS, grf_type_ioc), 1483 1490 1484 1491 /* sdgmac */ 1485 1492 COMPOSITE_NODIV(HCLK_SDGMAC_ROOT, "hclk_sdgmac_root", mux_200m_100m_50m_24m_p, 0, ··· 1734 1725 struct rockchip_clk_provider *ctx; 1735 1726 unsigned long clk_nr_clks; 1736 1727 void __iomem *reg_base; 1728 + struct rockchip_aux_grf *ioc_grf_e; 1737 1729 struct rockchip_aux_grf *pmu0_grf_e; 1730 + struct regmap *ioc_grf; 1738 1731 struct regmap *pmu0_grf; 1739 1732 1740 1733 clk_nr_clks = rockchip_clk_find_max_clk_id(rk3576_clk_branches, ··· 1745 1734 pmu0_grf = syscon_regmap_lookup_by_compatible("rockchip,rk3576-pmu0-grf"); 1746 1735 if (IS_ERR(pmu0_grf)) { 1747 1736 pr_err("%s: could not get PMU0 GRF syscon\n", __func__); 1737 + return; 1738 + } 1739 + 1740 + ioc_grf = syscon_regmap_lookup_by_compatible("rockchip,rk3576-ioc-grf"); 1741 + if (IS_ERR(ioc_grf)) { 1742 + pr_err("%s: could not get IOC GRF syscon\n", __func__); 1748 1743 return; 1749 1744 } 1750 1745 ··· 1773 1756 pmu0_grf_e->grf = pmu0_grf; 1774 1757 pmu0_grf_e->type = grf_type_pmu0; 1775 1758 hash_add(ctx->aux_grf_table, &pmu0_grf_e->node, grf_type_pmu0); 1759 + 1760 + ioc_grf_e = kzalloc(sizeof(*ioc_grf_e), GFP_KERNEL); 1761 + if (!ioc_grf_e) 1762 + goto err_free_pmu0; 1763 + 1764 + ioc_grf_e->grf = ioc_grf; 1765 + ioc_grf_e->type = grf_type_ioc; 1766 + hash_add(ctx->aux_grf_table, &ioc_grf_e->node, grf_type_ioc); 1776 1767 1777 1768 rockchip_clk_register_plls(ctx, rk3576_pll_clks, 1778 1769 ARRAY_SIZE(rk3576_pll_clks), ··· 1806 1781 1807 1782 return; 1808 1783 1784 + err_free_pmu0: 1785 + kfree(pmu0_grf_e); 1809 1786 err_unmap: 1810 1787 iounmap(reg_base); 1811 1788 return;