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perf/x86/intel: Do not enable BTS for guests

By default when users program perf to sample branch instructions
(PERF_COUNT_HW_BRANCH_INSTRUCTIONS) with a sample period of 1, perf
interprets this as a special case and enables BTS (Branch Trace Store)
as an optimization to avoid taking an interrupt on every branch.

Since BTS doesn't virtualize, this optimization doesn't make sense when
the request originates from a guest. Add an additional check that
prevents this optimization for virtualized events (exclude_host).

Reported-by: Jan H. Schönherr <jschoenh@amazon.de>
Suggested-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Fernand Sieber <sieberf@amazon.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: <stable@vger.kernel.org>
Link: https://patch.msgid.link/20251211183604.868641-1-sieberf@amazon.com

authored by

Fernand Sieber and committed by
Peter Zijlstra 91dcfae0 d06bf78e

+11 -2
+11 -2
arch/x86/events/perf_event.h
··· 1574 1574 struct hw_perf_event *hwc = &event->hw; 1575 1575 unsigned int hw_event, bts_event; 1576 1576 1577 - if (event->attr.freq) 1577 + /* 1578 + * Only use BTS for fixed rate period==1 events. 1579 + */ 1580 + if (event->attr.freq || period != 1) 1581 + return false; 1582 + 1583 + /* 1584 + * BTS doesn't virtualize. 1585 + */ 1586 + if (event->attr.exclude_host) 1578 1587 return false; 1579 1588 1580 1589 hw_event = hwc->config & INTEL_ARCH_EVENT_MASK; 1581 1590 bts_event = x86_pmu.event_map(PERF_COUNT_HW_BRANCH_INSTRUCTIONS); 1582 1591 1583 - return hw_event == bts_event && period == 1; 1592 + return hw_event == bts_event; 1584 1593 } 1585 1594 1586 1595 static inline bool intel_pmu_has_bts(struct perf_event *event)