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Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm

Pull ARM fixes from Russell King:
"Various assorted fixes:

- a couple of patches from Mark Rutland to resolve an errata with
Cortex-A15 CPUs.
- fix cpuidle for the CPU part ID changes in the last merge window
- add support for a relocation which ARM binutils is generating in
some circumstances"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: 8130/1: cpuidle/cpuidle-big_little: fix reading cpu id part number
ARM: 8129/1: errata: work around Cortex-A15 erratum 830321 using dummy strex
ARM: 8128/1: abort: don't clear the exclusive monitors
ARM: 8127/1: module: add support for R_ARM_TARGET1 relocations

+37 -39
-1
arch/arm/include/asm/cacheflush.h
··· 472 472 "mcr p15, 0, r0, c1, c0, 0 @ set SCTLR \n\t" \ 473 473 "isb \n\t" \ 474 474 "bl v7_flush_dcache_"__stringify(level)" \n\t" \ 475 - "clrex \n\t" \ 476 475 "mrc p15, 0, r0, c1, c0, 1 @ get ACTLR \n\t" \ 477 476 "bic r0, r0, #(1 << 6) @ disable local coherency \n\t" \ 478 477 "mcr p15, 0, r0, c1, c0, 1 @ set ACTLR \n\t" \
+2 -1
arch/arm/include/asm/cputype.h
··· 74 74 #define ARM_CPU_PART_CORTEX_A12 0x4100c0d0 75 75 #define ARM_CPU_PART_CORTEX_A17 0x4100c0e0 76 76 #define ARM_CPU_PART_CORTEX_A15 0x4100c0f0 77 + #define ARM_CPU_PART_MASK 0xff00fff0 77 78 78 79 #define ARM_CPU_XSCALE_ARCH_MASK 0xe000 79 80 #define ARM_CPU_XSCALE_ARCH_V1 0x2000 ··· 180 179 */ 181 180 static inline unsigned int __attribute_const__ read_cpuid_part(void) 182 181 { 183 - return read_cpuid_id() & 0xff00fff0; 182 + return read_cpuid_id() & ARM_CPU_PART_MASK; 184 183 } 185 184 186 185 static inline unsigned int __attribute_const__ __deprecated read_cpuid_part_number(void)
+1
arch/arm/include/asm/elf.h
··· 50 50 #define R_ARM_ABS32 2 51 51 #define R_ARM_CALL 28 52 52 #define R_ARM_JUMP24 29 53 + #define R_ARM_TARGET1 38 53 54 #define R_ARM_V4BX 40 54 55 #define R_ARM_PREL31 42 55 56 #define R_ARM_MOVW_ABS_NC 43
+15
arch/arm/include/asm/smp_plat.h
··· 8 8 #include <linux/cpumask.h> 9 9 #include <linux/err.h> 10 10 11 + #include <asm/cpu.h> 11 12 #include <asm/cputype.h> 12 13 13 14 /* ··· 24 23 #else 25 24 return true; 26 25 #endif 26 + } 27 + 28 + /** 29 + * smp_cpuid_part() - return part id for a given cpu 30 + * @cpu: logical cpu id. 31 + * 32 + * Return: part id of logical cpu passed as argument. 33 + */ 34 + static inline unsigned int smp_cpuid_part(int cpu) 35 + { 36 + struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpu); 37 + 38 + return is_smp() ? cpu_info->cpuid & ARM_CPU_PART_MASK : 39 + read_cpuid_part(); 27 40 } 28 41 29 42 /* all SMP configurations have the extended CPUID registers */
+15 -14
arch/arm/kernel/entry-header.S
··· 208 208 #endif 209 209 .endif 210 210 msr spsr_cxsf, \rpsr 211 - #if defined(CONFIG_CPU_V6) 212 - ldr r0, [sp] 213 - strex r1, r2, [sp] @ clear the exclusive monitor 214 - ldmib sp, {r1 - pc}^ @ load r1 - pc, cpsr 215 - #elif defined(CONFIG_CPU_32v6K) 216 - clrex @ clear the exclusive monitor 217 - ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr 218 - #else 219 - ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr 211 + #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K) 212 + @ We must avoid clrex due to Cortex-A15 erratum #830321 213 + sub r0, sp, #4 @ uninhabited address 214 + strex r1, r2, [r0] @ clear the exclusive monitor 220 215 #endif 216 + ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr 221 217 .endm 222 218 223 219 .macro restore_user_regs, fast = 0, offset = 0 224 220 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr 225 221 ldr lr, [sp, #\offset + S_PC]! @ get pc 226 222 msr spsr_cxsf, r1 @ save in spsr_svc 227 - #if defined(CONFIG_CPU_V6) 223 + #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K) 224 + @ We must avoid clrex due to Cortex-A15 erratum #830321 228 225 strex r1, r2, [sp] @ clear the exclusive monitor 229 - #elif defined(CONFIG_CPU_32v6K) 230 - clrex @ clear the exclusive monitor 231 226 #endif 232 227 .if \fast 233 228 ldmdb sp, {r1 - lr}^ @ get calling r1 - lr ··· 256 261 .endif 257 262 ldr lr, [sp, #S_SP] @ top of the stack 258 263 ldrd r0, r1, [sp, #S_LR] @ calling lr and pc 259 - clrex @ clear the exclusive monitor 264 + 265 + @ We must avoid clrex due to Cortex-A15 erratum #830321 266 + strex r2, r1, [sp, #S_LR] @ clear the exclusive monitor 267 + 260 268 stmdb lr!, {r0, r1, \rpsr} @ calling lr and rfe context 261 269 ldmia sp, {r0 - r12} 262 270 mov sp, lr ··· 280 282 .endm 281 283 #else /* ifdef CONFIG_CPU_V7M */ 282 284 .macro restore_user_regs, fast = 0, offset = 0 283 - clrex @ clear the exclusive monitor 284 285 mov r2, sp 285 286 load_user_sp_lr r2, r3, \offset + S_SP @ calling sp, lr 286 287 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr 287 288 ldr lr, [sp, #\offset + S_PC] @ get pc 288 289 add sp, sp, #\offset + S_SP 289 290 msr spsr_cxsf, r1 @ save in spsr_svc 291 + 292 + @ We must avoid clrex due to Cortex-A15 erratum #830321 293 + strex r1, r2, [sp] @ clear the exclusive monitor 294 + 290 295 .if \fast 291 296 ldmdb sp, {r1 - r12} @ get calling r1 - r12 292 297 .else
+1
arch/arm/kernel/module.c
··· 91 91 break; 92 92 93 93 case R_ARM_ABS32: 94 + case R_ARM_TARGET1: 94 95 *(u32 *)loc += sym->st_value; 95 96 break; 96 97
-1
arch/arm/mach-exynos/mcpm-exynos.c
··· 43 43 "mcr p15, 0, r0, c1, c0, 0 @ set SCTLR\n\t" \ 44 44 "isb\n\t"\ 45 45 "bl v7_flush_dcache_"__stringify(level)"\n\t" \ 46 - "clrex\n\t"\ 47 46 "mrc p15, 0, r0, c1, c0, 1 @ get ACTLR\n\t" \ 48 47 "bic r0, r0, #(1 << 6) @ disable local coherency\n\t" \ 49 48 /* Dummy Load of a device register to avoid Erratum 799270 */ \
-6
arch/arm/mm/abort-ev6.S
··· 17 17 */ 18 18 .align 5 19 19 ENTRY(v6_early_abort) 20 - #ifdef CONFIG_CPU_V6 21 - sub r1, sp, #4 @ Get unused stack location 22 - strex r0, r1, [r1] @ Clear the exclusive monitor 23 - #elif defined(CONFIG_CPU_32v6K) 24 - clrex 25 - #endif 26 20 mrc p15, 0, r1, c5, c0, 0 @ get FSR 27 21 mrc p15, 0, r0, c6, c0, 0 @ get FAR 28 22 /*
-6
arch/arm/mm/abort-ev7.S
··· 13 13 */ 14 14 .align 5 15 15 ENTRY(v7_early_abort) 16 - /* 17 - * The effect of data aborts on on the exclusive access monitor are 18 - * UNPREDICTABLE. Do a CLREX to clear the state 19 - */ 20 - clrex 21 - 22 16 mrc p15, 0, r1, c5, c0, 0 @ get FSR 23 17 mrc p15, 0, r0, c6, c0, 0 @ get FAR 24 18
+3 -10
drivers/cpuidle/cpuidle-big_little.c
··· 138 138 return idx; 139 139 } 140 140 141 - static int __init bl_idle_driver_init(struct cpuidle_driver *drv, int cpu_id) 141 + static int __init bl_idle_driver_init(struct cpuidle_driver *drv, int part_id) 142 142 { 143 - struct cpuinfo_arm *cpu_info; 144 143 struct cpumask *cpumask; 145 - unsigned long cpuid; 146 144 int cpu; 147 145 148 146 cpumask = kzalloc(cpumask_size(), GFP_KERNEL); 149 147 if (!cpumask) 150 148 return -ENOMEM; 151 149 152 - for_each_possible_cpu(cpu) { 153 - cpu_info = &per_cpu(cpu_data, cpu); 154 - cpuid = is_smp() ? cpu_info->cpuid : read_cpuid_id(); 155 - 156 - /* read cpu id part number */ 157 - if ((cpuid & 0xFFF0) == cpu_id) 150 + for_each_possible_cpu(cpu) 151 + if (smp_cpuid_part(cpu) == part_id) 158 152 cpumask_set_cpu(cpu, cpumask); 159 - } 160 153 161 154 drv->cpumask = cpumask; 162 155