Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/i915/cdclk: Implement Wa_13012396614
A new workaround was defined for Xe3_LPD, which requires a tweak on how
we handle MDCLK selection. Implement it.
Reviewed-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Link: https://patch.msgid.link/20251222-display-wa-13012396614-timing-of-mdclk-source-selection-v1-2-a2f7e9447f7a@intel.com
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
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drivers/gpu/drm/i915/display/intel_cdclk.c
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-3
drivers/gpu/drm/i915/display/intel_cdclk.c
···
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#include "intel_display_regs.h"
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#include "intel_display_types.h"
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#include "intel_display_utils.h"
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#include "intel_display_wa.h"
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#include "intel_dram.h"
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#include "intel_mchbar_regs.h"
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#include "intel_pci_config.h"
···
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static void icl_cdclk_pll_disable(struct intel_display *display)
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{
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/*
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* Wa_13012396614:
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* Fixes: A sporadic race condition between MDCLK selection and PLL
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* enabling.
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* Workaround:
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* Change programming of MDCLK source selection in CDCLK_CTL:
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* - When disabling the CDCLK PLL, first set MDCLK source to be CD2XCLK.
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* - When enabling the CDCLK PLL, update MDCLK source selection only
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* after the PLL is enabled (which is already done as part of the
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* normal flow of _bxt_set_cdclk()).
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*/
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if (intel_display_wa(display, 13012396614))
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intel_de_rmw(display, CDCLK_CTL, MDCLK_SOURCE_SEL_MASK, MDCLK_SOURCE_SEL_CD2XCLK);
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intel_de_rmw(display, BXT_DE_PLL_ENABLE,
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BXT_DE_PLL_PLL_ENABLE, 0);
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···
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cdclk >= 500000)
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val |= BXT_CDCLK_SSA_PRECHARGE_ENABLE;
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if (DISPLAY_VER(display) >= 20)
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val |= xe2lpd_mdclk_source_sel(display);
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else
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if (DISPLAY_VER(display) >= 20) {
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/*
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* Wa_13012396614 requires selecting CD2XCLK as MDCLK source
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* prior to disabling the PLL, which is already handled by
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* icl_cdclk_pll_disable(). Here we are just making sure
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* we keep the expected value.
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*/
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if (intel_display_wa(display, 13012396614) && vco == 0)
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val |= MDCLK_SOURCE_SEL_CD2XCLK;
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else
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val |= xe2lpd_mdclk_source_sel(display);
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} else {
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val |= skl_cdclk_decimal(cdclk);
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}
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return val;
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}
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drivers/gpu/drm/i915/display/intel_display_wa.c
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drivers/gpu/drm/i915/display/intel_display_wa.c
···
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bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa, const char *name)
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{
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switch (wa) {
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case INTEL_DISPLAY_WA_13012396614:
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return DISPLAY_VERx100(display) == 3000;
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case INTEL_DISPLAY_WA_14011503117:
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return DISPLAY_VER(display) == 13;
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case INTEL_DISPLAY_WA_14025769978: