drm/i915/psr: Add PSR pause/resume reference count

We have now seen this:

<4> [2120.434153] i915 0000:00:02.0: [drm] drm_WARN_ON(psr->paused)
<4> [2120.434196] WARNING: CPU: 3 PID: 4430 at drivers/gpu/drm/i915/display/intel_psr.c:2227 intel_psr_pause+0x16e/0x180 [i915]

Comment for drm_WARN_ON(display->drm, psr->paused) in intel_psr_pause says:

"If we ever hit this, we will need to add refcount to pause/resume"

This patch is implementing PSR pause/resume refcount.

v3: Incorporate changes missing from v2
v2: Add drm_warn for detecting possible unbalanced pause/resume

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://lore.kernel.org/r/20250328080623.1183669-1-jouni.hogander@intel.com

Jouni Högander 1 year ago 9900e35a 94f60899

+18 -15

2 changed files

expand all

drivers

gpu

drm

i915

display

intel_display_types.h

intel_psr.c

+1 -1

drivers/gpu/drm/i915/display/intel_display_types.h

··· 1620 1620 bool sink_support; 1621 1621 bool source_support; 1622 1622 bool enabled; 1623 - bool paused; 1623 + int pause_counter; 1624 1624 enum pipe pipe; 1625 1625 enum transcoder transcoder; 1626 1626 bool active;

+17 -14

drivers/gpu/drm/i915/display/intel_psr.c

··· 2014 2014 2015 2015 intel_psr_enable_source(intel_dp, crtc_state); 2016 2016 intel_dp->psr.enabled = true; 2017 - intel_dp->psr.paused = false; 2017 + intel_dp->psr.pause_counter = 0; 2018 2018 2019 2019 /* 2020 2020 * Link_ok is sticky and set here on PSR enable. We can assume link ··· 2199 2199 */ 2200 2200 void intel_psr_pause(struct intel_dp *intel_dp) 2201 2201 { 2202 - struct intel_display *display = to_intel_display(intel_dp); 2203 2202 struct intel_psr *psr = &intel_dp->psr; 2204 2203 2205 2204 if (!CAN_PSR(intel_dp) && !CAN_PANEL_REPLAY(intel_dp)) ··· 2211 2212 return; 2212 2213 } 2213 2214 2214 - /* If we ever hit this, we will need to add refcount to pause/resume */ 2215 - drm_WARN_ON(display->drm, psr->paused); 2216 - 2217 - intel_psr_exit(intel_dp); 2218 - intel_psr_wait_exit_locked(intel_dp); 2219 - psr->paused = true; 2215 + if (intel_dp->psr.pause_counter++ == 0) { 2216 + intel_psr_exit(intel_dp); 2217 + intel_psr_wait_exit_locked(intel_dp); 2218 + } 2220 2219 2221 2220 mutex_unlock(&psr->lock); 2222 2221 ··· 2230 2233 */ 2231 2234 void intel_psr_resume(struct intel_dp *intel_dp) 2232 2235 { 2236 + struct intel_display *display = to_intel_display(intel_dp); 2233 2237 struct intel_psr *psr = &intel_dp->psr; 2234 2238 2235 2239 if (!CAN_PSR(intel_dp) && !CAN_PANEL_REPLAY(intel_dp)) ··· 2238 2240 2239 2241 mutex_lock(&psr->lock); 2240 2242 2241 - if (!psr->paused) 2242 - goto unlock; 2243 + if (!psr->enabled) 2244 + goto out; 2243 2245 2244 - psr->paused = false; 2245 - intel_psr_activate(intel_dp); 2246 + if (!psr->pause_counter) { 2247 + drm_warn(display->drm, "Unbalanced PSR pause/resume!\n"); 2248 + goto out; 2249 + } 2246 2250 2247 - unlock: 2251 + if (--intel_dp->psr.pause_counter == 0) 2252 + intel_psr_activate(intel_dp); 2253 + 2254 + out: 2248 2255 mutex_unlock(&psr->lock); 2249 2256 } 2250 2257 ··· 3301 3298 * we have to ensure that the PSR is not activated until 3302 3299 * intel_psr_resume() is called. 3303 3300 */ 3304 - if (intel_dp->psr.paused) 3301 + if (intel_dp->psr.pause_counter) 3305 3302 goto unlock; 3306 3303 3307 3304 if (origin == ORIGIN_FLIP ||

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