Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
phy: qualcomm: phy-qcom-eusb2-repeater: Zero out untouched tuning regs
The vendor kernel zeroes out all tuning data outside the init sequence
as part of initialization. Follow suit to avoid UB.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230830-topic-eusb2_override-v2-3-7d8c893d93f6@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
authored by
Konrad Dybcio
and committed by
Vinod Koul
99a517a5
4ba2e527
+44
-14
+44
-14
drivers/phy/qualcomm/phy-qcom-eusb2-repeater.c
+44
-14
drivers/phy/qualcomm/phy-qcom-eusb2-repeater.c
···
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#define EUSB2_FORCE_VAL_5 0xeD
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#define V_CLK_19P2M_EN BIT(6)
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#define EUSB2_TUNE_USB2_CROSSOVER 0x50
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#define EUSB2_TUNE_IUSB2 0x51
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#define EUSB2_TUNE_RES_FSDIF 0x52
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#define EUSB2_TUNE_HSDISC 0x53
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#define EUSB2_TUNE_SQUELCH_U 0x54
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#define EUSB2_TUNE_USB2_SLEW 0x55
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#define EUSB2_TUNE_USB2_EQU 0x56
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#define EUSB2_TUNE_USB2_PREEM 0x57
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#define EUSB2_TUNE_USB2_HS_COMP_CUR 0x58
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#define EUSB2_TUNE_EUSB_SLEW 0x59
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#define EUSB2_TUNE_EUSB_EQU 0x5A
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#define EUSB2_TUNE_EUSB_HS_COMP_CUR 0x5B
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#define QCOM_EUSB2_REPEATER_INIT_CFG(r, v) \
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{ \
···
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}
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enum reg_fields {
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F_TUNE_EUSB_HS_COMP_CUR,
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F_TUNE_EUSB_EQU,
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F_TUNE_EUSB_SLEW,
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F_TUNE_USB2_HS_COMP_CUR,
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F_TUNE_USB2_PREEM,
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F_TUNE_USB2_EQU,
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F_TUNE_USB2_SLEW,
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F_TUNE_SQUELCH_U,
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F_TUNE_HSDISC,
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F_TUNE_RES_FSDIF,
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F_TUNE_IUSB2,
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F_TUNE_USB2_CROSSOVER,
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F_NUM_TUNE_FIELDS,
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F_FORCE_VAL_5 = F_NUM_TUNE_FIELDS,
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};
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static struct reg_field eusb2_repeater_tune_reg_fields[F_NUM_FIELDS] = {
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[F_TUNE_EUSB_HS_COMP_CUR] = REG_FIELD(EUSB2_TUNE_EUSB_HS_COMP_CUR, 0, 1),
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[F_TUNE_EUSB_EQU] = REG_FIELD(EUSB2_TUNE_EUSB_EQU, 0, 1),
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[F_TUNE_EUSB_SLEW] = REG_FIELD(EUSB2_TUNE_EUSB_SLEW, 0, 1),
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[F_TUNE_USB2_HS_COMP_CUR] = REG_FIELD(EUSB2_TUNE_USB2_HS_COMP_CUR, 0, 1),
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[F_TUNE_USB2_PREEM] = REG_FIELD(EUSB2_TUNE_USB2_PREEM, 0, 2),
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[F_TUNE_USB2_EQU] = REG_FIELD(EUSB2_TUNE_USB2_EQU, 0, 1),
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[F_TUNE_USB2_SLEW] = REG_FIELD(EUSB2_TUNE_USB2_SLEW, 0, 1),
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[F_TUNE_SQUELCH_U] = REG_FIELD(EUSB2_TUNE_SQUELCH_U, 0, 2),
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[F_TUNE_HSDISC] = REG_FIELD(EUSB2_TUNE_HSDISC, 0, 2),
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[F_TUNE_RES_FSDIF] = REG_FIELD(EUSB2_TUNE_RES_FSDIF, 0, 2),
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[F_TUNE_IUSB2] = REG_FIELD(EUSB2_TUNE_IUSB2, 0, 3),
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[F_TUNE_USB2_CROSSOVER] = REG_FIELD(EUSB2_TUNE_USB2_CROSSOVER, 0, 2),
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[F_FORCE_VAL_5] = REG_FIELD(EUSB2_FORCE_VAL_5, 0, 7),
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[F_FORCE_EN_5] = REG_FIELD(EUSB2_FORCE_EN_5, 0, 7),
···
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[F_RPTR_STATUS] = REG_FIELD(EUSB2_RPTR_STATUS, 0, 7),
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};
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struct eusb2_repeater_init_tbl {
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unsigned int reg;
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unsigned int val;
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};
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struct eusb2_repeater_cfg {
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const struct eusb2_repeater_init_tbl *init_tbl;
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const u32 *init_tbl;
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int init_tbl_num;
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const char * const *vreg_list;
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int num_vregs;
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"vdd18", "vdd3",
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};
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-
static const struct eusb2_repeater_init_tbl pm8550b_init_tbl[] = {
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QCOM_EUSB2_REPEATER_INIT_CFG(F_TUNE_IUSB2, 0x8),
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QCOM_EUSB2_REPEATER_INIT_CFG(F_TUNE_SQUELCH_U, 0x3),
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QCOM_EUSB2_REPEATER_INIT_CFG(F_TUNE_USB2_PREEM, 0x5),
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static const u32 pm8550b_init_tbl[F_NUM_TUNE_FIELDS] = {
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[F_TUNE_IUSB2] = 0x8,
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[F_TUNE_SQUELCH_U] = 0x3,
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[F_TUNE_USB2_PREEM] = 0x5,
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};
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static const struct eusb2_repeater_cfg pm8550b_eusb2_cfg = {
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static int eusb2_repeater_init(struct phy *phy)
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{
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struct reg_field *regfields = eusb2_repeater_tune_reg_fields;
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struct eusb2_repeater *rptr = phy_get_drvdata(phy);
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const struct eusb2_repeater_init_tbl *init_tbl = rptr->cfg->init_tbl;
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const u32 *init_tbl = rptr->cfg->init_tbl;
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u32 val;
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int ret;
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int i;
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regmap_field_update_bits(rptr->regs[F_EN_CTL1], EUSB2_RPTR_EN, EUSB2_RPTR_EN);
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for (i = 0; i < rptr->cfg->init_tbl_num; i++)
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regmap_field_update_bits(rptr->regs[init_tbl[i].reg],
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init_tbl[i].val, init_tbl[i].val);
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for (i = 0; i < F_NUM_TUNE_FIELDS; i++) {
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if (init_tbl[i]) {
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regmap_field_update_bits(rptr->regs[i], init_tbl[i], init_tbl[i]);
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} else {
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/* Write 0 if there's no value set */
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u32 mask = GENMASK(regfields[i].msb, regfields[i].lsb);
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regmap_field_update_bits(rptr->regs[i], mask, 0);
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}
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}
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ret = regmap_field_read_poll_timeout(rptr->regs[F_RPTR_STATUS],
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val, val & RPTR_OK, 10, 5);