Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
RDMA/irdma: Support 64-byte CQEs and GEN3 CQE opcode decoding
Introduce support for 64-byte CQEs in GEN3 devices. Additionally,
implement GEN3-specific CQE opcode decoding.
Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com>
Signed-off-by: Tatyana Nikolova <tatyana.e.nikolova@intel.com>
Link: https://patch.msgid.link/20250827152545.2056-12-tatyana.e.nikolova@intel.com
Tested-by: Jacob Moroni <jmoroni@google.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>
authored by
Shiraz Saleem
and committed by
Leon Romanovsky
9a1d6878
419afdd1
+48
-9
+4
-2
drivers/infiniband/hw/irdma/hw.c
+4
-2
drivers/infiniband/hw/irdma/hw.c
···
1117
1117
struct irdma_sc_dev *dev = &rf->sc_dev;
1118
1118
struct irdma_ccq_init_info info = {};
1119
1119
struct irdma_ccq *ccq = &rf->ccq;
1120
+
int ccq_size;
1120
1121
int status;
1121
1122
1122
1123
dev->ccq = &ccq->sc_cq;
1123
1124
dev->ccq->dev = dev;
1124
1125
info.dev = dev;
1126
+
ccq_size = (rf->rdma_ver >= IRDMA_GEN_3) ? IW_GEN_3_CCQ_SIZE : IW_CCQ_SIZE;
1125
1127
ccq->shadow_area.size = sizeof(struct irdma_cq_shadow_area);
1126
-
ccq->mem_cq.size = ALIGN(sizeof(struct irdma_cqe) * IW_CCQ_SIZE,
1128
+
ccq->mem_cq.size = ALIGN(sizeof(struct irdma_cqe) * ccq_size,
1127
1129
IRDMA_CQ0_ALIGNMENT);
1128
1130
ccq->mem_cq.va = dma_alloc_coherent(dev->hw->device, ccq->mem_cq.size,
1129
1131
&ccq->mem_cq.pa, GFP_KERNEL);
···
1142
1140
/* populate the ccq init info */
1143
1141
info.cq_base = ccq->mem_cq.va;
1144
1142
info.cq_pa = ccq->mem_cq.pa;
1145
-
info.num_elem = IW_CCQ_SIZE;
1143
+
info.num_elem = ccq_size;
1146
1144
info.shadow_area = ccq->shadow_area.va;
1147
1145
info.shadow_area_pa = ccq->shadow_area.pa;
1148
1146
info.ceqe_mask = false;
+2
-1
drivers/infiniband/hw/irdma/main.h
+2
-1
drivers/infiniband/hw/irdma/main.h
···
66
66
#define IRDMA_MACIP_ADD 1
67
67
#define IRDMA_MACIP_DELETE 2
68
68
69
-
#define IW_CCQ_SIZE (IRDMA_CQP_SW_SQSIZE_2048 + 1)
69
+
#define IW_GEN_3_CCQ_SIZE (2 * IRDMA_CQP_SW_SQSIZE_2048 + 2)
70
+
#define IW_CCQ_SIZE (IRDMA_CQP_SW_SQSIZE_2048 + 2)
70
71
#define IW_CEQ_SIZE 2048
71
72
#define IW_AEQ_SIZE 2048
72
73
+4
-1
drivers/infiniband/hw/irdma/utils.c
+4
-1
drivers/infiniband/hw/irdma/utils.c
···
2338
2338
u8 polarity;
2339
2339
2340
2340
ukcq = &iwcq->sc_cq.cq_uk;
2341
-
cqe = IRDMA_GET_CURRENT_CQ_ELEM(ukcq);
2341
+
if (ukcq->avoid_mem_cflct)
2342
+
cqe = IRDMA_GET_CURRENT_EXTENDED_CQ_ELEM(ukcq);
2343
+
else
2344
+
cqe = IRDMA_GET_CURRENT_CQ_ELEM(ukcq);
2342
2345
get_64bit_val(cqe, 24, &qword3);
2343
2346
polarity = (u8)FIELD_GET(IRDMA_CQ_VALID, qword3);
2344
2347
+25
-5
drivers/infiniband/hw/irdma/verbs.c
+25
-5
drivers/infiniband/hw/irdma/verbs.c
···
1971
1971
1972
1972
if (!iwcq->user_mode) {
1973
1973
entries++;
1974
-
if (rf->sc_dev.hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
1974
+
1975
+
if (!iwcq->sc_cq.cq_uk.avoid_mem_cflct &&
1976
+
dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
1975
1977
entries *= 2;
1978
+
1979
+
if (entries & 1)
1980
+
entries += 1; /* cq size must be an even number */
1976
1981
}
1977
1982
1978
1983
info.cq_size = max(entries, 4);
···
2120
2115
unsigned long flags;
2121
2116
int err_code;
2122
2117
int entries = attr->cqe;
2118
+
bool cqe_64byte_ena;
2123
2119
2124
2120
err_code = cq_validate_flags(attr->flags, dev->hw_attrs.uk_attrs.hw_rev);
2125
2121
if (err_code)
···
2144
2138
info.dev = dev;
2145
2139
ukinfo->cq_size = max(entries, 4);
2146
2140
ukinfo->cq_id = cq_num;
2141
+
cqe_64byte_ena = dev->hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_64_BYTE_CQE ?
2142
+
true : false;
2143
+
ukinfo->avoid_mem_cflct = cqe_64byte_ena;
2147
2144
iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
2148
2145
if (attr->comp_vector < rf->ceqs_count)
2149
2146
info.ceq_id = attr->comp_vector;
···
2222
2213
}
2223
2214
2224
2215
entries++;
2225
-
if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2216
+
if (!cqe_64byte_ena && dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2226
2217
entries *= 2;
2218
+
2219
+
if (entries & 1)
2220
+
entries += 1; /* cq size must be an even number */
2221
+
2227
2222
ukinfo->cq_size = entries;
2228
2223
2229
-
rsize = info.cq_uk_init_info.cq_size * sizeof(struct irdma_cqe);
2224
+
if (cqe_64byte_ena)
2225
+
rsize = info.cq_uk_init_info.cq_size * sizeof(struct irdma_extended_cqe);
2226
+
else
2227
+
rsize = info.cq_uk_init_info.cq_size * sizeof(struct irdma_cqe);
2230
2228
iwcq->kmem.size = ALIGN(round_up(rsize, 256), 256);
2231
2229
iwcq->kmem.va = dma_alloc_coherent(dev->hw->device,
2232
2230
iwcq->kmem.size,
···
3800
3784
if (cq_poll_info->q_type == IRDMA_CQE_QTYPE_SQ) {
3801
3785
set_ib_wc_op_sq(cq_poll_info, entry);
3802
3786
} else {
3803
-
set_ib_wc_op_rq(cq_poll_info, entry,
3804
-
qp->qp_uk.qp_caps & IRDMA_SEND_WITH_IMM);
3787
+
if (qp->dev->hw_attrs.uk_attrs.hw_rev <= IRDMA_GEN_2)
3788
+
set_ib_wc_op_rq(cq_poll_info, entry,
3789
+
qp->qp_uk.qp_caps & IRDMA_SEND_WITH_IMM ?
3790
+
true : false);
3791
+
else
3792
+
set_ib_wc_op_rq_gen_3(cq_poll_info, entry);
3805
3793
if (qp->qp_uk.qp_type != IRDMA_QP_TYPE_ROCE_UD &&
3806
3794
cq_poll_info->stag_invalid_set) {
3807
3795
entry->ex.invalidate_rkey = cq_poll_info->inv_stag;
+13
drivers/infiniband/hw/irdma/verbs.h
+13
drivers/infiniband/hw/irdma/verbs.h
···
267
267
}
268
268
}
269
269
270
+
static inline void set_ib_wc_op_rq_gen_3(struct irdma_cq_poll_info *info,
271
+
struct ib_wc *entry)
272
+
{
273
+
switch (info->op_type) {
274
+
case IRDMA_OP_TYPE_RDMA_WRITE:
275
+
case IRDMA_OP_TYPE_RDMA_WRITE_SOL:
276
+
entry->opcode = IB_WC_RECV_RDMA_WITH_IMM;
277
+
break;
278
+
default:
279
+
entry->opcode = IB_WC_RECV;
280
+
}
281
+
}
282
+
270
283
static inline void set_ib_wc_op_rq(struct irdma_cq_poll_info *cq_poll_info,
271
284
struct ib_wc *entry, bool send_imm_support)
272
285
{