tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

phy: ti: j721e-wiz: Manage TypeC lane swap if typec-dir-gpios not specified

It's possible that the Type-C plug orientation on the DIR line will be
implemented through hardware design. In that situation, there won't be
an external GPIO line available, but the driver still needs to address
this since the DT won't use the typec-dir-gpios property.

Add code to handle LN10 Type-C swap if typec-dir-gpios property is not
specified in DT.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20230113150615.19375-2-sinthu.raja@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Sinthu Raja and committed by
Vinod Koul 9a8a54b9 2a397a23

+27 -9
+27 -9
drivers/phy/ti/phy-j721e-wiz.c
··· 376 376 struct gpio_desc *gpio_typec_dir; 377 377 int typec_dir_delay; 378 378 u32 lane_phy_type[WIZ_MAX_LANES]; 379 + u32 master_lane_num[WIZ_MAX_LANES]; 379 380 struct clk *input_clks[WIZ_MAX_INPUT_CLOCKS]; 380 381 struct clk *output_clks[WIZ_MAX_OUTPUT_CLOCKS]; 381 382 struct clk_onecell_data clk_data; ··· 1235 1234 struct wiz *wiz = dev_get_drvdata(dev); 1236 1235 int ret; 1237 1236 1238 - /* if typec-dir gpio was specified, set LN10 SWAP bit based on that */ 1239 - if (id == 0 && wiz->gpio_typec_dir) { 1240 - if (wiz->typec_dir_delay) 1241 - msleep_interruptible(wiz->typec_dir_delay); 1237 + if (id == 0) { 1238 + /* if typec-dir gpio was specified, set LN10 SWAP bit based on that */ 1239 + if (wiz->gpio_typec_dir) { 1240 + if (wiz->typec_dir_delay) 1241 + msleep_interruptible(wiz->typec_dir_delay); 1242 1242 1243 - if (gpiod_get_value_cansleep(wiz->gpio_typec_dir)) 1244 - regmap_field_write(wiz->typec_ln10_swap, 1); 1245 - else 1246 - regmap_field_write(wiz->typec_ln10_swap, 0); 1243 + if (gpiod_get_value_cansleep(wiz->gpio_typec_dir)) 1244 + regmap_field_write(wiz->typec_ln10_swap, 1); 1245 + else 1246 + regmap_field_write(wiz->typec_ln10_swap, 0); 1247 + } else { 1248 + /* if no typec-dir gpio was specified and PHY type is 1249 + * USB3 with master lane number is '0', set LN10 SWAP 1250 + * bit to '1' 1251 + */ 1252 + u32 num_lanes = wiz->num_lanes; 1253 + int i; 1254 + 1255 + for (i = 0; i < num_lanes; i++) { 1256 + if (wiz->lane_phy_type[i] == PHY_TYPE_USB3) 1257 + if (wiz->master_lane_num[i] == 0) 1258 + regmap_field_write(wiz->typec_ln10_swap, 1); 1259 + } 1260 + } 1247 1261 } 1248 1262 1249 1263 if (id == 0) { ··· 1402 1386 dev_dbg(dev, "%s: Lanes %u-%u have phy-type %u\n", __func__, 1403 1387 reg, reg + num_lanes - 1, phy_type); 1404 1388 1405 - for (i = reg; i < reg + num_lanes; i++) 1389 + for (i = reg; i < reg + num_lanes; i++) { 1390 + wiz->master_lane_num[i] = reg; 1406 1391 wiz->lane_phy_type[i] = phy_type; 1392 + } 1407 1393 } 1408 1394 1409 1395 return 0;