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Merge branch 'net-microchip-correct-spelling-in-comments'

Simon Horman says:

====================
net: microchip: Correct spelling in comments

Correct spelling in comments in Microchip drivers.
Flagged by codespell.

v1: https://lore.kernel.org/r/20240419-lan743x-confirm-v1-0-2a087617a3e5@kernel.org
====================

Link: https://lore.kernel.org/r/20240424-lan743x-confirm-v2-0-f0480542e39f@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

+25 -23
+2 -2
drivers/net/ethernet/microchip/encx24j600-regmap.c
··· 75 75 if (unlikely(ret)) 76 76 return ret; 77 77 } else { 78 - /* Translate registers that are more effecient using 78 + /* Translate registers that are more efficient using 79 79 * 3-byte SPI commands 80 80 */ 81 81 switch (reg) { ··· 129 129 if (unlikely(ret)) 130 130 return ret; 131 131 } else { 132 - /* Translate registers that are more effecient using 132 + /* Translate registers that are more efficient using 133 133 * 3-byte SPI commands 134 134 */ 135 135 switch (reg) {
+4 -2
drivers/net/ethernet/microchip/encx24j600.c
··· 569 569 pr_info(DRV_NAME " MABBIPG: %04X\n", encx24j600_read_reg(priv, 570 570 MABBIPG)); 571 571 572 - /* PHY configuation */ 572 + /* PHY configuration */ 573 573 pr_info(DRV_NAME " PHCON1: %04X\n", encx24j600_read_phy(priv, PHCON1)); 574 574 pr_info(DRV_NAME " PHCON2: %04X\n", encx24j600_read_phy(priv, PHCON2)); 575 575 pr_info(DRV_NAME " PHANA: %04X\n", encx24j600_read_phy(priv, PHANA)); ··· 837 837 dump_packet("TX", priv->tx_skb->len, priv->tx_skb->data); 838 838 839 839 if (encx24j600_read_reg(priv, EIR) & TXABTIF) 840 - /* Last transmition aborted due to error. Reset TX interface */ 840 + /* Last transmission aborted due to error. 841 + * Reset TX interface 842 + */ 841 843 encx24j600_reset_hw_tx(priv); 842 844 843 845 /* Clear the TXIF flag if were previously set */
+1 -1
drivers/net/ethernet/microchip/encx24j600_hw.h
··· 243 243 244 244 /* MAIPG */ 245 245 /* value of the high byte is given by the reserved bits, 246 - * value of the low byte is recomended setting of the 246 + * value of the low byte is recommended setting of the 247 247 * IPG parameter. 248 248 */ 249 249 #define MAIPGH_VAL 0x0C
+2 -2
drivers/net/ethernet/microchip/lan743x_main.c
··· 803 803 u32 val, mii_access; 804 804 int ret; 805 805 806 - /* comfirm MII not busy */ 806 + /* confirm MII not busy */ 807 807 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 808 808 if (ret < 0) 809 809 return ret; ··· 868 868 u32 mmd_access; 869 869 int ret; 870 870 871 - /* comfirm MII not busy */ 871 + /* confirm MII not busy */ 872 872 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 873 873 if (ret < 0) 874 874 return ret;
+1 -1
drivers/net/ethernet/microchip/lan743x_ptp.c
··· 555 555 if (half == wf_high) { 556 556 /* It's 50% match. Use the toggle option */ 557 557 pulse_width = PTP_GENERAL_CONFIG_CLOCK_EVENT_TOGGLE_; 558 - /* In this case, devide period value by 2 */ 558 + /* In this case, divide period value by 2 */ 559 559 ts_period = ns_to_timespec64(div_s64(period64, 2)); 560 560 period_sec = ts_period.tv_sec; 561 561 period_nsec = ts_period.tv_nsec;
+1 -1
drivers/net/ethernet/microchip/lan966x/lan966x_ifh.h
··· 78 78 /* Classified internal priority for queuing */ 79 79 #define IFH_POS_QOS_CLASS 100 80 80 81 - /* Bit mask with eight cpu copy classses */ 81 + /* Bit mask with eight cpu copy classes */ 82 82 #define IFH_POS_CPUQ 92 83 83 84 84 /* Relearn + learn flags (*) */
+2 -2
drivers/net/ethernet/microchip/lan966x/lan966x_main.c
··· 276 276 ++i; 277 277 } 278 278 279 - /* Inidcate EOF and valid bytes in the last word */ 279 + /* Indicate EOF and valid bytes in the last word */ 280 280 lan_wr(QS_INJ_CTRL_GAP_SIZE_SET(1) | 281 281 QS_INJ_CTRL_VLD_BYTES_SET(skb->len < LAN966X_BUFFER_MIN_SZ ? 282 282 0 : last) | ··· 520 520 u32 val; 521 521 522 522 /* The IGMP and MLD frames are not forward by the HW if 523 - * multicast snooping is enabled, therefor don't mark as 523 + * multicast snooping is enabled, therefore don't mark as 524 524 * offload to allow the SW to forward the frames accordingly. 525 525 */ 526 526 val = lan_rd(lan966x, ANA_CPU_FWD_CFG(port));
+1 -1
drivers/net/ethernet/microchip/lan966x/lan966x_main.h
··· 326 326 327 327 u8 base_mac[ETH_ALEN]; 328 328 329 - spinlock_t tx_lock; /* lock for frame transmition */ 329 + spinlock_t tx_lock; /* lock for frame transmission */ 330 330 331 331 struct net_device *bridge; 332 332 u16 bridge_mask;
+1 -1
drivers/net/ethernet/microchip/lan966x/lan966x_port.c
··· 88 88 SYS_FRONT_PORT_MODE_HDX_MODE, 89 89 lan966x, SYS_FRONT_PORT_MODE(port->chip_port)); 90 90 91 - /* 8: Flush the queues accociated with the port */ 91 + /* 8: Flush the queues associated with the port */ 92 92 lan_rmw(QSYS_SW_PORT_MODE_AGING_MODE_SET(3), 93 93 QSYS_SW_PORT_MODE_AGING_MODE, 94 94 lan966x, QSYS_SW_PORT_MODE(port->chip_port));
+1 -1
drivers/net/ethernet/microchip/lan966x/lan966x_vlan.c
··· 157 157 158 158 pvid = lan966x_vlan_port_get_pvid(port); 159 159 160 - /* Ingress clasification (ANA_PORT_VLAN_CFG) */ 160 + /* Ingress classification (ANA_PORT_VLAN_CFG) */ 161 161 /* Default vlan to classify for untagged frames (may be zero) */ 162 162 val = ANA_VLAN_CFG_VLAN_VID_SET(pvid); 163 163 if (port->vlan_aware)
+1 -1
drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c
··· 143 143 144 144 static void sparx5_fdma_rx_deactivate(struct sparx5 *sparx5, struct sparx5_rx *rx) 145 145 { 146 - /* Dectivate the RX channel */ 146 + /* Deactivate the RX channel */ 147 147 spx5_rmw(0, BIT(rx->channel_id) & FDMA_CH_ACTIVATE_CH_ACTIVATE, 148 148 sparx5, FDMA_CH_ACTIVATE); 149 149
+1 -1
drivers/net/ethernet/microchip/sparx5/sparx5_packet.c
··· 67 67 for (i = 0; i < IFH_LEN; i++) 68 68 ifh[i] = spx5_rd(sparx5, QS_XTR_RD(grp)); 69 69 70 - /* Decode IFH (whats needed) */ 70 + /* Decode IFH (what's needed) */ 71 71 sparx5_ifh_parse(ifh, &fi); 72 72 73 73 /* Map to port netdev */
+1 -1
drivers/net/ethernet/microchip/sparx5/sparx5_port.c
··· 370 370 /* 6: Wait while the last frame is exiting the queues */ 371 371 usleep_range(8 * spd_prm, 10 * spd_prm); 372 372 373 - /* 7: Flush the queues accociated with the port->portno */ 373 + /* 7: Flush the queues associated with the port->portno */ 374 374 spx5_rmw(HSCH_FLUSH_CTRL_FLUSH_PORT_SET(port->portno) | 375 375 HSCH_FLUSH_CTRL_FLUSH_DST_SET(1) | 376 376 HSCH_FLUSH_CTRL_FLUSH_SRC_SET(1) |
+1 -1
drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c
··· 190 190 /* Remove standalone port entry */ 191 191 sparx5_mact_forget(sparx5, ndev->dev_addr, 0); 192 192 193 - /* Port enters in bridge mode therefor don't need to copy to CPU 193 + /* Port enters in bridge mode therefore don't need to copy to CPU 194 194 * frames for multicast in case the bridge is not requesting them 195 195 */ 196 196 __dev_mc_unsync(ndev, sparx5_mc_unsync);
+1 -1
drivers/net/ethernet/microchip/vcap/vcap_ag_api.h
··· 290 290 * Sparx5: TCP flag RST , LAN966x: TCP: TCP flag RST. PTP over UDP: messageType 291 291 * bit 3 292 292 * VCAP_KF_L4_SEQUENCE_EQ0_IS: W1, sparx5: is2/es2, lan966x: is2 293 - * Set if TCP sequence number is 0, LAN966x: Overlayed with PTP over UDP: 293 + * Set if TCP sequence number is 0, LAN966x: Overlaid with PTP over UDP: 294 294 * messageType bit 0 295 295 * VCAP_KF_L4_SPORT: W16, sparx5: is0/is2/es2, lan966x: is1/is2 296 296 * TCP/UDP source port
+2 -2
drivers/net/ethernet/microchip/vcap/vcap_api.c
··· 327 327 } 328 328 329 329 /* Verify that the typegroup information, subword count, keyset and type id 330 - * are in sync and correct, return the list of matchin keysets 330 + * are in sync and correct, return the list of matching keysets 331 331 */ 332 332 int 333 333 vcap_find_keystream_keysets(struct vcap_control *vctrl, ··· 2943 2943 } 2944 2944 EXPORT_SYMBOL_GPL(vcap_netbytes_copy); 2945 2945 2946 - /* Convert validation error code into tc extact error message */ 2946 + /* Convert validation error code into tc extack error message */ 2947 2947 void vcap_set_tc_exterr(struct flow_cls_offload *fco, struct vcap_rule *vrule) 2948 2948 { 2949 2949 switch (vrule->exterr) {
+1 -1
drivers/net/ethernet/microchip/vcap/vcap_api_client.h
··· 238 238 /* Copy to host byte order */ 239 239 void vcap_netbytes_copy(u8 *dst, u8 *src, int count); 240 240 241 - /* Convert validation error code into tc extact error message */ 241 + /* Convert validation error code into tc extack error message */ 242 242 void vcap_set_tc_exterr(struct flow_cls_offload *fco, struct vcap_rule *vrule); 243 243 244 244 /* Cleanup a VCAP instance */
+1 -1
drivers/net/ethernet/microchip/vcap/vcap_api_private.h
··· 109 109 struct vcap_keyset_list *kslist); 110 110 111 111 /* Verify that the typegroup information, subword count, keyset and type id 112 - * are in sync and correct, return the list of matchin keysets 112 + * are in sync and correct, return the list of matching keysets 113 113 */ 114 114 int vcap_find_keystream_keysets(struct vcap_control *vctrl, enum vcap_type vt, 115 115 u32 *keystream, u32 *mskstream, bool mask,