Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'irq-msi-2025-11-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull MSI updates from Thomas Gleixner:
"Updates for [PCI] MSI related code:
- Remove one variant of PCI/MSI management as all users have been
converted to use per device domains. That reduces the variants to
two:
The modern and the real archaic legacy variant, which keeps the
usual suspects in the museum category alive.
- Rework the platform MSI device ID detection mechanism in the ARM
GIC world to address resource leaks, duplicated code and other
details. This requires a corresponding preparatory step in the
PCI/iproc driver.
- Trivial core code cleanups"
* tag 'irq-msi-2025-11-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
irqchip/gic-its: Rework platform MSI deviceID detection
PCI: iproc: Implement MSI controller node detection with of_msi_xlate()
genirq/msi: Slightly simplify msi_domain_alloc()
PCI/MSI: Delete pci_msi_create_irq_domain()
+29
-179
+23
-68
drivers/irqchip/irq-gic-its-msi-parent.c
+23
-68
drivers/irqchip/irq-gic-its-msi-parent.c
···
142
142
#define its_v5_pci_msi_prepare NULL
143
143
#endif /* !CONFIG_PCI_MSI */
144
144
145
-
static int of_pmsi_get_dev_id(struct irq_domain *domain, struct device *dev,
146
-
u32 *dev_id)
145
+
static int of_pmsi_get_msi_info(struct irq_domain *domain, struct device *dev, u32 *dev_id,
146
+
phys_addr_t *pa)
147
147
{
148
-
int ret, index = 0;
148
+
struct of_phandle_iterator it;
149
+
int ret;
149
150
150
151
/* Suck the DeviceID out of the msi-parent property */
151
-
do {
152
-
struct of_phandle_args args;
152
+
of_for_each_phandle(&it, ret, dev->of_node, "msi-parent", "#msi-cells", -1) {
153
+
/* GICv5 ITS domain matches the MSI controller node parent */
154
+
struct device_node *np __free(device_node) = pa ? of_get_parent(it.node)
155
+
: of_node_get(it.node);
153
156
154
-
ret = of_parse_phandle_with_args(dev->of_node,
155
-
"msi-parent", "#msi-cells",
156
-
index, &args);
157
-
if (args.np == irq_domain_get_of_node(domain)) {
158
-
if (WARN_ON(args.args_count != 1))
159
-
return -EINVAL;
160
-
*dev_id = args.args[0];
161
-
break;
162
-
}
163
-
index++;
164
-
} while (!ret);
157
+
if (np == irq_domain_get_of_node(domain)) {
158
+
u32 args;
165
159
166
-
if (ret) {
167
-
struct device_node *np = NULL;
160
+
if (WARN_ON(of_phandle_iterator_args(&it, &args, 1) != 1))
161
+
ret = -EINVAL;
168
162
169
-
ret = of_map_id(dev->of_node, dev->id, "msi-map", "msi-map-mask", &np, dev_id);
170
-
if (np)
171
-
of_node_put(np);
172
-
}
163
+
if (!ret && pa)
164
+
ret = its_translate_frame_address(it.node, pa);
173
165
174
-
return ret;
175
-
}
166
+
if (!ret)
167
+
*dev_id = args;
176
168
177
-
static int of_v5_pmsi_get_msi_info(struct irq_domain *domain, struct device *dev,
178
-
u32 *dev_id, phys_addr_t *pa)
179
-
{
180
-
int ret, index = 0;
181
-
/*
182
-
* Retrieve the DeviceID and the ITS translate frame node pointer
183
-
* out of the msi-parent property.
184
-
*/
185
-
do {
186
-
struct of_phandle_args args;
187
-
188
-
ret = of_parse_phandle_with_args(dev->of_node,
189
-
"msi-parent", "#msi-cells",
190
-
index, &args);
191
-
if (ret)
192
-
break;
193
-
/*
194
-
* The IRQ domain fwnode is the msi controller parent
195
-
* in GICv5 (where the msi controller nodes are the
196
-
* ITS translate frames).
197
-
*/
198
-
if (args.np->parent == irq_domain_get_of_node(domain)) {
199
-
if (WARN_ON(args.args_count != 1))
200
-
return -EINVAL;
201
-
*dev_id = args.args[0];
202
-
203
-
ret = its_translate_frame_address(args.np, pa);
204
-
if (ret)
205
-
return -ENODEV;
206
-
break;
207
-
}
208
-
index++;
209
-
} while (!ret);
210
-
211
-
if (ret) {
212
-
struct device_node *np = NULL;
213
-
214
-
ret = of_map_id(dev->of_node, dev->id, "msi-map", "msi-map-mask", &np, dev_id);
215
-
if (np) {
216
-
ret = its_translate_frame_address(np, pa);
217
-
of_node_put(np);
169
+
of_node_put(it.node);
170
+
return ret;
218
171
}
219
172
}
220
173
221
-
return ret;
174
+
struct device_node *msi_ctrl __free(device_node) = NULL;
175
+
176
+
return of_map_id(dev->of_node, dev->id, "msi-map", "msi-map-mask", &msi_ctrl, dev_id);
222
177
}
223
178
224
179
int __weak iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id)
···
189
234
int ret;
190
235
191
236
if (dev->of_node)
192
-
ret = of_pmsi_get_dev_id(domain->parent, dev, &dev_id);
237
+
ret = of_pmsi_get_msi_info(domain->parent, dev, &dev_id, NULL);
193
238
else
194
239
ret = iort_pmsi_get_dev_id(dev, &dev_id);
195
240
if (ret)
···
217
262
if (!dev->of_node)
218
263
return -ENODEV;
219
264
220
-
ret = of_v5_pmsi_get_msi_info(domain->parent, dev, &dev_id, &pa);
265
+
ret = of_pmsi_get_msi_info(domain->parent, dev, &dev_id, &pa);
221
266
if (ret)
222
267
return ret;
223
268
+5
-17
drivers/pci/controller/pcie-iproc.c
+5
-17
drivers/pci/controller/pcie-iproc.c
···
17
17
#include <linux/irqchip/arm-gic-v3.h>
18
18
#include <linux/platform_device.h>
19
19
#include <linux/of_address.h>
20
+
#include <linux/of_irq.h>
20
21
#include <linux/of_pci.h>
21
22
#include <linux/of_platform.h>
22
23
#include <linux/phy/phy.h>
···
1338
1337
1339
1338
static int iproc_pcie_msi_enable(struct iproc_pcie *pcie)
1340
1339
{
1341
-
struct device_node *msi_node;
1340
+
struct device_node *msi_node = NULL;
1342
1341
int ret;
1343
1342
1344
1343
/*
1345
1344
* Either the "msi-parent" or the "msi-map" phandle needs to exist
1346
1345
* for us to obtain the MSI node.
1347
1346
*/
1348
-
1349
-
msi_node = of_parse_phandle(pcie->dev->of_node, "msi-parent", 0);
1350
-
if (!msi_node) {
1351
-
const __be32 *msi_map = NULL;
1352
-
int len;
1353
-
u32 phandle;
1354
-
1355
-
msi_map = of_get_property(pcie->dev->of_node, "msi-map", &len);
1356
-
if (!msi_map)
1357
-
return -ENODEV;
1358
-
1359
-
phandle = be32_to_cpup(msi_map + 1);
1360
-
msi_node = of_find_node_by_phandle(phandle);
1361
-
if (!msi_node)
1362
-
return -ENODEV;
1363
-
}
1347
+
of_msi_xlate(pcie->dev, &msi_node, 0);
1348
+
if (!msi_node)
1349
+
return -ENODEV;
1364
1350
1365
1351
/*
1366
1352
* Certain revisions of the iProc PCIe controller require additional
-90
drivers/pci/msi/irqdomain.c
-90
drivers/pci/msi/irqdomain.c
···
49
49
__pci_write_msi_msg(desc, msg);
50
50
}
51
51
52
-
/**
53
-
* pci_msi_domain_calc_hwirq - Generate a unique ID for an MSI source
54
-
* @desc: Pointer to the MSI descriptor
55
-
*
56
-
* The ID number is only used within the irqdomain.
57
-
*/
58
-
static irq_hw_number_t pci_msi_domain_calc_hwirq(struct msi_desc *desc)
59
-
{
60
-
struct pci_dev *dev = msi_desc_to_pci_dev(desc);
61
-
62
-
return (irq_hw_number_t)desc->msi_index |
63
-
pci_dev_id(dev) << 11 |
64
-
((irq_hw_number_t)(pci_domain_nr(dev->bus) & 0xFFFFFFFF)) << 27;
65
-
}
66
-
67
-
static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,
68
-
struct msi_desc *desc)
69
-
{
70
-
arg->desc = desc;
71
-
arg->hwirq = pci_msi_domain_calc_hwirq(desc);
72
-
}
73
-
74
-
static struct msi_domain_ops pci_msi_domain_ops_default = {
75
-
.set_desc = pci_msi_domain_set_desc,
76
-
};
77
-
78
-
static void pci_msi_domain_update_dom_ops(struct msi_domain_info *info)
79
-
{
80
-
struct msi_domain_ops *ops = info->ops;
81
-
82
-
if (ops == NULL) {
83
-
info->ops = &pci_msi_domain_ops_default;
84
-
} else {
85
-
if (ops->set_desc == NULL)
86
-
ops->set_desc = pci_msi_domain_set_desc;
87
-
}
88
-
}
89
-
90
-
static void pci_msi_domain_update_chip_ops(struct msi_domain_info *info)
91
-
{
92
-
struct irq_chip *chip = info->chip;
93
-
94
-
BUG_ON(!chip);
95
-
if (!chip->irq_write_msi_msg)
96
-
chip->irq_write_msi_msg = pci_msi_domain_write_msg;
97
-
if (!chip->irq_mask)
98
-
chip->irq_mask = pci_msi_mask_irq;
99
-
if (!chip->irq_unmask)
100
-
chip->irq_unmask = pci_msi_unmask_irq;
101
-
}
102
-
103
-
/**
104
-
* pci_msi_create_irq_domain - Create a MSI interrupt domain
105
-
* @fwnode: Optional fwnode of the interrupt controller
106
-
* @info: MSI domain info
107
-
* @parent: Parent irq domain
108
-
*
109
-
* Updates the domain and chip ops and creates a MSI interrupt domain.
110
-
*
111
-
* Returns:
112
-
* A domain pointer or NULL in case of failure.
113
-
*/
114
-
struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
115
-
struct msi_domain_info *info,
116
-
struct irq_domain *parent)
117
-
{
118
-
if (WARN_ON(info->flags & MSI_FLAG_LEVEL_CAPABLE))
119
-
info->flags &= ~MSI_FLAG_LEVEL_CAPABLE;
120
-
121
-
if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
122
-
pci_msi_domain_update_dom_ops(info);
123
-
if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
124
-
pci_msi_domain_update_chip_ops(info);
125
-
126
-
/* Let the core code free MSI descriptors when freeing interrupts */
127
-
info->flags |= MSI_FLAG_FREE_MSI_DESCS;
128
-
129
-
info->flags |= MSI_FLAG_ACTIVATE_EARLY | MSI_FLAG_DEV_SYSFS;
130
-
if (IS_ENABLED(CONFIG_GENERIC_IRQ_RESERVATION_MODE))
131
-
info->flags |= MSI_FLAG_MUST_REACTIVATE;
132
-
133
-
/* PCI-MSI is oneshot-safe */
134
-
info->chip->flags |= IRQCHIP_ONESHOT_SAFE;
135
-
/* Let the core update the bus token */
136
-
info->bus_token = DOMAIN_BUS_PCI_MSI;
137
-
138
-
return msi_create_irq_domain(fwnode, info, parent);
139
-
}
140
-
EXPORT_SYMBOL_GPL(pci_msi_create_irq_domain);
141
-
142
52
/*
143
53
* Per device MSI[-X] domain functionality
144
54
*/
-3
include/linux/msi.h
-3
include/linux/msi.h
···
701
701
void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
702
702
void pci_msi_mask_irq(struct irq_data *data);
703
703
void pci_msi_unmask_irq(struct irq_data *data);
704
-
struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
705
-
struct msi_domain_info *info,
706
-
struct irq_domain *parent);
707
704
u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev);
708
705
u32 pci_msi_map_rid_ctlr_node(struct pci_dev *pdev, struct device_node **node);
709
706
struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev);