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crypto: octeontx2 - remove errata workaround for CN10KB or CN10KA B0 chip.

Adds code to not execute CPT errata "when CPT_AF_DIAG[FLT_DIS] = 0 and a
CPT engine access to LLC/DRAM encounters a fault/poison, a rare case
may result in unpredictable data being delivered to a CPT engine"
workaround on CN10KA B0/CN10KB HW as it is fixed on these chips.

Signed-off-by: Srujana Challa <schalla@marvell.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

authored by

Srujana Challa and committed by
Herbert Xu
9d1d5702 82f89f1a

+13 -4
+7
drivers/crypto/marvell/octeontx2/otx2_cpt_common.h
··· 186 186 } 187 187 } 188 188 189 + static inline bool cpt_is_errata_38550_exists(struct pci_dev *pdev) 190 + { 191 + if (is_dev_otx2(pdev) || is_dev_cn10ka_ax(pdev)) 192 + return true; 193 + 194 + return false; 195 + } 189 196 190 197 static inline bool cpt_feature_sgv2(struct pci_dev *pdev) 191 198 {
+6 -4
drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
··· 1254 1254 * encounters a fault/poison, a rare case may result in 1255 1255 * unpredictable data being delivered to a CPT engine. 1256 1256 */ 1257 - otx2_cpt_read_af_reg(&cptpf->afpf_mbox, pdev, CPT_AF_DIAG, &reg_val, 1258 - BLKADDR_CPT0); 1259 - otx2_cpt_write_af_reg(&cptpf->afpf_mbox, pdev, CPT_AF_DIAG, 1260 - reg_val | BIT_ULL(24), BLKADDR_CPT0); 1257 + if (cpt_is_errata_38550_exists(pdev)) { 1258 + otx2_cpt_read_af_reg(&cptpf->afpf_mbox, pdev, CPT_AF_DIAG, 1259 + &reg_val, BLKADDR_CPT0); 1260 + otx2_cpt_write_af_reg(&cptpf->afpf_mbox, pdev, CPT_AF_DIAG, 1261 + reg_val | BIT_ULL(24), BLKADDR_CPT0); 1262 + } 1261 1263 1262 1264 mutex_unlock(&eng_grps->lock); 1263 1265 return 0;