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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
clk: qcom: gcc-msm8998: Remove transient global "xo" clock
Now that all clock controllers and the DSI PLL clocks rely on "xo" being
passed in DT as phandle instead of looking it up by the global "xo" name
this transient clock can be removed, leaving only the fixed-factor
"xo_board" clock in DT.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Link: https://lore.kernel.org/r/20210911121340.261920-4-marijn.suijten@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
authored by
Marijn Suijten
and committed by
Stephen Boyd
9d67de94
e815e34b
+30
-27
+30
-27
drivers/clk/qcom/gcc-msm8998.c
+30
-27
drivers/clk/qcom/gcc-msm8998.c
···
25
25
#include "reset.h"
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26
#include "gdsc.h"
27
27
28
-
static struct clk_fixed_factor xo = {
29
-
.mult = 1,
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-
.div = 1,
31
-
.hw.init = &(struct clk_init_data){
32
-
.name = "xo",
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-
.parent_names = (const char *[]){ "xo_board" },
34
-
.num_parents = 1,
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-
.ops = &clk_fixed_factor_ops,
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-
},
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-
};
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-
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static struct pll_vco fabia_vco[] = {
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29
{ 250000000, 2000000000, 0 },
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{ 125000000, 1000000000, 1 },
···
40
51
.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "gpll0",
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-
.parent_names = (const char *[]){ "xo" },
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+
.parent_data = (const struct clk_parent_data []) {
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+
{ .fw_name = "xo" },
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+
},
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.num_parents = 1,
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.ops = &clk_alpha_pll_fixed_fabia_ops,
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}
···
111
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.enable_mask = BIT(1),
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.hw.init = &(struct clk_init_data){
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.name = "gpll1",
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-
.parent_names = (const char *[]){ "xo" },
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+
.parent_data = (const struct clk_parent_data []) {
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+
{ .fw_name = "xo" },
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+
},
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.num_parents = 1,
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.ops = &clk_alpha_pll_fixed_fabia_ops,
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}
···
182
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.enable_mask = BIT(2),
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.hw.init = &(struct clk_init_data){
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.name = "gpll2",
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-
.parent_names = (const char *[]){ "xo" },
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+
.parent_data = (const struct clk_parent_data []) {
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+
{ .fw_name = "xo" },
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+
},
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.num_parents = 1,
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.ops = &clk_alpha_pll_fixed_fabia_ops,
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}
···
253
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.enable_mask = BIT(3),
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.hw.init = &(struct clk_init_data){
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.name = "gpll3",
256
-
.parent_names = (const char *[]){ "xo" },
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+
.parent_data = (const struct clk_parent_data []) {
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+
{ .fw_name = "xo" },
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+
},
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.num_parents = 1,
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.ops = &clk_alpha_pll_fixed_fabia_ops,
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}
···
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.enable_mask = BIT(4),
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.hw.init = &(struct clk_init_data){
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.name = "gpll4",
327
-
.parent_names = (const char *[]){ "xo" },
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+
.parent_data = (const struct clk_parent_data []) {
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+
{ .fw_name = "xo" },
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+
},
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.num_parents = 1,
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.ops = &clk_alpha_pll_fixed_fabia_ops,
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}
···
2760
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "gcc_hdmi_clkref_clk",
2763
-
.parent_names = (const char *[]){ "xo" },
2764
+
.parent_data = (const struct clk_parent_data []) {
2765
+
{ .fw_name = "xo" },
2766
+
},
2764
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.num_parents = 1,
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.ops = &clk_branch2_ops,
2766
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},
···
2776
2775
.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
2778
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.name = "gcc_ufs_clkref_clk",
2779
-
.parent_names = (const char *[]){ "xo" },
2778
+
.parent_data = (const struct clk_parent_data []) {
2779
+
{ .fw_name = "xo" },
2780
+
},
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.num_parents = 1,
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2782
.ops = &clk_branch2_ops,
2782
2783
},
···
2792
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.enable_mask = BIT(0),
2793
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.hw.init = &(struct clk_init_data){
2794
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.name = "gcc_usb3_clkref_clk",
2795
-
.parent_names = (const char *[]){ "xo" },
2792
+
.parent_data = (const struct clk_parent_data []) {
2793
+
{ .fw_name = "xo" },
2794
+
},
2796
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.num_parents = 1,
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.ops = &clk_branch2_ops,
2798
2797
},
···
2808
2803
.enable_mask = BIT(0),
2809
2804
.hw.init = &(struct clk_init_data){
2810
2805
.name = "gcc_pcie_clkref_clk",
2811
-
.parent_names = (const char *[]){ "xo" },
2806
+
.parent_data = (const struct clk_parent_data []) {
2807
+
{ .fw_name = "xo" },
2808
+
},
2812
2809
.num_parents = 1,
2813
2810
.ops = &clk_branch2_ops,
2814
2811
},
···
2824
2817
.enable_mask = BIT(0),
2825
2818
.hw.init = &(struct clk_init_data){
2826
2819
.name = "gcc_rx1_usb2_clkref_clk",
2827
-
.parent_names = (const char *[]){ "xo" },
2820
+
.parent_data = (const struct clk_parent_data []) {
2821
+
{ .fw_name = "xo" },
2822
+
},
2828
2823
.num_parents = 1,
2829
2824
.ops = &clk_branch2_ops,
2830
2825
},
···
3164
3155
.fast_io = true,
3165
3156
};
3166
3157
3167
-
static struct clk_hw *gcc_msm8998_hws[] = {
3168
-
&xo.hw,
3169
-
};
3170
-
3171
3158
static const struct qcom_cc_desc gcc_msm8998_desc = {
3172
3159
.config = &gcc_msm8998_regmap_config,
3173
3160
.clks = gcc_msm8998_clocks,
···
3172
3167
.num_resets = ARRAY_SIZE(gcc_msm8998_resets),
3173
3168
.gdscs = gcc_msm8998_gdscs,
3174
3169
.num_gdscs = ARRAY_SIZE(gcc_msm8998_gdscs),
3175
-
.clk_hws = gcc_msm8998_hws,
3176
-
.num_clk_hws = ARRAY_SIZE(gcc_msm8998_hws),
3177
3170
};
3178
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3179
3172
static int gcc_msm8998_probe(struct platform_device *pdev)