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drm/i915/ltphy: Define LT PHY PLL state verify function

Define function to verify the LT PHY PLL state function and call it
in intel_modeset_verify_crtc.

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://patch.msgid.link/20251101032513.4171255-24-suraj.kandpal@intel.com

+63 -1
+1 -1
drivers/gpu/drm/i915/display/intel_cx0_phy.c
··· 3575 3575 struct intel_encoder *encoder; 3576 3576 struct intel_cx0pll_state mpll_hw_state = {}; 3577 3577 3578 - if (DISPLAY_VER(display) < 14) 3578 + if (!IS_DISPLAY_VER(display, 14, 30)) 3579 3579 return; 3580 3580 3581 3581 if (!new_crtc_state->hw.active)
+56
drivers/gpu/drm/i915/display/intel_lt_phy.c
··· 1919 1919 intel_lt_phy_transaction_end(encoder, wakeref); 1920 1920 } 1921 1921 1922 + void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state, 1923 + struct intel_crtc *crtc) 1924 + { 1925 + struct intel_display *display = to_intel_display(state); 1926 + struct intel_digital_port *dig_port; 1927 + const struct intel_crtc_state *new_crtc_state = 1928 + intel_atomic_get_new_crtc_state(state, crtc); 1929 + struct intel_encoder *encoder; 1930 + struct intel_lt_phy_pll_state pll_hw_state = {}; 1931 + const struct intel_lt_phy_pll_state *pll_sw_state = &new_crtc_state->dpll_hw_state.ltpll; 1932 + int clock; 1933 + int i, j; 1934 + 1935 + if (DISPLAY_VER(display) < 35) 1936 + return; 1937 + 1938 + if (!new_crtc_state->hw.active) 1939 + return; 1940 + 1941 + /* intel_get_crtc_new_encoder() only works for modeset/fastset commits */ 1942 + if (!intel_crtc_needs_modeset(new_crtc_state) && 1943 + !intel_crtc_needs_fastset(new_crtc_state)) 1944 + return; 1945 + 1946 + encoder = intel_get_crtc_new_encoder(state, new_crtc_state); 1947 + intel_lt_phy_pll_readout_hw_state(encoder, new_crtc_state, &pll_hw_state); 1948 + clock = intel_lt_phy_calc_port_clock(encoder, new_crtc_state); 1949 + 1950 + dig_port = enc_to_dig_port(encoder); 1951 + if (intel_tc_port_in_tbt_alt_mode(dig_port)) 1952 + return; 1953 + 1954 + INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.clock != clock, 1955 + "[CRTC:%d:%s] mismatch in LT PHY: Register CLOCK (expected %d, found %d)", 1956 + crtc->base.base.id, crtc->base.name, 1957 + pll_sw_state->clock, pll_hw_state.clock); 1958 + 1959 + for (i = 0; i < 3; i++) { 1960 + INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.config[i] != pll_sw_state->config[i], 1961 + "[CRTC:%d:%s] mismatch in LT PHY PLL CONFIG%d: (expected 0x%04x, found 0x%04x)", 1962 + crtc->base.base.id, crtc->base.name, i, 1963 + pll_sw_state->config[i], pll_hw_state.config[i]); 1964 + } 1965 + 1966 + for (i = 0; i <= 12; i++) { 1967 + for (j = 3; j >= 0; j--) 1968 + INTEL_DISPLAY_STATE_WARN(display, 1969 + pll_hw_state.data[i][j] != 1970 + pll_sw_state->data[i][j], 1971 + "[CRTC:%d:%s] mismatch in LT PHY PLL DATA[%d][%d]: (expected 0x%04x, found 0x%04x)", 1972 + crtc->base.base.id, crtc->base.name, i, j, 1973 + pll_sw_state->data[i][j], pll_hw_state.data[i][j]); 1974 + } 1975 + } 1976 + 1922 1977 void intel_xe3plpd_pll_enable(struct intel_encoder *encoder, 1923 1978 const struct intel_crtc_state *crtc_state) 1924 1979 { ··· 1993 1938 intel_mtl_tbt_pll_disable(encoder); 1994 1939 else 1995 1940 intel_lt_phy_pll_disable(encoder); 1941 + 1996 1942 }
+4
drivers/gpu/drm/i915/display/intel_lt_phy.h
··· 8 8 9 9 #include <linux/types.h> 10 10 11 + struct intel_atomic_state; 11 12 struct intel_display; 12 13 struct intel_encoder; 13 14 struct intel_crtc_state; 15 + struct intel_crtc; 14 16 struct intel_lt_phy_pll_state; 15 17 16 18 void intel_lt_phy_pll_enable(struct intel_encoder *encoder, ··· 33 31 void intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder, 34 32 const struct intel_crtc_state *crtc_state, 35 33 struct intel_lt_phy_pll_state *pll_state); 34 + void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state, 35 + struct intel_crtc *crtc); 36 36 void intel_xe3plpd_pll_enable(struct intel_encoder *encoder, 37 37 const struct intel_crtc_state *crtc_state); 38 38 void intel_xe3plpd_pll_disable(struct intel_encoder *encoder);
+2
drivers/gpu/drm/i915/display/intel_modeset_verify.c
··· 16 16 #include "intel_display_core.h" 17 17 #include "intel_display_types.h" 18 18 #include "intel_fdi.h" 19 + #include "intel_lt_phy.h" 19 20 #include "intel_modeset_verify.h" 20 21 #include "intel_snps_phy.h" 21 22 #include "skl_watermark.h" ··· 247 246 intel_dpll_state_verify(state, crtc); 248 247 intel_mpllb_state_verify(state, crtc); 249 248 intel_cx0pll_state_verify(state, crtc); 249 + intel_lt_phy_pll_state_verify(state, crtc); 250 250 } 251 251 252 252 void intel_modeset_verify_disabled(struct intel_atomic_state *state)