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clk: qcom: dispcc-sm6125: Add missing MDSS resets

The MDSS resets were left undescribed. Add them to allow resetting the
display subsystem, which is necessary to avoid issues caused by state
left over from the bootloader on various platforms.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Val Packett <val@packett.cool>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260303034847.13870-5-val@packett.cool
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

authored by

Val Packett and committed by
Bjorn Andersson a09a80b4 67d41a92

+7
+7
drivers/clk/qcom/dispcc-sm6125.c
··· 17 17 #include "clk-regmap.h" 18 18 #include "common.h" 19 19 #include "gdsc.h" 20 + #include "reset.h" 20 21 21 22 enum { 22 23 P_BI_TCXO, ··· 608 607 }, 609 608 }; 610 609 610 + static const struct qcom_reset_map disp_cc_sm6125_resets[] = { 611 + [DISP_CC_MDSS_CORE_BCR] = { 0x2000 }, 612 + }; 613 + 611 614 static struct gdsc mdss_gdsc = { 612 615 .gdscr = 0x3000, 613 616 .pd = { ··· 668 663 .config = &disp_cc_sm6125_regmap_config, 669 664 .clks = disp_cc_sm6125_clocks, 670 665 .num_clks = ARRAY_SIZE(disp_cc_sm6125_clocks), 666 + .resets = disp_cc_sm6125_resets, 667 + .num_resets = ARRAY_SIZE(disp_cc_sm6125_resets), 671 668 .gdscs = disp_cc_sm6125_gdscs, 672 669 .num_gdscs = ARRAY_SIZE(disp_cc_sm6125_gdscs), 673 670 };