Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'riscv-for-linus-6.2-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V fixes from Palmer Dabbelt:
- A build fix to avoid static branches in cpu_relax(), which greatly
inflates the jump tables and breaks at least
CONFIG_CC_OPTIMIZE_FOR_SIZE=y.
- A fix for a kernel panic when probing impossible instruction
positions.
- A fix to disable unwind tables, which are enabled by default for
GCC-13 and result in unhandled relocations in modules.
* tag 'riscv-for-linus-6.2-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
riscv: disable generation of unwind tables
riscv: kprobe: Fixup kernel panic when probing an illegal position
riscv: Fix build with CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+33
-19
+3
arch/riscv/Makefile
+3
arch/riscv/Makefile
···
80
80
KBUILD_CFLAGS += -fno-omit-frame-pointer
81
81
endif
82
82
83
+
# Avoid generating .eh_frame sections.
84
+
KBUILD_CFLAGS += -fno-asynchronous-unwind-tables -fno-unwind-tables
85
+
83
86
KBUILD_CFLAGS_MODULE += $(call cc-option,-mno-relax)
84
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KBUILD_AFLAGS_MODULE += $(call as-option,-Wa$(comma)-mno-relax)
85
88
-3
arch/riscv/include/asm/hwcap.h
-3
arch/riscv/include/asm/hwcap.h
···
70
70
*/
71
71
enum riscv_isa_ext_key {
72
72
RISCV_ISA_EXT_KEY_FPU, /* For 'F' and 'D' */
73
-
RISCV_ISA_EXT_KEY_ZIHINTPAUSE,
74
73
RISCV_ISA_EXT_KEY_SVINVAL,
75
74
RISCV_ISA_EXT_KEY_MAX,
76
75
};
···
90
91
return RISCV_ISA_EXT_KEY_FPU;
91
92
case RISCV_ISA_EXT_d:
92
93
return RISCV_ISA_EXT_KEY_FPU;
93
-
case RISCV_ISA_EXT_ZIHINTPAUSE:
94
-
return RISCV_ISA_EXT_KEY_ZIHINTPAUSE;
95
94
case RISCV_ISA_EXT_SVINVAL:
96
95
return RISCV_ISA_EXT_KEY_SVINVAL;
97
96
default:
+12
-16
arch/riscv/include/asm/vdso/processor.h
+12
-16
arch/riscv/include/asm/vdso/processor.h
···
4
4
5
5
#ifndef __ASSEMBLY__
6
6
7
-
#include <linux/jump_label.h>
8
7
#include <asm/barrier.h>
9
-
#include <asm/hwcap.h>
10
8
11
9
static inline void cpu_relax(void)
12
10
{
13
-
if (!static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_ZIHINTPAUSE])) {
14
11
#ifdef __riscv_muldiv
15
-
int dummy;
16
-
/* In lieu of a halt instruction, induce a long-latency stall. */
17
-
__asm__ __volatile__ ("div %0, %0, zero" : "=r" (dummy));
12
+
int dummy;
13
+
/* In lieu of a halt instruction, induce a long-latency stall. */
14
+
__asm__ __volatile__ ("div %0, %0, zero" : "=r" (dummy));
18
15
#endif
19
-
} else {
20
-
/*
21
-
* Reduce instruction retirement.
22
-
* This assumes the PC changes.
23
-
*/
24
-
#ifdef CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE
25
-
__asm__ __volatile__ ("pause");
16
+
17
+
#ifdef __riscv_zihintpause
18
+
/*
19
+
* Reduce instruction retirement.
20
+
* This assumes the PC changes.
21
+
*/
22
+
__asm__ __volatile__ ("pause");
26
23
#else
27
-
/* Encoding of the pause instruction */
28
-
__asm__ __volatile__ (".4byte 0x100000F");
24
+
/* Encoding of the pause instruction */
25
+
__asm__ __volatile__ (".4byte 0x100000F");
29
26
#endif
30
-
}
31
27
barrier();
32
28
}
33
29
+18
arch/riscv/kernel/probes/kprobes.c
+18
arch/riscv/kernel/probes/kprobes.c
···
48
48
post_kprobe_handler(p, kcb, regs);
49
49
}
50
50
51
+
static bool __kprobes arch_check_kprobe(struct kprobe *p)
52
+
{
53
+
unsigned long tmp = (unsigned long)p->addr - p->offset;
54
+
unsigned long addr = (unsigned long)p->addr;
55
+
56
+
while (tmp <= addr) {
57
+
if (tmp == addr)
58
+
return true;
59
+
60
+
tmp += GET_INSN_LENGTH(*(u16 *)tmp);
61
+
}
62
+
63
+
return false;
64
+
}
65
+
51
66
int __kprobes arch_prepare_kprobe(struct kprobe *p)
52
67
{
53
68
unsigned long probe_addr = (unsigned long)p->addr;
54
69
55
70
if (probe_addr & 0x1)
71
+
return -EILSEQ;
72
+
73
+
if (!arch_check_kprobe(p))
56
74
return -EILSEQ;
57
75
58
76
/* copy instruction */