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PM / devfreq: rk3399_dmc: Use bitfield macro definitions for ODT_PD

We're going to add new usages, and it's cleaner to work with macros
instead of comments and magic numbers.

Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>

authored by

Brian Norris and committed by
Chanwoo Choi
a5ca1854 b82acf82

+24 -19
+24 -19
drivers/devfreq/rk3399_dmc.c
··· 5 5 */ 6 6 7 7 #include <linux/arm-smccc.h> 8 + #include <linux/bitfield.h> 8 9 #include <linux/clk.h> 9 10 #include <linux/delay.h> 10 11 #include <linux/devfreq.h> ··· 23 22 24 23 #include <soc/rockchip/rk3399_grf.h> 25 24 #include <soc/rockchip/rockchip_sip.h> 25 + 26 + #define RK3399_SET_ODT_PD_0_SR_IDLE GENMASK(7, 0) 27 + #define RK3399_SET_ODT_PD_0_SR_MC_GATE_IDLE GENMASK(15, 8) 28 + #define RK3399_SET_ODT_PD_0_STANDBY_IDLE GENMASK(31, 16) 29 + 30 + #define RK3399_SET_ODT_PD_1_PD_IDLE GENMASK(11, 0) 31 + #define RK3399_SET_ODT_PD_1_SRPD_LITE_IDLE GENMASK(27, 16) 32 + 33 + #define RK3399_SET_ODT_PD_2_ODT_ENABLE BIT(0) 26 34 27 35 struct rk3399_dmcfreq { 28 36 struct device *dev; ··· 65 55 unsigned long old_clk_rate = dmcfreq->rate; 66 56 unsigned long target_volt, target_rate; 67 57 struct arm_smccc_res res; 68 - bool odt_enable = false; 69 58 int err; 70 59 71 60 opp = devfreq_recommended_opp(dev, freq, flags); ··· 81 72 mutex_lock(&dmcfreq->lock); 82 73 83 74 if (dmcfreq->regmap_pmu) { 75 + unsigned int odt_pd_arg2 = 0; 76 + 84 77 if (target_rate >= dmcfreq->odt_dis_freq) 85 - odt_enable = true; 78 + odt_pd_arg2 |= RK3399_SET_ODT_PD_2_ODT_ENABLE; 86 79 87 80 /* 88 81 * This makes a SMC call to the TF-A to set the DDR PD ··· 94 83 arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, dmcfreq->odt_pd_arg0, 95 84 dmcfreq->odt_pd_arg1, 96 85 ROCKCHIP_SIP_CONFIG_DRAM_SET_ODT_PD, 97 - odt_enable, 0, 0, 0, &res); 86 + odt_pd_arg2, 0, 0, 0, &res); 98 87 } 99 88 100 89 /* ··· 327 316 /* 328 317 * In TF-A there is a platform SIP call to set the PD (power-down) 329 318 * timings and to enable or disable the ODT (on-die termination). 330 - * This call needs three arguments as follows: 331 - * 332 - * arg0: 333 - * bit[0-7] : sr_idle 334 - * bit[8-15] : sr_mc_gate_idle 335 - * bit[16-31] : standby idle 336 - * arg1: 337 - * bit[0-11] : pd_idle 338 - * bit[16-27] : srpd_lite_idle 339 - * arg2: 340 - * bit[0] : odt enable 341 319 */ 342 - data->odt_pd_arg0 = (data->sr_idle & 0xff) | 343 - ((data->sr_mc_gate_idle & 0xff) << 8) | 344 - ((data->standby_idle & 0xffff) << 16); 345 - data->odt_pd_arg1 = (data->pd_idle & 0xfff) | 346 - ((data->srpd_lite_idle & 0xfff) << 16); 320 + data->odt_pd_arg0 = 321 + FIELD_PREP(RK3399_SET_ODT_PD_0_SR_IDLE, data->sr_idle) | 322 + FIELD_PREP(RK3399_SET_ODT_PD_0_SR_MC_GATE_IDLE, 323 + data->sr_mc_gate_idle) | 324 + FIELD_PREP(RK3399_SET_ODT_PD_0_STANDBY_IDLE, 325 + data->standby_idle); 326 + data->odt_pd_arg1 = 327 + FIELD_PREP(RK3399_SET_ODT_PD_1_PD_IDLE, data->pd_idle) | 328 + FIELD_PREP(RK3399_SET_ODT_PD_1_SRPD_LITE_IDLE, 329 + data->srpd_lite_idle); 347 330 348 331 /* 349 332 * We add a devfreq driver to our parent since it has a device tree node