tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

clk: samsung: fsd: do not define number of clocks in bindings

Number of clocks supported by Linux drivers might vary - sometimes we
add new clocks, not exposed previously. Therefore these numbers of
clocks should not be in the bindings, as that prevents changing them.

Define number of clocks per each clock controller inside the driver
directly.

Signed-off-by: Inbaraj E <inbaraj.e@samsung.com>
Link: https://lore.kernel.org/r/20240917094355.37887-2-inbaraj.e@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

authored by

Inbaraj E and committed by
Krzysztof Kozlowski a86ffa40 97fd5d44

+16 -7
+16 -7
drivers/clk/samsung/clk-fsd.c
··· 82 82 #define GAT_CMU_NS_BRDG_CMU_IPCLKPORT_CLK__PSOC_CMU__CLK_CMU 0x205c 83 83 #define GAT_CMU_SYSREG_CMU_IPCLKPORT_PCLK 0x2060 84 84 85 + /* NOTE: Must be equal to the last clock ID increased by one */ 86 + #define CLKS_NR_CMU (GAT_CMU_FSYS0_SHARED0DIV4 + 1) 87 + #define CLKS_NR_PERIC (PERIC_DOUT_RGMII_CLK + 1) 88 + #define CLKS_NR_FSYS0 (FSYS0_DOUT_FSYS0_PERIBUS_GRP + 1) 89 + #define CLKS_NR_FSYS1 (PCIE_LINK1_IPCLKPORT_SLV_ACLK + 1) 90 + #define CLKS_NR_IMEM (IMEM_TMU_GT_IPCLKPORT_I_CLK_TS + 1) 91 + #define CLKS_NR_MFC (MFC_MFC_IPCLKPORT_ACLK + 1) 92 + #define CLKS_NR_CAM_CSI (CAM_CSI2_3_IPCLKPORT_I_ACLK + 1) 93 + 85 94 static const unsigned long cmu_clk_regs[] __initconst = { 86 95 PLL_LOCKTIME_PLL_SHARED0, 87 96 PLL_LOCKTIME_PLL_SHARED1, ··· 309 300 .nr_div_clks = ARRAY_SIZE(cmu_div_clks), 310 301 .gate_clks = cmu_gate_clks, 311 302 .nr_gate_clks = ARRAY_SIZE(cmu_gate_clks), 312 - .nr_clk_ids = CMU_NR_CLK, 303 + .nr_clk_ids = CLKS_NR_CMU, 313 304 .clk_regs = cmu_clk_regs, 314 305 .nr_clk_regs = ARRAY_SIZE(cmu_clk_regs), 315 306 }; ··· 674 665 .nr_gate_clks = ARRAY_SIZE(peric_gate_clks), 675 666 .fixed_clks = peric_fixed_clks, 676 667 .nr_fixed_clks = ARRAY_SIZE(peric_fixed_clks), 677 - .nr_clk_ids = PERIC_NR_CLK, 668 + .nr_clk_ids = CLKS_NR_PERIC, 678 669 .clk_regs = peric_clk_regs, 679 670 .nr_clk_regs = ARRAY_SIZE(peric_clk_regs), 680 671 .clk_name = "dout_cmu_pll_shared0_div4", ··· 973 964 .nr_gate_clks = ARRAY_SIZE(fsys0_gate_clks), 974 965 .fixed_clks = fsys0_fixed_clks, 975 966 .nr_fixed_clks = ARRAY_SIZE(fsys0_fixed_clks), 976 - .nr_clk_ids = FSYS0_NR_CLK, 967 + .nr_clk_ids = CLKS_NR_FSYS0, 977 968 .clk_regs = fsys0_clk_regs, 978 969 .nr_clk_regs = ARRAY_SIZE(fsys0_clk_regs), 979 970 .clk_name = "dout_cmu_fsys0_shared1div4", ··· 1145 1136 .nr_gate_clks = ARRAY_SIZE(fsys1_gate_clks), 1146 1137 .fixed_clks = fsys1_fixed_clks, 1147 1138 .nr_fixed_clks = ARRAY_SIZE(fsys1_fixed_clks), 1148 - .nr_clk_ids = FSYS1_NR_CLK, 1139 + .nr_clk_ids = CLKS_NR_FSYS1, 1149 1140 .clk_regs = fsys1_clk_regs, 1150 1141 .nr_clk_regs = ARRAY_SIZE(fsys1_clk_regs), 1151 1142 .clk_name = "dout_cmu_fsys1_shared0div4", ··· 1422 1413 .nr_div_clks = ARRAY_SIZE(imem_div_clks), 1423 1414 .gate_clks = imem_gate_clks, 1424 1415 .nr_gate_clks = ARRAY_SIZE(imem_gate_clks), 1425 - .nr_clk_ids = IMEM_NR_CLK, 1416 + .nr_clk_ids = CLKS_NR_IMEM, 1426 1417 .clk_regs = imem_clk_regs, 1427 1418 .nr_clk_regs = ARRAY_SIZE(imem_clk_regs), 1428 1419 }; ··· 1547 1538 .nr_div_clks = ARRAY_SIZE(mfc_div_clks), 1548 1539 .gate_clks = mfc_gate_clks, 1549 1540 .nr_gate_clks = ARRAY_SIZE(mfc_gate_clks), 1550 - .nr_clk_ids = MFC_NR_CLK, 1541 + .nr_clk_ids = CLKS_NR_MFC, 1551 1542 .clk_regs = mfc_clk_regs, 1552 1543 .nr_clk_regs = ARRAY_SIZE(mfc_clk_regs), 1553 1544 }; ··· 1751 1742 .nr_div_clks = ARRAY_SIZE(cam_csi_div_clks), 1752 1743 .gate_clks = cam_csi_gate_clks, 1753 1744 .nr_gate_clks = ARRAY_SIZE(cam_csi_gate_clks), 1754 - .nr_clk_ids = CAM_CSI_NR_CLK, 1745 + .nr_clk_ids = CLKS_NR_CAM_CSI, 1755 1746 .clk_regs = cam_csi_clk_regs, 1756 1747 .nr_clk_regs = ARRAY_SIZE(cam_csi_clk_regs), 1757 1748 };