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Merge tag 'sound-4.4-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound fixes from Takashi Iwai:
"This shouldn't be a nightmare before Christmas: just a handful small
device-specific fixes for various ASoC and HD-audio drivers. Most of
them are stable fixes"

* tag 'sound-4.4-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
ALSA: hda/realtek - Fix silent headphone output on MacPro 4,1 (v2)
ASoC: fsl_sai: fix no frame clk in master mode
ALSA: hda - Set SKL+ hda controller power at freeze() and thaw()
ASoC: sgtl5000: fix VAG power up timing
ASoC: rockchip: spdif: Set transmit data level to 16 samples
ASoC: wm8974: set cache type for regmap
ASoC: es8328: Fix shifts for mixer switches
ASoC: davinci-mcasp: Fix XDATA check in mcasp_start_tx
ASoC: es8328: Fix deemphasis values

+88 -15
+34
sound/pci/hda/hda_intel.c
··· 954 954 } 955 955 #endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */ 956 956 957 + #ifdef CONFIG_PM_SLEEP 958 + /* put codec down to D3 at hibernation for Intel SKL+; 959 + * otherwise BIOS may still access the codec and screw up the driver 960 + */ 961 + #define IS_SKL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa170) 962 + #define IS_SKL_LP(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x9d70) 963 + #define IS_BXT(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x5a98) 964 + #define IS_SKL_PLUS(pci) (IS_SKL(pci) || IS_SKL_LP(pci) || IS_BXT(pci)) 965 + 966 + static int azx_freeze_noirq(struct device *dev) 967 + { 968 + struct pci_dev *pci = to_pci_dev(dev); 969 + 970 + if (IS_SKL_PLUS(pci)) 971 + pci_set_power_state(pci, PCI_D3hot); 972 + 973 + return 0; 974 + } 975 + 976 + static int azx_thaw_noirq(struct device *dev) 977 + { 978 + struct pci_dev *pci = to_pci_dev(dev); 979 + 980 + if (IS_SKL_PLUS(pci)) 981 + pci_set_power_state(pci, PCI_D0); 982 + 983 + return 0; 984 + } 985 + #endif /* CONFIG_PM_SLEEP */ 986 + 957 987 #ifdef CONFIG_PM 958 988 static int azx_runtime_suspend(struct device *dev) 959 989 { ··· 1093 1063 1094 1064 static const struct dev_pm_ops azx_pm = { 1095 1065 SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume) 1066 + #ifdef CONFIG_PM_SLEEP 1067 + .freeze_noirq = azx_freeze_noirq, 1068 + .thaw_noirq = azx_thaw_noirq, 1069 + #endif 1096 1070 SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle) 1097 1071 }; 1098 1072
+9 -2
sound/pci/hda/patch_realtek.c
··· 1775 1775 ALC889_FIXUP_MBA11_VREF, 1776 1776 ALC889_FIXUP_MBA21_VREF, 1777 1777 ALC889_FIXUP_MP11_VREF, 1778 + ALC889_FIXUP_MP41_VREF, 1778 1779 ALC882_FIXUP_INV_DMIC, 1779 1780 ALC882_FIXUP_NO_PRIMARY_HP, 1780 1781 ALC887_FIXUP_ASUS_BASS, ··· 1864 1863 const struct hda_fixup *fix, int action) 1865 1864 { 1866 1865 struct alc_spec *spec = codec->spec; 1867 - static hda_nid_t nids[2] = { 0x14, 0x15 }; 1866 + static hda_nid_t nids[3] = { 0x14, 0x15, 0x19 }; 1868 1867 int i; 1869 1868 1870 1869 if (action != HDA_FIXUP_ACT_INIT) ··· 2154 2153 .chained = true, 2155 2154 .chain_id = ALC885_FIXUP_MACPRO_GPIO, 2156 2155 }, 2156 + [ALC889_FIXUP_MP41_VREF] = { 2157 + .type = HDA_FIXUP_FUNC, 2158 + .v.func = alc889_fixup_mbp_vref, 2159 + .chained = true, 2160 + .chain_id = ALC885_FIXUP_MACPRO_GPIO, 2161 + }, 2157 2162 [ALC882_FIXUP_INV_DMIC] = { 2158 2163 .type = HDA_FIXUP_FUNC, 2159 2164 .v.func = alc_fixup_inv_dmic, ··· 2242 2235 SND_PCI_QUIRK(0x106b, 0x3f00, "Macbook 5,1", ALC889_FIXUP_IMAC91_VREF), 2243 2236 SND_PCI_QUIRK(0x106b, 0x4000, "MacbookPro 5,1", ALC889_FIXUP_IMAC91_VREF), 2244 2237 SND_PCI_QUIRK(0x106b, 0x4100, "Macmini 3,1", ALC889_FIXUP_IMAC91_VREF), 2245 - SND_PCI_QUIRK(0x106b, 0x4200, "Mac Pro 5,1", ALC885_FIXUP_MACPRO_GPIO), 2238 + SND_PCI_QUIRK(0x106b, 0x4200, "Mac Pro 4,1/5,1", ALC889_FIXUP_MP41_VREF), 2246 2239 SND_PCI_QUIRK(0x106b, 0x4300, "iMac 9,1", ALC889_FIXUP_IMAC91_VREF), 2247 2240 SND_PCI_QUIRK(0x106b, 0x4600, "MacbookPro 5,2", ALC889_FIXUP_IMAC91_VREF), 2248 2241 SND_PCI_QUIRK(0x106b, 0x4900, "iMac 9,1 Aluminum", ALC889_FIXUP_IMAC91_VREF),
+17 -8
sound/soc/codecs/es8328.c
··· 85 85 static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0); 86 86 static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 300, 0); 87 87 88 - static const int deemph_settings[] = { 0, 32000, 44100, 48000 }; 88 + static const struct { 89 + int rate; 90 + unsigned int val; 91 + } deemph_settings[] = { 92 + { 0, ES8328_DACCONTROL6_DEEMPH_OFF }, 93 + { 32000, ES8328_DACCONTROL6_DEEMPH_32k }, 94 + { 44100, ES8328_DACCONTROL6_DEEMPH_44_1k }, 95 + { 48000, ES8328_DACCONTROL6_DEEMPH_48k }, 96 + }; 89 97 90 98 static int es8328_set_deemph(struct snd_soc_codec *codec) 91 99 { ··· 105 97 * rate. 106 98 */ 107 99 if (es8328->deemph) { 108 - best = 1; 109 - for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) { 110 - if (abs(deemph_settings[i] - es8328->playback_fs) < 111 - abs(deemph_settings[best] - es8328->playback_fs)) 100 + best = 0; 101 + for (i = 1; i < ARRAY_SIZE(deemph_settings); i++) { 102 + if (abs(deemph_settings[i].rate - es8328->playback_fs) < 103 + abs(deemph_settings[best].rate - es8328->playback_fs)) 112 104 best = i; 113 105 } 114 106 115 - val = best << 1; 107 + val = deemph_settings[best].val; 116 108 } else { 117 - val = 0; 109 + val = ES8328_DACCONTROL6_DEEMPH_OFF; 118 110 } 119 111 120 112 dev_dbg(codec->dev, "Set deemphasis %d\n", val); 121 113 122 - return snd_soc_update_bits(codec, ES8328_DACCONTROL6, 0x6, val); 114 + return snd_soc_update_bits(codec, ES8328_DACCONTROL6, 115 + ES8328_DACCONTROL6_DEEMPH_MASK, val); 123 116 } 124 117 125 118 static int es8328_get_deemph(struct snd_kcontrol *kcontrol,
+1
sound/soc/codecs/es8328.h
··· 153 153 #define ES8328_DACCONTROL6_CLICKFREE (1 << 3) 154 154 #define ES8328_DACCONTROL6_DAC_INVR (1 << 4) 155 155 #define ES8328_DACCONTROL6_DAC_INVL (1 << 5) 156 + #define ES8328_DACCONTROL6_DEEMPH_MASK (3 << 6) 156 157 #define ES8328_DACCONTROL6_DEEMPH_OFF (0 << 6) 157 158 #define ES8328_DACCONTROL6_DEEMPH_32k (1 << 6) 158 159 #define ES8328_DACCONTROL6_DEEMPH_44_1k (2 << 6)
+1
sound/soc/codecs/sgtl5000.c
··· 189 189 case SND_SOC_DAPM_POST_PMU: 190 190 snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER, 191 191 SGTL5000_VAG_POWERUP, SGTL5000_VAG_POWERUP); 192 + msleep(400); 192 193 break; 193 194 194 195 case SND_SOC_DAPM_PRE_PMD:
+1
sound/soc/codecs/wm8974.c
··· 574 574 .max_register = WM8974_MONOMIX, 575 575 .reg_defaults = wm8974_reg_defaults, 576 576 .num_reg_defaults = ARRAY_SIZE(wm8974_reg_defaults), 577 + .cache_type = REGCACHE_FLAT, 577 578 }; 578 579 579 580 static int wm8974_probe(struct snd_soc_codec *codec)
+2 -2
sound/soc/davinci/davinci-mcasp.c
··· 223 223 224 224 /* wait for XDATA to be cleared */ 225 225 cnt = 0; 226 - while (!(mcasp_get_reg(mcasp, DAVINCI_MCASP_TXSTAT_REG) & 227 - ~XRDATA) && (cnt < 100000)) 226 + while ((mcasp_get_reg(mcasp, DAVINCI_MCASP_TXSTAT_REG) & XRDATA) && 227 + (cnt < 100000)) 228 228 cnt++; 229 229 230 230 /* Release TX state machine */
+18
sound/soc/fsl/fsl_sai.c
··· 505 505 FSL_SAI_CSR_FR, FSL_SAI_CSR_FR); 506 506 regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 507 507 FSL_SAI_CSR_FR, FSL_SAI_CSR_FR); 508 + 509 + /* 510 + * For sai master mode, after several open/close sai, 511 + * there will be no frame clock, and can't recover 512 + * anymore. Add software reset to fix this issue. 513 + * This is a hardware bug, and will be fix in the 514 + * next sai version. 515 + */ 516 + if (!sai->is_slave_mode) { 517 + /* Software Reset for both Tx and Rx */ 518 + regmap_write(sai->regmap, 519 + FSL_SAI_TCSR, FSL_SAI_CSR_SR); 520 + regmap_write(sai->regmap, 521 + FSL_SAI_RCSR, FSL_SAI_CSR_SR); 522 + /* Clear SR bit to finish the reset */ 523 + regmap_write(sai->regmap, FSL_SAI_TCSR, 0); 524 + regmap_write(sai->regmap, FSL_SAI_RCSR, 0); 525 + } 508 526 } 509 527 break; 510 528 default:
+4 -2
sound/soc/rockchip/rockchip_spdif.c
··· 152 152 case SNDRV_PCM_TRIGGER_RESUME: 153 153 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 154 154 ret = regmap_update_bits(spdif->regmap, SPDIF_DMACR, 155 - SPDIF_DMACR_TDE_ENABLE, 156 - SPDIF_DMACR_TDE_ENABLE); 155 + SPDIF_DMACR_TDE_ENABLE | 156 + SPDIF_DMACR_TDL_MASK, 157 + SPDIF_DMACR_TDE_ENABLE | 158 + SPDIF_DMACR_TDL(16)); 157 159 158 160 if (ret != 0) 159 161 return ret;
+1 -1
sound/soc/rockchip/rockchip_spdif.h
··· 42 42 43 43 #define SPDIF_DMACR_TDL_SHIFT 0 44 44 #define SPDIF_DMACR_TDL(x) ((x) << SPDIF_DMACR_TDL_SHIFT) 45 - #define SPDIF_DMACR_TDL_MASK (0x1f << SDPIF_DMACR_TDL_SHIFT) 45 + #define SPDIF_DMACR_TDL_MASK (0x1f << SPDIF_DMACR_TDL_SHIFT) 46 46 47 47 /* 48 48 * XFER