Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
phy: rockchip: samsung-hdptx: Switch to driver specific HDMI config
In preparation to support the FRL operation mode which gets configured
via the lanes and rate per lane tuple, switch to a driver specific
struct for configuring the link rate and bpc.
This simplifies and optimizes the implementation by allowing implicit
switches between TMDS and FRL rates, without requiring additional checks
of the active PHY mode followed by recalculations of the link rate when
operating in FRL mode.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://patch.msgid.link/20260113-phy-hdptx-frl-v6-9-8d5f97419c0b@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
authored by
Cristian Ciocaltea
and committed by
Vinod Koul
ac079c12
66d76b6d
+26
-21
+26
-21
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
+26
-21
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
···
373
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unsigned int phy_ids[MAX_HDPTX_PHY_NUM];
374
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};
375
375
376
+
struct rk_hdptx_hdmi_cfg {
377
+
unsigned long long rate;
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+
unsigned int bpc;
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+
};
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+
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struct rk_hdptx_phy {
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struct device *dev;
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struct regmap *regmap;
···
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int phy_id;
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struct phy *phy;
388
-
struct phy_configure_opts_hdmi hdmi_cfg;
383
+
struct rk_hdptx_hdmi_cfg hdmi_cfg;
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struct clk_bulk_data *clks;
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int nr_clks;
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struct reset_control_bulk_data rsts[RST_MAX];
···
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932
struct ropll_config rc = {0};
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int i;
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940
-
if (!hdptx->hdmi_cfg.tmds_char_rate)
935
+
if (!hdptx->hdmi_cfg.rate)
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return 0;
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943
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for (i = 0; i < ARRAY_SIZE(rk_hdptx_tmds_ropll_cfg); i++)
944
-
if (hdptx->hdmi_cfg.tmds_char_rate == rk_hdptx_tmds_ropll_cfg[i].rate) {
939
+
if (hdptx->hdmi_cfg.rate == rk_hdptx_tmds_ropll_cfg[i].rate) {
945
940
cfg = &rk_hdptx_tmds_ropll_cfg[i];
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941
break;
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}
948
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949
944
if (!cfg) {
950
-
if (!rk_hdptx_phy_clk_pll_calc(hdptx->hdmi_cfg.tmds_char_rate, &rc)) {
945
+
if (!rk_hdptx_phy_clk_pll_calc(hdptx->hdmi_cfg.rate, &rc)) {
951
946
dev_err(hdptx->dev, "%s cannot find pll cfg for rate=%llu\n",
952
-
__func__, hdptx->hdmi_cfg.tmds_char_rate);
947
+
__func__, hdptx->hdmi_cfg.rate);
953
948
return -EINVAL;
954
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}
955
950
···
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}
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dev_dbg(hdptx->dev, "%s rate=%llu mdiv=%u sdiv=%u sdm_en=%u k_sign=%u k=%u lc=%u\n",
960
-
__func__, hdptx->hdmi_cfg.tmds_char_rate, cfg->pms_mdiv, cfg->pms_sdiv + 1,
955
+
__func__, hdptx->hdmi_cfg.rate, cfg->pms_mdiv, cfg->pms_sdiv + 1,
961
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cfg->sdm_en, cfg->sdm_num_sign, cfg->sdm_num, cfg->sdm_deno);
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rk_hdptx_pre_power_up(hdptx);
···
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1001
1007
1002
regmap_write(hdptx->regmap, LNTOP_REG(0200), 0x06);
1008
1003
1009
-
if (hdptx->hdmi_cfg.tmds_char_rate > HDMI14_MAX_RATE) {
1004
+
if (hdptx->hdmi_cfg.rate > HDMI14_MAX_RATE) {
1010
1005
/* For 1/40 bitrate clk */
1011
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rk_hdptx_multi_reg_write(hdptx, rk_hdptx_tmds_lntop_highbr_seq);
1012
1007
} else {
···
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1372
int ret, lane;
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1374
if (mode != PHY_MODE_DP) {
1380
-
if (!hdptx->hdmi_cfg.tmds_char_rate) {
1375
+
if (!hdptx->hdmi_cfg.rate) {
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/*
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* FIXME: Temporary workaround to setup TMDS char rate
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* from the RK DW HDMI QP bridge driver.
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* Will be removed as soon the switch to the HDMI PHY
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* configuration API has been completed on both ends.
1386
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*/
1387
-
hdptx->hdmi_cfg.tmds_char_rate = phy_get_bus_width(hdptx->phy) & 0xfffffff;
1388
-
hdptx->hdmi_cfg.tmds_char_rate *= 100;
1382
+
hdptx->hdmi_cfg.rate = phy_get_bus_width(hdptx->phy) & 0xfffffff;
1383
+
hdptx->hdmi_cfg.rate *= 100;
1389
1384
}
1390
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1386
dev_dbg(hdptx->dev, "%s rate=%llu bpc=%u\n", __func__,
1392
-
hdptx->hdmi_cfg.tmds_char_rate, hdptx->hdmi_cfg.bpc);
1387
+
hdptx->hdmi_cfg.rate, hdptx->hdmi_cfg.bpc);
1393
1388
}
1394
1389
1395
1390
ret = rk_hdptx_phy_consumer_get(hdptx);
···
1736
1731
if (ret) {
1737
1732
dev_err(hdptx->dev, "invalid hdmi params for phy configure\n");
1738
1733
} else {
1739
-
hdptx->hdmi_cfg = opts->hdmi;
1734
+
hdptx->hdmi_cfg.rate = opts->hdmi.tmds_char_rate;
1735
+
hdptx->hdmi_cfg.bpc = opts->hdmi.bpc;
1740
1736
hdptx->restrict_rate_change = true;
1741
1737
}
1742
1738
1743
1739
dev_dbg(hdptx->dev, "%s rate=%llu bpc=%u\n", __func__,
1744
-
hdptx->hdmi_cfg.tmds_char_rate, hdptx->hdmi_cfg.bpc);
1740
+
hdptx->hdmi_cfg.rate, hdptx->hdmi_cfg.bpc);
1745
1741
return ret;
1746
1742
}
1747
1743
···
1922
1916
* To be dropped as soon as the RK DW HDMI QP bridge driver
1923
1917
* switches to make use of phy_configure().
1924
1918
*/
1925
-
if (!hdptx->restrict_rate_change && req->rate != hdptx->hdmi_cfg.tmds_char_rate) {
1919
+
if (!hdptx->restrict_rate_change && req->rate != hdptx->hdmi_cfg.rate) {
1926
1920
struct phy_configure_opts_hdmi hdmi = {
1927
1921
.tmds_char_rate = req->rate,
1928
1922
};
···
1931
1925
if (ret)
1932
1926
return ret;
1933
1927
1934
-
hdptx->hdmi_cfg = hdmi;
1928
+
hdptx->hdmi_cfg.rate = req->rate;
1935
1929
}
1936
1930
1937
1931
/*
···
1939
1933
* hence ensure rk_hdptx_phy_clk_set_rate() won't be invoked with
1940
1934
* a different rate argument.
1941
1935
*/
1942
-
req->rate = DIV_ROUND_CLOSEST_ULL(hdptx->hdmi_cfg.tmds_char_rate * 8,
1943
-
hdptx->hdmi_cfg.bpc);
1936
+
req->rate = DIV_ROUND_CLOSEST_ULL(hdptx->hdmi_cfg.rate * 8, hdptx->hdmi_cfg.bpc);
1944
1937
1945
1938
return 0;
1946
1939
}
···
1950
1945
struct rk_hdptx_phy *hdptx = to_rk_hdptx_phy(hw);
1951
1946
unsigned long long tmds_rate = DIV_ROUND_CLOSEST_ULL(rate * hdptx->hdmi_cfg.bpc, 8);
1952
1947
1953
-
/* Revert any unlikely TMDS char rate change since round_rate() */
1954
-
if (hdptx->hdmi_cfg.tmds_char_rate != tmds_rate) {
1948
+
/* Revert any unlikely TMDS char rate change since determine_rate() */
1949
+
if (hdptx->hdmi_cfg.rate != tmds_rate) {
1955
1950
dev_warn(hdptx->dev, "Reverting unexpected rate change from %llu to %llu\n",
1956
-
tmds_rate, hdptx->hdmi_cfg.tmds_char_rate);
1957
-
hdptx->hdmi_cfg.tmds_char_rate = tmds_rate;
1951
+
tmds_rate, hdptx->hdmi_cfg.rate);
1952
+
hdptx->hdmi_cfg.rate = tmds_rate;
1958
1953
}
1959
1954
1960
1955
/*