Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
gpio: tegra186: Add support for Tegra264
Extend the existing Tegra186 GPIO controller driver with support for the
GPIO controller found on Tegra264.
Use the "wakeup-parent" phandle from the GPIO device tree node to
ensure the GPIO driver associates with the intended PMC device.
Relying only on compatible-based lookup can select an unexpected
PMC node, so fall back to compatible-based lookup when the phandle
is not present.
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://patch.msgid.link/20260128085114.1137725-2-pshete@nvidia.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
authored by
Prathamesh Shete
and committed by
Bartosz Golaszewski
af9b4a56
b565717e
+88
-2
+88
-2
drivers/gpio/gpio-tegra186.c
+88
-2
drivers/gpio/gpio-tegra186.c
···
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1
// SPDX-License-Identifier: GPL-2.0-only
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/*
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-
* Copyright (c) 2016-2025 NVIDIA Corporation
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* Copyright (c) 2016-2026 NVIDIA Corporation
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*
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* Author: Thierry Reding <treding@nvidia.com>
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* Dipen Patel <dpatel@nvidia.com>
···
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#include <dt-bindings/gpio/tegra234-gpio.h>
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#include <dt-bindings/gpio/tegra241-gpio.h>
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#include <dt-bindings/gpio/tegra256-gpio.h>
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#include <dt-bindings/gpio/nvidia,tegra264-gpio.h>
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/* security registers */
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#define TEGRA186_GPIO_CTL_SCR 0x0c
···
1002
1001
if (gpio->soc->num_irqs_per_bank > 1)
1003
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tegra186_gpio_init_route_mapping(gpio);
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1005
-
np = of_find_matching_node(NULL, tegra186_pmc_of_match);
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+
np = of_parse_phandle(pdev->dev.of_node, "wakeup-parent", 0);
1005
+
if (!np)
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np = of_find_matching_node(NULL, tegra186_pmc_of_match);
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if (np) {
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if (of_device_is_available(np)) {
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irq->parent_domain = irq_find_host(np);
···
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.has_vm_support = false,
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};
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+
#define TEGRA264_MAIN_GPIO_PORT(_name, _bank, _port, _pins) \
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TEGRA_GPIO_PORT(TEGRA264_MAIN, _name, _bank, _port, _pins)
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+
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static const struct tegra_gpio_port tegra264_main_ports[] = {
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TEGRA264_MAIN_GPIO_PORT(F, 3, 0, 8),
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TEGRA264_MAIN_GPIO_PORT(G, 3, 1, 5),
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TEGRA264_MAIN_GPIO_PORT(H, 1, 0, 8),
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TEGRA264_MAIN_GPIO_PORT(J, 1, 1, 8),
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TEGRA264_MAIN_GPIO_PORT(K, 1, 2, 8),
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TEGRA264_MAIN_GPIO_PORT(L, 1, 3, 8),
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TEGRA264_MAIN_GPIO_PORT(M, 1, 4, 6),
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TEGRA264_MAIN_GPIO_PORT(P, 2, 0, 8),
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TEGRA264_MAIN_GPIO_PORT(Q, 2, 1, 8),
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TEGRA264_MAIN_GPIO_PORT(R, 2, 2, 8),
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TEGRA264_MAIN_GPIO_PORT(S, 2, 3, 2),
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TEGRA264_MAIN_GPIO_PORT(T, 0, 0, 7),
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TEGRA264_MAIN_GPIO_PORT(U, 0, 1, 8),
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TEGRA264_MAIN_GPIO_PORT(V, 0, 2, 8),
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TEGRA264_MAIN_GPIO_PORT(W, 0, 3, 8),
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TEGRA264_MAIN_GPIO_PORT(X, 0, 7, 6),
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TEGRA264_MAIN_GPIO_PORT(Y, 0, 5, 8),
1301
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TEGRA264_MAIN_GPIO_PORT(Z, 0, 6, 8),
1302
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TEGRA264_MAIN_GPIO_PORT(AL, 0, 4, 3),
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+
};
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+
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static const struct tegra_gpio_soc tegra264_main_soc = {
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.num_ports = ARRAY_SIZE(tegra264_main_ports),
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.ports = tegra264_main_ports,
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.name = "tegra264-gpio",
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.instance = 0,
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.num_irqs_per_bank = 8,
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.has_vm_support = true,
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+
};
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+
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#define TEGRA264_AON_GPIO_PORT(_name, _bank, _port, _pins) \
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TEGRA_GPIO_PORT(TEGRA264_AON, _name, _bank, _port, _pins)
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+
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static const struct tegra_gpio_port tegra264_aon_ports[] = {
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TEGRA264_AON_GPIO_PORT(AA, 0, 0, 8),
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TEGRA264_AON_GPIO_PORT(BB, 0, 1, 2),
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TEGRA264_AON_GPIO_PORT(CC, 0, 2, 8),
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TEGRA264_AON_GPIO_PORT(DD, 0, 3, 8),
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TEGRA264_AON_GPIO_PORT(EE, 0, 4, 4)
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};
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+
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+
static const struct tegra_gpio_soc tegra264_aon_soc = {
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.num_ports = ARRAY_SIZE(tegra264_aon_ports),
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.ports = tegra264_aon_ports,
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.name = "tegra264-gpio-aon",
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.instance = 1,
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.num_irqs_per_bank = 8,
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.has_vm_support = true,
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};
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+
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#define TEGRA264_UPHY_GPIO_PORT(_name, _bank, _port, _pins) \
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TEGRA_GPIO_PORT(TEGRA264_UPHY, _name, _bank, _port, _pins)
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+
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static const struct tegra_gpio_port tegra264_uphy_ports[] = {
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TEGRA264_UPHY_GPIO_PORT(A, 0, 0, 6),
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TEGRA264_UPHY_GPIO_PORT(B, 0, 1, 8),
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TEGRA264_UPHY_GPIO_PORT(C, 0, 2, 3),
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TEGRA264_UPHY_GPIO_PORT(D, 1, 0, 8),
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TEGRA264_UPHY_GPIO_PORT(E, 1, 1, 4),
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};
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+
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static const struct tegra_gpio_soc tegra264_uphy_soc = {
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.num_ports = ARRAY_SIZE(tegra264_uphy_ports),
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.ports = tegra264_uphy_ports,
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.name = "tegra264-gpio-uphy",
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.instance = 2,
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.num_irqs_per_bank = 8,
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+
.has_vm_support = true,
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+
};
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+
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#define TEGRA256_MAIN_GPIO_PORT(_name, _bank, _port, _pins) \
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TEGRA_GPIO_PORT(TEGRA256_MAIN, _name, _bank, _port, _pins)
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1356
···
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}, {
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.compatible = "nvidia,tegra256-gpio",
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.data = &tegra256_main_soc
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+
}, {
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.compatible = "nvidia,tegra264-gpio",
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.data = &tegra264_main_soc
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+
}, {
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.compatible = "nvidia,tegra264-gpio-aon",
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.data = &tegra264_aon_soc
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+
}, {
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.compatible = "nvidia,tegra264-gpio-uphy",
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.data = &tegra264_uphy_soc
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}, {
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/* sentinel */
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}