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drm/amd/ras: add append func for pmfw eeprom

add append func for pmfw eeprom

Signed-off-by: Gangliang Xie <ganglxie@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Gangliang Xie and committed by
Alex Deucher
b18475fb 50428065

+48 -3
+39
drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.c
··· 220 220 221 221 return ret; 222 222 } 223 + 224 + int ras_fw_eeprom_append(struct ras_core_context *ras_core, 225 + struct eeprom_umc_record *record, const u32 num) 226 + { 227 + struct ras_fw_eeprom_control *control = &ras_core->ras_fw_eeprom; 228 + int threshold_config = control->record_threshold_config; 229 + int i, bad_page_count; 230 + 231 + mutex_lock(&control->ras_tbl_mutex); 232 + 233 + for (i = 0; i < num; i++) { 234 + /* update bad channel bitmap */ 235 + if ((record[i].mem_channel < BITS_PER_TYPE(control->bad_channel_bitmap)) && 236 + !(control->bad_channel_bitmap & (1 << record[i].mem_channel))) { 237 + control->bad_channel_bitmap |= 1 << record[i].mem_channel; 238 + control->update_channel_flag = true; 239 + } 240 + } 241 + control->ras_num_recs += num; 242 + 243 + bad_page_count = ras_umc_get_badpage_count(ras_core); 244 + 245 + if (threshold_config != 0 && 246 + bad_page_count > control->record_threshold_count) { 247 + RAS_DEV_WARN(ras_core->dev, 248 + "Saved bad pages %d reaches threshold value %d\n", 249 + bad_page_count, control->record_threshold_count); 250 + 251 + if ((threshold_config != WARN_NONSTOP_OVER_THRESHOLD) && 252 + (threshold_config != NONSTOP_OVER_THRESHOLD)) 253 + ras_core->is_rma = true; 254 + 255 + /* ignore the -ENOTSUPP return value */ 256 + ras_core_event_notify(ras_core, RAS_EVENT_ID__DEVICE_RMA, NULL); 257 + } 258 + 259 + mutex_unlock(&control->ras_tbl_mutex); 260 + return 0; 261 + }
+2
drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.h
··· 68 68 uint32_t *result); 69 69 int ras_fw_eeprom_reset_table(struct ras_core_context *ras_core); 70 70 bool ras_fw_eeprom_check_safety_watermark(struct ras_core_context *ras_core); 71 + int ras_fw_eeprom_append(struct ras_core_context *ras_core, 72 + struct eeprom_umc_record *record, const u32 num); 71 73 72 74 #endif
+7 -3
drivers/gpu/drm/amd/ras/rascore/ras_umc.c
··· 491 491 save_count = data->count - eeprom_record_num; 492 492 /* only new entries are saved */ 493 493 if (save_count > 0) { 494 - if (ras_eeprom_append(ras_core, 495 - &data->bps[eeprom_record_num], 496 - save_count)) { 494 + if (ras_fw_eeprom_supported(ras_core)) 495 + ret = ras_fw_eeprom_append(ras_core, &data->bps[eeprom_record_num], 496 + save_count); 497 + else 498 + ret = ras_eeprom_append(ras_core, &data->bps[eeprom_record_num], 499 + save_count); 500 + if (ret) { 497 501 RAS_DEV_ERR(ras_core->dev, "Failed to save EEPROM table data!"); 498 502 ret = -EIO; 499 503 goto exit;