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spi: spi-fsl-lpspi: fsl_lpspi_set_cmd(): use mode from struct fsl_lpspi_data::config::mode

Commit 7ae4d097b752 ("spi: spi-fsl-lpspi: Handle clock polarity and phase")
enhances the driver with clock polarity and phase handling. That commit
adds a 2nd argument ("struct spi_device *spi") to the fsl_lpspi_set_cmd()
function.

The "spi" pointer is used to access the "mode" of the current transfer.
However the mode is already available via "fsl_lpspi->config.mode".

To simplify the driver remove the 2nd argument and use
"fsl_lpspi->config.mode" to access the mode.

Cc: Marek Vasut <marex@nabladev.com>
Reviewed-by: Marek Vasut <marex@nabladev.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://patch.msgid.link/20260319-spi-fsl-lpspi-cleanups-v2-4-02b56c5d44a8@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Marc Kleine-Budde and committed by
Mark Brown b191fbf4 732b903e

+5 -6
+5 -6
drivers/spi/spi-fsl-lpspi.c
··· 284 284 fsl_lpspi->rx(fsl_lpspi); 285 285 } 286 286 287 - static void fsl_lpspi_set_cmd(struct fsl_lpspi_data *fsl_lpspi, 288 - struct spi_device *spi) 287 + static void fsl_lpspi_set_cmd(struct fsl_lpspi_data *fsl_lpspi) 289 288 { 290 289 u32 temp = 0; 291 290 ··· 307 308 } 308 309 } 309 310 310 - if (spi->mode & SPI_CPOL) 311 + if (fsl_lpspi->config.mode & SPI_CPOL) 311 312 temp |= TCR_CPOL; 312 313 313 - if (spi->mode & SPI_CPHA) 314 + if (fsl_lpspi->config.mode & SPI_CPHA) 314 315 temp |= TCR_CPHA; 315 316 316 317 writel(temp, fsl_lpspi->base + IMX7ULP_TCR); ··· 527 528 if (ret < 0) 528 529 return ret; 529 530 530 - fsl_lpspi_set_cmd(fsl_lpspi, spi); 531 + fsl_lpspi_set_cmd(fsl_lpspi); 531 532 532 533 /* No IRQs */ 533 534 writel(0, fsl_lpspi->base + IMX7ULP_IER); ··· 807 808 808 809 t->effective_speed_hz = fsl_lpspi->config.effective_speed_hz; 809 810 810 - fsl_lpspi_set_cmd(fsl_lpspi, spi); 811 + fsl_lpspi_set_cmd(fsl_lpspi); 811 812 fsl_lpspi->is_first_byte = false; 812 813 813 814 if (fsl_lpspi->usedma)