Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/msm/a6xx: Add support for Adreno 623
Add support for Adreno 623 GPU found in QCS8300 chipsets.
Signed-off-by: Jie Zhang <quic_jiezh@quicinc.com>
Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/640056/
Signed-off-by: Rob Clark <robdclark@chromium.org>
+43
-1
+29
drivers/gpu/drm/msm/adreno/a6xx_catalog.c
+29
drivers/gpu/drm/msm/adreno/a6xx_catalog.c
···
880
880
{ 137, 1 },
881
881
),
882
882
}, {
883
+
.chip_ids = ADRENO_CHIP_IDS(0x06020300),
884
+
.family = ADRENO_6XX_GEN3,
885
+
.fw = {
886
+
[ADRENO_FW_SQE] = "a650_sqe.fw",
887
+
[ADRENO_FW_GMU] = "a623_gmu.bin",
888
+
},
889
+
.gmem = SZ_512K,
890
+
.inactive_period = DRM_MSM_INACTIVE_PERIOD,
891
+
.quirks = ADRENO_QUIRK_HAS_CACHED_COHERENT |
892
+
ADRENO_QUIRK_HAS_HW_APRIV,
893
+
.init = a6xx_gpu_init,
894
+
.a6xx = &(const struct a6xx_info) {
895
+
.hwcg = a690_hwcg,
896
+
.protect = &a650_protect,
897
+
.gmu_cgc_mode = 0x00020200,
898
+
.prim_fifo_threshold = 0x00010000,
899
+
.bcms = (const struct a6xx_bcm[]) {
900
+
{ .name = "SH0", .buswidth = 16 },
901
+
{ .name = "MC0", .buswidth = 4 },
902
+
{
903
+
.name = "ACV",
904
+
.fixed = true,
905
+
.perfmode = BIT(3),
906
+
},
907
+
{ /* sentinel */ },
908
+
},
909
+
},
910
+
.address_space_size = SZ_16G,
911
+
}, {
883
912
.chip_ids = ADRENO_CHIP_IDS(
884
913
0x06030001,
885
914
0x06030002
+8
drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+8
drivers/gpu/drm/msm/adreno/a6xx_gpu.c
···
616
616
gpu->ubwc_config.uavflagprd_inv = 2;
617
617
}
618
618
619
+
if (adreno_is_a623(gpu)) {
620
+
gpu->ubwc_config.highest_bank_bit = 16;
621
+
gpu->ubwc_config.amsbc = 1;
622
+
gpu->ubwc_config.rgb565_predicator = 1;
623
+
gpu->ubwc_config.uavflagprd_inv = 2;
624
+
gpu->ubwc_config.macrotile_mode = 1;
625
+
}
626
+
619
627
if (adreno_is_a640_family(gpu))
620
628
gpu->ubwc_config.amsbc = 1;
621
629
+1
-1
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
+1
-1
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
···
1227
1227
_a6xx_get_gmu_registers(gpu, a6xx_state, &a6xx_gmu_reglist[1],
1228
1228
&a6xx_state->gmu_registers[1], true);
1229
1229
1230
-
if (adreno_is_a621(adreno_gpu))
1230
+
if (adreno_is_a621(adreno_gpu) || adreno_is_a623(adreno_gpu))
1231
1231
_a6xx_get_gmu_registers(gpu, a6xx_state, &a621_gpucc_reg,
1232
1232
&a6xx_state->gmu_registers[2], false);
1233
1233
else
+5
drivers/gpu/drm/msm/adreno/adreno_gpu.h
+5
drivers/gpu/drm/msm/adreno/adreno_gpu.h
···
442
442
return gpu->info->chip_ids[0] == 0x06020100;
443
443
}
444
444
445
+
static inline int adreno_is_a623(const struct adreno_gpu *gpu)
446
+
{
447
+
return gpu->info->chip_ids[0] == 0x06020300;
448
+
}
449
+
445
450
static inline int adreno_is_a630(const struct adreno_gpu *gpu)
446
451
{
447
452
return adreno_is_revn(gpu, 630);