Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'perf-urgent-2025-04-18' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 perf event fixes from Ingo Molnar:
"Miscellaneous fixes and a hardware-enabling change:
- Fix Intel uncore PMU IIO free running counters on SPR, ICX and SNR
systems
- Fix Intel PEBS buffer overflow handling
- Fix skid in Intel PEBS sampling of user-space general purpose
registers
- Enable Panther Lake PMU support - similar to Lunar Lake"
* tag 'perf-urgent-2025-04-18' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/x86/intel: Add Panther Lake support
perf/x86/intel: Allow to update user space GPRs from PEBS records
perf/x86/intel: Don't clear perf metrics overflow bit unconditionally
perf/x86/intel/uncore: Fix the scale of IIO free running counters on SPR
perf/x86/intel/uncore: Fix the scale of IIO free running counters on ICX
perf/x86/intel/uncore: Fix the scale of IIO free running counters on SNR
+35
-104
+20
-4
arch/x86/events/intel/core.c
+20
-4
arch/x86/events/intel/core.c
···
3049
3049
struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
3050
3050
int bit;
3051
3051
int handled = 0;
3052
-
u64 intel_ctrl = hybrid(cpuc->pmu, intel_ctrl);
3053
3052
3054
3053
inc_irq_stat(apic_perf_irqs);
3055
3054
···
3092
3093
handled++;
3093
3094
x86_pmu_handle_guest_pebs(regs, &data);
3094
3095
static_call(x86_pmu_drain_pebs)(regs, &data);
3095
-
status &= intel_ctrl | GLOBAL_STATUS_TRACE_TOPAPMI;
3096
3096
3097
3097
/*
3098
3098
* PMI throttle may be triggered, which stops the PEBS event.
···
3102
3104
*/
3103
3105
if (pebs_enabled != cpuc->pebs_enabled)
3104
3106
wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc->pebs_enabled);
3107
+
3108
+
/*
3109
+
* Above PEBS handler (PEBS counters snapshotting) has updated fixed
3110
+
* counter 3 and perf metrics counts if they are in counter group,
3111
+
* unnecessary to update again.
3112
+
*/
3113
+
if (cpuc->events[INTEL_PMC_IDX_FIXED_SLOTS] &&
3114
+
is_pebs_counter_event_group(cpuc->events[INTEL_PMC_IDX_FIXED_SLOTS]))
3115
+
status &= ~GLOBAL_STATUS_PERF_METRICS_OVF_BIT;
3105
3116
}
3106
3117
3107
3118
/*
···
3129
3122
handled++;
3130
3123
static_call(intel_pmu_update_topdown_event)(NULL, NULL);
3131
3124
}
3125
+
3126
+
status &= hybrid(cpuc->pmu, intel_ctrl);
3132
3127
3133
3128
/*
3134
3129
* Checkpointed counters can lead to 'spurious' PMIs because the
···
7314
7305
name = "meteorlake_hybrid";
7315
7306
break;
7316
7307
7308
+
case INTEL_PANTHERLAKE_L:
7309
+
pr_cont("Pantherlake Hybrid events, ");
7310
+
name = "pantherlake_hybrid";
7311
+
goto lnl_common;
7312
+
7317
7313
case INTEL_LUNARLAKE_M:
7318
7314
case INTEL_ARROWLAKE:
7315
+
pr_cont("Lunarlake Hybrid events, ");
7316
+
name = "lunarlake_hybrid";
7317
+
7318
+
lnl_common:
7319
7319
intel_pmu_init_hybrid(hybrid_big_small);
7320
7320
7321
7321
x86_pmu.pebs_latency_data = lnl_latency_data;
···
7346
7328
intel_pmu_init_skt(&pmu->pmu);
7347
7329
7348
7330
intel_pmu_pebs_data_source_lnl();
7349
-
pr_cont("Lunarlake Hybrid events, ");
7350
-
name = "lunarlake_hybrid";
7351
7331
break;
7352
7332
7353
7333
case INTEL_ARROWLAKE_H:
+5
-3
arch/x86/events/intel/ds.c
+5
-3
arch/x86/events/intel/ds.c
···
1399
1399
* + precise_ip < 2 for the non event IP
1400
1400
* + For RTM TSX weight we need GPRs for the abort code.
1401
1401
*/
1402
-
gprs = (sample_type & PERF_SAMPLE_REGS_INTR) &&
1403
-
(attr->sample_regs_intr & PEBS_GP_REGS);
1402
+
gprs = ((sample_type & PERF_SAMPLE_REGS_INTR) &&
1403
+
(attr->sample_regs_intr & PEBS_GP_REGS)) ||
1404
+
((sample_type & PERF_SAMPLE_REGS_USER) &&
1405
+
(attr->sample_regs_user & PEBS_GP_REGS));
1404
1406
1405
1407
tsx_weight = (sample_type & PERF_SAMPLE_WEIGHT_TYPE) &&
1406
1408
((attr->config & INTEL_ARCH_EVENT_MASK) ==
···
2125
2123
regs->flags &= ~PERF_EFLAGS_EXACT;
2126
2124
}
2127
2125
2128
-
if (sample_type & PERF_SAMPLE_REGS_INTR)
2126
+
if (sample_type & (PERF_SAMPLE_REGS_INTR | PERF_SAMPLE_REGS_USER))
2129
2127
adaptive_pebs_save_regs(regs, gprs);
2130
2128
}
2131
2129
+10
-97
arch/x86/events/intel/uncore_snbep.c
+10
-97
arch/x86/events/intel/uncore_snbep.c
···
4891
4891
INTEL_UNCORE_EVENT_DESC(ioclk, "event=0xff,umask=0x10"),
4892
4892
/* Free-Running IIO BANDWIDTH IN Counters */
4893
4893
INTEL_UNCORE_EVENT_DESC(bw_in_port0, "event=0xff,umask=0x20"),
4894
-
INTEL_UNCORE_EVENT_DESC(bw_in_port0.scale, "3.814697266e-6"),
4894
+
INTEL_UNCORE_EVENT_DESC(bw_in_port0.scale, "3.0517578125e-5"),
4895
4895
INTEL_UNCORE_EVENT_DESC(bw_in_port0.unit, "MiB"),
4896
4896
INTEL_UNCORE_EVENT_DESC(bw_in_port1, "event=0xff,umask=0x21"),
4897
-
INTEL_UNCORE_EVENT_DESC(bw_in_port1.scale, "3.814697266e-6"),
4897
+
INTEL_UNCORE_EVENT_DESC(bw_in_port1.scale, "3.0517578125e-5"),
4898
4898
INTEL_UNCORE_EVENT_DESC(bw_in_port1.unit, "MiB"),
4899
4899
INTEL_UNCORE_EVENT_DESC(bw_in_port2, "event=0xff,umask=0x22"),
4900
-
INTEL_UNCORE_EVENT_DESC(bw_in_port2.scale, "3.814697266e-6"),
4900
+
INTEL_UNCORE_EVENT_DESC(bw_in_port2.scale, "3.0517578125e-5"),
4901
4901
INTEL_UNCORE_EVENT_DESC(bw_in_port2.unit, "MiB"),
4902
4902
INTEL_UNCORE_EVENT_DESC(bw_in_port3, "event=0xff,umask=0x23"),
4903
-
INTEL_UNCORE_EVENT_DESC(bw_in_port3.scale, "3.814697266e-6"),
4903
+
INTEL_UNCORE_EVENT_DESC(bw_in_port3.scale, "3.0517578125e-5"),
4904
4904
INTEL_UNCORE_EVENT_DESC(bw_in_port3.unit, "MiB"),
4905
4905
INTEL_UNCORE_EVENT_DESC(bw_in_port4, "event=0xff,umask=0x24"),
4906
-
INTEL_UNCORE_EVENT_DESC(bw_in_port4.scale, "3.814697266e-6"),
4906
+
INTEL_UNCORE_EVENT_DESC(bw_in_port4.scale, "3.0517578125e-5"),
4907
4907
INTEL_UNCORE_EVENT_DESC(bw_in_port4.unit, "MiB"),
4908
4908
INTEL_UNCORE_EVENT_DESC(bw_in_port5, "event=0xff,umask=0x25"),
4909
-
INTEL_UNCORE_EVENT_DESC(bw_in_port5.scale, "3.814697266e-6"),
4909
+
INTEL_UNCORE_EVENT_DESC(bw_in_port5.scale, "3.0517578125e-5"),
4910
4910
INTEL_UNCORE_EVENT_DESC(bw_in_port5.unit, "MiB"),
4911
4911
INTEL_UNCORE_EVENT_DESC(bw_in_port6, "event=0xff,umask=0x26"),
4912
-
INTEL_UNCORE_EVENT_DESC(bw_in_port6.scale, "3.814697266e-6"),
4912
+
INTEL_UNCORE_EVENT_DESC(bw_in_port6.scale, "3.0517578125e-5"),
4913
4913
INTEL_UNCORE_EVENT_DESC(bw_in_port6.unit, "MiB"),
4914
4914
INTEL_UNCORE_EVENT_DESC(bw_in_port7, "event=0xff,umask=0x27"),
4915
-
INTEL_UNCORE_EVENT_DESC(bw_in_port7.scale, "3.814697266e-6"),
4915
+
INTEL_UNCORE_EVENT_DESC(bw_in_port7.scale, "3.0517578125e-5"),
4916
4916
INTEL_UNCORE_EVENT_DESC(bw_in_port7.unit, "MiB"),
4917
4917
{ /* end: all zeroes */ },
4918
4918
};
···
5485
5485
[ICX_IIO_MSR_BW_IN] = { 0xaa0, 0x1, 0x10, 8, 48, icx_iio_bw_freerunning_box_offsets },
5486
5486
};
5487
5487
5488
-
static struct uncore_event_desc icx_uncore_iio_freerunning_events[] = {
5489
-
/* Free-Running IIO CLOCKS Counter */
5490
-
INTEL_UNCORE_EVENT_DESC(ioclk, "event=0xff,umask=0x10"),
5491
-
/* Free-Running IIO BANDWIDTH IN Counters */
5492
-
INTEL_UNCORE_EVENT_DESC(bw_in_port0, "event=0xff,umask=0x20"),
5493
-
INTEL_UNCORE_EVENT_DESC(bw_in_port0.scale, "3.814697266e-6"),
5494
-
INTEL_UNCORE_EVENT_DESC(bw_in_port0.unit, "MiB"),
5495
-
INTEL_UNCORE_EVENT_DESC(bw_in_port1, "event=0xff,umask=0x21"),
5496
-
INTEL_UNCORE_EVENT_DESC(bw_in_port1.scale, "3.814697266e-6"),
5497
-
INTEL_UNCORE_EVENT_DESC(bw_in_port1.unit, "MiB"),
5498
-
INTEL_UNCORE_EVENT_DESC(bw_in_port2, "event=0xff,umask=0x22"),
5499
-
INTEL_UNCORE_EVENT_DESC(bw_in_port2.scale, "3.814697266e-6"),
5500
-
INTEL_UNCORE_EVENT_DESC(bw_in_port2.unit, "MiB"),
5501
-
INTEL_UNCORE_EVENT_DESC(bw_in_port3, "event=0xff,umask=0x23"),
5502
-
INTEL_UNCORE_EVENT_DESC(bw_in_port3.scale, "3.814697266e-6"),
5503
-
INTEL_UNCORE_EVENT_DESC(bw_in_port3.unit, "MiB"),
5504
-
INTEL_UNCORE_EVENT_DESC(bw_in_port4, "event=0xff,umask=0x24"),
5505
-
INTEL_UNCORE_EVENT_DESC(bw_in_port4.scale, "3.814697266e-6"),
5506
-
INTEL_UNCORE_EVENT_DESC(bw_in_port4.unit, "MiB"),
5507
-
INTEL_UNCORE_EVENT_DESC(bw_in_port5, "event=0xff,umask=0x25"),
5508
-
INTEL_UNCORE_EVENT_DESC(bw_in_port5.scale, "3.814697266e-6"),
5509
-
INTEL_UNCORE_EVENT_DESC(bw_in_port5.unit, "MiB"),
5510
-
INTEL_UNCORE_EVENT_DESC(bw_in_port6, "event=0xff,umask=0x26"),
5511
-
INTEL_UNCORE_EVENT_DESC(bw_in_port6.scale, "3.814697266e-6"),
5512
-
INTEL_UNCORE_EVENT_DESC(bw_in_port6.unit, "MiB"),
5513
-
INTEL_UNCORE_EVENT_DESC(bw_in_port7, "event=0xff,umask=0x27"),
5514
-
INTEL_UNCORE_EVENT_DESC(bw_in_port7.scale, "3.814697266e-6"),
5515
-
INTEL_UNCORE_EVENT_DESC(bw_in_port7.unit, "MiB"),
5516
-
{ /* end: all zeroes */ },
5517
-
};
5518
-
5519
5488
static struct intel_uncore_type icx_uncore_iio_free_running = {
5520
5489
.name = "iio_free_running",
5521
5490
.num_counters = 9,
···
5492
5523
.num_freerunning_types = ICX_IIO_FREERUNNING_TYPE_MAX,
5493
5524
.freerunning = icx_iio_freerunning,
5494
5525
.ops = &skx_uncore_iio_freerunning_ops,
5495
-
.event_descs = icx_uncore_iio_freerunning_events,
5526
+
.event_descs = snr_uncore_iio_freerunning_events,
5496
5527
.format_group = &skx_uncore_iio_freerunning_format_group,
5497
5528
};
5498
5529
···
6289
6320
[SPR_IIO_MSR_BW_OUT] = { 0x3808, 0x1, 0x10, 8, 48 },
6290
6321
};
6291
6322
6292
-
static struct uncore_event_desc spr_uncore_iio_freerunning_events[] = {
6293
-
/* Free-Running IIO CLOCKS Counter */
6294
-
INTEL_UNCORE_EVENT_DESC(ioclk, "event=0xff,umask=0x10"),
6295
-
/* Free-Running IIO BANDWIDTH IN Counters */
6296
-
INTEL_UNCORE_EVENT_DESC(bw_in_port0, "event=0xff,umask=0x20"),
6297
-
INTEL_UNCORE_EVENT_DESC(bw_in_port0.scale, "3.814697266e-6"),
6298
-
INTEL_UNCORE_EVENT_DESC(bw_in_port0.unit, "MiB"),
6299
-
INTEL_UNCORE_EVENT_DESC(bw_in_port1, "event=0xff,umask=0x21"),
6300
-
INTEL_UNCORE_EVENT_DESC(bw_in_port1.scale, "3.814697266e-6"),
6301
-
INTEL_UNCORE_EVENT_DESC(bw_in_port1.unit, "MiB"),
6302
-
INTEL_UNCORE_EVENT_DESC(bw_in_port2, "event=0xff,umask=0x22"),
6303
-
INTEL_UNCORE_EVENT_DESC(bw_in_port2.scale, "3.814697266e-6"),
6304
-
INTEL_UNCORE_EVENT_DESC(bw_in_port2.unit, "MiB"),
6305
-
INTEL_UNCORE_EVENT_DESC(bw_in_port3, "event=0xff,umask=0x23"),
6306
-
INTEL_UNCORE_EVENT_DESC(bw_in_port3.scale, "3.814697266e-6"),
6307
-
INTEL_UNCORE_EVENT_DESC(bw_in_port3.unit, "MiB"),
6308
-
INTEL_UNCORE_EVENT_DESC(bw_in_port4, "event=0xff,umask=0x24"),
6309
-
INTEL_UNCORE_EVENT_DESC(bw_in_port4.scale, "3.814697266e-6"),
6310
-
INTEL_UNCORE_EVENT_DESC(bw_in_port4.unit, "MiB"),
6311
-
INTEL_UNCORE_EVENT_DESC(bw_in_port5, "event=0xff,umask=0x25"),
6312
-
INTEL_UNCORE_EVENT_DESC(bw_in_port5.scale, "3.814697266e-6"),
6313
-
INTEL_UNCORE_EVENT_DESC(bw_in_port5.unit, "MiB"),
6314
-
INTEL_UNCORE_EVENT_DESC(bw_in_port6, "event=0xff,umask=0x26"),
6315
-
INTEL_UNCORE_EVENT_DESC(bw_in_port6.scale, "3.814697266e-6"),
6316
-
INTEL_UNCORE_EVENT_DESC(bw_in_port6.unit, "MiB"),
6317
-
INTEL_UNCORE_EVENT_DESC(bw_in_port7, "event=0xff,umask=0x27"),
6318
-
INTEL_UNCORE_EVENT_DESC(bw_in_port7.scale, "3.814697266e-6"),
6319
-
INTEL_UNCORE_EVENT_DESC(bw_in_port7.unit, "MiB"),
6320
-
/* Free-Running IIO BANDWIDTH OUT Counters */
6321
-
INTEL_UNCORE_EVENT_DESC(bw_out_port0, "event=0xff,umask=0x30"),
6322
-
INTEL_UNCORE_EVENT_DESC(bw_out_port0.scale, "3.814697266e-6"),
6323
-
INTEL_UNCORE_EVENT_DESC(bw_out_port0.unit, "MiB"),
6324
-
INTEL_UNCORE_EVENT_DESC(bw_out_port1, "event=0xff,umask=0x31"),
6325
-
INTEL_UNCORE_EVENT_DESC(bw_out_port1.scale, "3.814697266e-6"),
6326
-
INTEL_UNCORE_EVENT_DESC(bw_out_port1.unit, "MiB"),
6327
-
INTEL_UNCORE_EVENT_DESC(bw_out_port2, "event=0xff,umask=0x32"),
6328
-
INTEL_UNCORE_EVENT_DESC(bw_out_port2.scale, "3.814697266e-6"),
6329
-
INTEL_UNCORE_EVENT_DESC(bw_out_port2.unit, "MiB"),
6330
-
INTEL_UNCORE_EVENT_DESC(bw_out_port3, "event=0xff,umask=0x33"),
6331
-
INTEL_UNCORE_EVENT_DESC(bw_out_port3.scale, "3.814697266e-6"),
6332
-
INTEL_UNCORE_EVENT_DESC(bw_out_port3.unit, "MiB"),
6333
-
INTEL_UNCORE_EVENT_DESC(bw_out_port4, "event=0xff,umask=0x34"),
6334
-
INTEL_UNCORE_EVENT_DESC(bw_out_port4.scale, "3.814697266e-6"),
6335
-
INTEL_UNCORE_EVENT_DESC(bw_out_port4.unit, "MiB"),
6336
-
INTEL_UNCORE_EVENT_DESC(bw_out_port5, "event=0xff,umask=0x35"),
6337
-
INTEL_UNCORE_EVENT_DESC(bw_out_port5.scale, "3.814697266e-6"),
6338
-
INTEL_UNCORE_EVENT_DESC(bw_out_port5.unit, "MiB"),
6339
-
INTEL_UNCORE_EVENT_DESC(bw_out_port6, "event=0xff,umask=0x36"),
6340
-
INTEL_UNCORE_EVENT_DESC(bw_out_port6.scale, "3.814697266e-6"),
6341
-
INTEL_UNCORE_EVENT_DESC(bw_out_port6.unit, "MiB"),
6342
-
INTEL_UNCORE_EVENT_DESC(bw_out_port7, "event=0xff,umask=0x37"),
6343
-
INTEL_UNCORE_EVENT_DESC(bw_out_port7.scale, "3.814697266e-6"),
6344
-
INTEL_UNCORE_EVENT_DESC(bw_out_port7.unit, "MiB"),
6345
-
{ /* end: all zeroes */ },
6346
-
};
6347
-
6348
6323
static struct intel_uncore_type spr_uncore_iio_free_running = {
6349
6324
.name = "iio_free_running",
6350
6325
.num_counters = 17,
6351
6326
.num_freerunning_types = SPR_IIO_FREERUNNING_TYPE_MAX,
6352
6327
.freerunning = spr_iio_freerunning,
6353
6328
.ops = &skx_uncore_iio_freerunning_ops,
6354
-
.event_descs = spr_uncore_iio_freerunning_events,
6329
+
.event_descs = snr_uncore_iio_freerunning_events,
6355
6330
.format_group = &skx_uncore_iio_freerunning_format_group,
6356
6331
};
6357
6332