Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/i915: Extract display interrupt definitions
Extract DE Interrupt registers from i915_reg.h to display header.
This allows intel_display_rps.c not to include i915_reg.h
v2: Update commit message (Jani)
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patch.msgid.link/20260205094341.1882816-4-uma.shankar@intel.com
+34
-34
+33
drivers/gpu/drm/i915/display/intel_display_regs.h
+33
drivers/gpu/drm/i915/display/intel_display_regs.h
···
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GEN8_DE_PORT_IER, \
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GEN8_DE_PORT_IIR)
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+
/* interrupts */
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+
#define DE_MASTER_IRQ_CONTROL (1 << 31)
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#define DE_SPRITEB_FLIP_DONE (1 << 29)
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#define DE_SPRITEA_FLIP_DONE (1 << 28)
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#define DE_PLANEB_FLIP_DONE (1 << 27)
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#define DE_PLANEA_FLIP_DONE (1 << 26)
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#define DE_PLANE_FLIP_DONE(plane) (1 << (26 + (plane)))
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#define DE_PCU_EVENT (1 << 25)
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#define DE_GTT_FAULT (1 << 24)
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#define DE_POISON (1 << 23)
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#define DE_PERFORM_COUNTER (1 << 22)
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#define DE_PCH_EVENT (1 << 21)
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#define DE_AUX_CHANNEL_A (1 << 20)
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#define DE_DP_A_HOTPLUG (1 << 19)
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#define DE_GSE (1 << 18)
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#define DE_PIPEB_VBLANK (1 << 15)
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#define DE_PIPEB_EVEN_FIELD (1 << 14)
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#define DE_PIPEB_ODD_FIELD (1 << 13)
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#define DE_PIPEB_LINE_COMPARE (1 << 12)
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#define DE_PIPEB_VSYNC (1 << 11)
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#define DE_PIPEB_CRC_DONE (1 << 10)
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#define DE_PIPEB_FIFO_UNDERRUN (1 << 8)
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#define DE_PIPEA_VBLANK (1 << 7)
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#define DE_PIPE_VBLANK(pipe) (1 << (7 + 8 * (pipe)))
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#define DE_PIPEA_EVEN_FIELD (1 << 6)
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#define DE_PIPEA_ODD_FIELD (1 << 5)
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#define DE_PIPEA_LINE_COMPARE (1 << 4)
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#define DE_PIPEA_VSYNC (1 << 3)
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#define DE_PIPEA_CRC_DONE (1 << 2)
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#define DE_PIPE_CRC_DONE(pipe) (1 << (2 + 8 * (pipe)))
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#define DE_PIPEA_FIFO_UNDERRUN (1 << 0)
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#define DE_PIPE_FIFO_UNDERRUN(pipe) (1 << (8 * (pipe)))
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+
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#define GEN8_DE_MISC_ISR _MMIO(0x44460)
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#define GEN8_DE_MISC_IMR _MMIO(0x44464)
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#define GEN8_DE_MISC_IIR _MMIO(0x44468)
+1
-1
drivers/gpu/drm/i915/display/intel_display_rps.c
+1
-1
drivers/gpu/drm/i915/display/intel_display_rps.c
-33
drivers/gpu/drm/i915/i915_reg.h
-33
drivers/gpu/drm/i915/i915_reg.h
···
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#define RM_TIMEOUT_REG_CAPTURE _MMIO(0x420E0)
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#define MMIO_TIMEOUT_US(us) ((us) << 0)
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/* interrupts */
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#define DE_MASTER_IRQ_CONTROL (1 << 31)
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-
#define DE_SPRITEB_FLIP_DONE (1 << 29)
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#define DE_SPRITEA_FLIP_DONE (1 << 28)
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#define DE_PLANEB_FLIP_DONE (1 << 27)
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-
#define DE_PLANEA_FLIP_DONE (1 << 26)
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#define DE_PLANE_FLIP_DONE(plane) (1 << (26 + (plane)))
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#define DE_PCU_EVENT (1 << 25)
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#define DE_GTT_FAULT (1 << 24)
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#define DE_POISON (1 << 23)
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#define DE_PERFORM_COUNTER (1 << 22)
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#define DE_PCH_EVENT (1 << 21)
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#define DE_AUX_CHANNEL_A (1 << 20)
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#define DE_DP_A_HOTPLUG (1 << 19)
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#define DE_GSE (1 << 18)
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#define DE_PIPEB_VBLANK (1 << 15)
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#define DE_PIPEB_EVEN_FIELD (1 << 14)
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#define DE_PIPEB_ODD_FIELD (1 << 13)
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#define DE_PIPEB_LINE_COMPARE (1 << 12)
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#define DE_PIPEB_VSYNC (1 << 11)
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#define DE_PIPEB_CRC_DONE (1 << 10)
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#define DE_PIPEB_FIFO_UNDERRUN (1 << 8)
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#define DE_PIPEA_VBLANK (1 << 7)
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#define DE_PIPE_VBLANK(pipe) (1 << (7 + 8 * (pipe)))
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#define DE_PIPEA_EVEN_FIELD (1 << 6)
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#define DE_PIPEA_ODD_FIELD (1 << 5)
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#define DE_PIPEA_LINE_COMPARE (1 << 4)
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#define DE_PIPEA_VSYNC (1 << 3)
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#define DE_PIPEA_CRC_DONE (1 << 2)
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#define DE_PIPE_CRC_DONE(pipe) (1 << (2 + 8 * (pipe)))
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#define DE_PIPEA_FIFO_UNDERRUN (1 << 0)
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#define DE_PIPE_FIFO_UNDERRUN(pipe) (1 << (8 * (pipe)))
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-
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#define VLV_MASTER_IER _MMIO(0x4400c) /* Gunit master IER */
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#define MASTER_INTERRUPT_ENABLE (1 << 31)
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