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Merge tag 'mvebu-dt64-6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt

mvebu dt64 for 6.18 (part 1)

Improve device tree correctness:
- Whitespace cleanup
- Add missing address-cells

Add new board definition for RIPE Atlas Probe v5, based on Turris MOX
(Armada 3720 SoC)

* tag 'mvebu-dt64-6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
arm64: dts: marvell: cn9130-sr-som: add missing properties to emmc
arm64: dts: marvell: add dts for RIPE Atlas Probe v5
dt-bindings: marvell: armada-37xx: add ripe,atlas-v5 compatible
arm64: dts: marvell: armada-cp11x: Add default ICU address cells
arm64: dts: marvell: armada-37xx: Add default PCI interrup controller address cells
arm64: dts: marvell: Minor whitespace cleanup

Link: https://lore.kernel.org/r/87frcrn1o0.fsf@BLaptop.bootlin.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+120 -4
+1
Documentation/devicetree/bindings/arm/marvell/armada-37xx.yaml
··· 23 23 - marvell,armada-3720-db 24 24 - methode,edpu 25 25 - methode,udpu 26 + - ripe,atlas-v5 26 27 - const: marvell,armada3720 27 28 - const: marvell,armada3710 28 29
+1
arch/arm64/boot/dts/marvell/Makefile
··· 1 1 # SPDX-License-Identifier: GPL-2.0 2 2 # Mvebu SoC Family 3 + dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-atlas-v5.dtb 3 4 dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-db.dtb 4 5 dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-eDPU.dtb 5 6 dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-espressobin.dtb
+1 -1
arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi
··· 322 322 323 323 nand: nand-controller@805b0000 { 324 324 compatible = "marvell,ac5-nand-controller"; 325 - reg = <0x0 0x805b0000 0x0 0x00000054>; 325 + reg = <0x0 0x805b0000 0x0 0x00000054>; 326 326 #address-cells = <0x1>; 327 327 #size-cells = <0x0>; 328 328 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+110
arch/arm64/boot/dts/marvell/armada-3720-atlas-v5.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + /* 3 + * Device Tree file for RIPE Atlas Probe v5 4 + * 2025 by Marek Behún <kabel@kernel.org> 5 + */ 6 + 7 + /dts-v1/; 8 + 9 + #include <dt-bindings/bus/moxtet.h> 10 + #include <dt-bindings/gpio/gpio.h> 11 + #include <dt-bindings/leds/common.h> 12 + #include "armada-372x.dtsi" 13 + 14 + / { 15 + model = "RIPE Atlas Probe v5"; 16 + compatible = "ripe,atlas-v5", "marvell,armada3720", 17 + "marvell,armada3710"; 18 + 19 + aliases { 20 + ethernet0 = &eth0; 21 + mmc0 = &sdhci0; 22 + }; 23 + 24 + chosen { 25 + stdout-path = "serial0:115200n8"; 26 + }; 27 + 28 + memory@0 { 29 + device_type = "memory"; 30 + reg = <0x00000000 0x00000000 0x00000000 0x20000000>; 31 + }; 32 + 33 + leds { 34 + compatible = "gpio-leds"; 35 + 36 + led { 37 + gpios = <&gpiosb 21 GPIO_ACTIVE_LOW>; 38 + function = LED_FUNCTION_ACTIVITY; 39 + color = <LED_COLOR_ID_RED>; 40 + linux,default-trigger = "default-on"; 41 + }; 42 + }; 43 + 44 + vsdc_reg: vsdc-reg { 45 + compatible = "regulator-gpio"; 46 + regulator-name = "vsdc"; 47 + regulator-min-microvolt = <1800000>; 48 + regulator-max-microvolt = <3300000>; 49 + regulator-boot-on; 50 + 51 + gpios = <&gpiosb 23 GPIO_ACTIVE_HIGH>; 52 + gpios-states = <0>; 53 + states = <1800000 0x1 54 + 3300000 0x0>; 55 + enable-active-high; 56 + }; 57 + 58 + firmware { 59 + armada-3700-rwtm { 60 + compatible = "marvell,armada-3700-rwtm-firmware", "cznic,turris-mox-rwtm"; 61 + }; 62 + }; 63 + }; 64 + 65 + &uart0 { 66 + pinctrl-names = "default"; 67 + pinctrl-0 = <&uart1_pins>; 68 + status = "okay"; 69 + }; 70 + 71 + &eth0 { 72 + pinctrl-names = "default"; 73 + pinctrl-0 = <&rgmii_pins>; 74 + phy-mode = "rgmii-id"; 75 + phy-handle = <&phy1>; 76 + status = "okay"; 77 + }; 78 + 79 + &sdhci0 { 80 + non-removable; 81 + bus-width = <4>; 82 + mmc-ddr-1_8v; 83 + mmc-hs400-1_8v; 84 + sd-uhs-sdr104; 85 + marvell,xenon-emmc; 86 + marvell,xenon-tun-count = <9>; 87 + marvell,pad-type = "fixed-1-8v"; 88 + vqmmc-supply = <&vsdc_reg>; 89 + 90 + pinctrl-names = "default"; 91 + pinctrl-0 = <&mmc_pins>; 92 + status = "okay"; 93 + 94 + #address-cells = <1>; 95 + #size-cells = <0>; 96 + mmccard: mmccard@0 { 97 + compatible = "mmc-card"; 98 + reg = <0>; 99 + }; 100 + }; 101 + 102 + &mdio { 103 + pinctrl-names = "default"; 104 + pinctrl-0 = <&smi_pins>; 105 + status = "okay"; 106 + 107 + phy1: ethernet-phy@1 { 108 + reg = <1>; 109 + }; 110 + };
+1
arch/arm64/boot/dts/marvell/armada-37xx.dtsi
··· 524 524 pcie_intc: interrupt-controller { 525 525 interrupt-controller; 526 526 #interrupt-cells = <1>; 527 + #address-cells = <0>; 527 528 }; 528 529 }; 529 530 };
+1
arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
··· 202 202 CP11X_LABEL(icu_nsr): interrupt-controller@10 { 203 203 compatible = "marvell,cp110-icu-nsr"; 204 204 reg = <0x10 0x20>; 205 + #address-cells = <0>; 205 206 #interrupt-cells = <2>; 206 207 interrupt-controller; 207 208 msi-parent = <&gicp>;
+2
arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi
··· 61 61 pinctrl-0 = <&ap_mmc0_pins>; 62 62 pinctrl-names = "default"; 63 63 vqmmc-supply = <&v_1_8>; 64 + no-sdio; 65 + non-removable; 64 66 status = "okay"; 65 67 }; 66 68
+2 -2
arch/arm64/boot/dts/marvell/cn9132-clearfog.dts
··· 559 559 }; 560 560 561 561 &cp2_ethernet { 562 - status = "okay"; 562 + status = "okay"; 563 563 }; 564 564 565 565 /* SRDS #2 - 5GE */ ··· 572 572 }; 573 573 574 574 &cp2_gpio1 { 575 - pinctrl-names= "default"; 575 + pinctrl-names = "default"; 576 576 pinctrl-0 = <&cp2_rsvd9_pins>; 577 577 578 578 /* J21 */
+1 -1
arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi
··· 442 442 reg = <0>; 443 443 compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; 444 444 spi-max-frequency = <10000000>; 445 - pinctrl-names = "default"; 445 + pinctrl-names = "default"; 446 446 pinctrl-0 = <&cp1_tpm_irq_pins>; 447 447 interrupt-parent = <&cp1_gpio1>; 448 448 interrupts = <17 IRQ_TYPE_LEVEL_LOW>;